msm: camera: isp: Program dual tfe settings in shdr
This change add support to program dual tfe configurations in SHDR to create sync between two TFEs. This change is required if MUP bit is used in SHDR mode. CRs-Fixed: 3508184 Change-Id: I270f7fd8e3cac1f1e50c5f16e7cba2c5e9c2b74f Signed-off-by: Ayush Kumar <quic_ayushkr@quicinc.com>
This commit is contained in:

committed by
Alok Chauhan

parent
fa6d50974b
commit
f31de7d3d0
@@ -169,6 +169,7 @@ struct cam_hw_acquire_stream_caps {
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* @hw_mgr_ctx_id HWMgr context id(returned)
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* @op_flags: Used as bitwise params from hw_mgr to ctx
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* See xxx_hw_mgr_intf.h for definitions
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* @link_hdl: Link handle
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* @acquired_hw_id: Acquired hardware mask
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* @acquired_hw_path: Acquired path mask for an input
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* if input splits into multiple paths,
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@@ -189,11 +190,10 @@ struct cam_hw_acquire_args {
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void *ctxt_to_hw_map;
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uint32_t hw_mgr_ctx_id;
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uint32_t op_flags;
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int32_t link_hdl;
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uint32_t acquired_hw_id[CAM_MAX_ACQ_RES];
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uint32_t acquired_hw_path[CAM_MAX_ACQ_RES][CAM_MAX_HW_SPLIT];
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uint32_t valid_acquired_hw;
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struct cam_hw_acquire_stream_caps op_params;
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cam_ctx_mini_dump_cb_func mini_dump_cb;
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};
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@@ -7431,6 +7431,7 @@ static int __cam_isp_ctx_acquire_hw_v1(struct cam_context *ctx,
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param.acquire_info_size = cmd->data_size;
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param.acquire_info = (uint64_t) acquire_hw_info;
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param.mini_dump_cb = __cam_isp_ctx_minidump_cb;
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param.link_hdl = ctx->link_hdl;
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rc = __cam_isp_ctx_allocate_mem_hw_entries(ctx,
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¶m);
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@@ -7598,6 +7599,7 @@ static int __cam_isp_ctx_acquire_hw_v2(struct cam_context *ctx,
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param.acquire_info_size = cmd->data_size;
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param.acquire_info = (uint64_t) acquire_hw_info;
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param.mini_dump_cb = __cam_isp_ctx_minidump_cb;
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param.link_hdl = ctx->link_hdl;
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/* call HW manager to reserve the resource */
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rc = ctx->hw_mgr_intf->hw_acquire(ctx->hw_mgr_intf->hw_mgr_priv,
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@@ -2371,8 +2371,10 @@ static int cam_tfe_mgr_acquire_hw(void *hw_mgr_priv, void *acquire_hw_args)
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for (i = 0; i < acquire_hw_info->num_inputs; i++) {
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if (in_port[i].usage_type)
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tfe_ctx->is_dual = true;
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if (in_port[i].shdr_en)
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if (in_port[i].shdr_en) {
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is_shdr_en = true;
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tfe_ctx->is_shdr = true;
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}
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if (in_port[i].is_shdr_master)
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is_shdr_master = true;
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}
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@@ -2448,8 +2450,14 @@ static int cam_tfe_mgr_acquire_hw(void *hw_mgr_priv, void *acquire_hw_args)
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acquire_args->op_flags |= CAM_IFE_CTX_SHDR_EN;
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if (is_shdr_master)
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acquire_args->op_flags |= CAM_IFE_CTX_SHDR_IS_MASTER;
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g_tfe_hw_mgr.session_data[tfe_ctx->base[0].idx].is_shdr = true;
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CAM_DBG(CAM_ISP, "ctx %d TFE index %d link hdl %x",
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tfe_ctx->ctx_index, tfe_ctx->base[0].idx, acquire_args->link_hdl);
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}
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g_tfe_hw_mgr.session_data[tfe_ctx->base[0].idx].link_hdl = acquire_args->link_hdl;
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cam_tfe_hw_mgr_put_ctx(&tfe_hw_mgr->used_ctx_list, &tfe_ctx);
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CAM_DBG(CAM_ISP, "Exit...(success)");
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@@ -3583,7 +3591,7 @@ static int cam_tfe_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
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struct cam_tfe_hw_mgr_ctx *ctx;
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struct cam_isp_hw_mgr_res *hw_mgr_res;
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struct cam_hw_intf *hw_intf;
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uint32_t i;
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uint32_t i, j, hw_index = 0;
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bool res_rdi_context_set = false;
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uint32_t primary_rdi_in_res;
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uint32_t primary_rdi_out_res;
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@@ -3654,6 +3662,25 @@ static int cam_tfe_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
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&g_tfe_hw_mgr.debug_cfg.camif_debug,
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sizeof(g_tfe_hw_mgr.debug_cfg.camif_debug));
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hw_id[hw_intf->hw_idx] = true;
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if (ctx->is_shdr) {
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for (j = 0; j < CAM_TFE_HW_NUM_MAX; j++) {
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if (g_tfe_hw_mgr.session_data[j].link_hdl ==
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g_tfe_hw_mgr.session_data[ctx->base[0].idx].link_hdl
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&& (j != ctx->base[0].idx) &&
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g_tfe_hw_mgr.session_data[j].is_shdr) {
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hw_index = j;
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break;
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}
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}
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rc = hw_intf->hw_ops.process_cmd(
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hw_intf->hw_priv,
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CAM_ISP_HW_CMD_SET_SYNC_HW_IDX,
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&hw_index,
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sizeof(hw_index));
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CAM_DBG(CAM_ISP, "TFE: %d sync idx %d", ctx->base[0].idx, hw_index);
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}
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}
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}
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@@ -4007,6 +4034,11 @@ static int cam_tfe_mgr_release_hw(void *hw_mgr_priv,
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CAM_DBG(CAM_ISP, "Enter...ctx id:%d",
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ctx->ctx_index);
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if (ctx->is_shdr) {
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g_tfe_hw_mgr.session_data[ctx->base[0].idx].link_hdl = 0;
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g_tfe_hw_mgr.session_data[ctx->base[0].idx].is_shdr = false;
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}
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if (ctx->init_done)
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cam_tfe_hw_mgr_deinit_hw(ctx);
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@@ -4032,6 +4064,8 @@ static int cam_tfe_mgr_release_hw(void *hw_mgr_priv,
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ctx->last_cdm_done_req = 0;
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kfree(ctx->tfe_bus_comp_grp);
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ctx->tfe_bus_comp_grp = NULL;
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ctx->is_shdr = false;
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ctx->is_shdr_slave = false;
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atomic_set(&ctx->overflow_pending, 0);
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for (i = 0; i < ctx->last_submit_bl_cmd.bl_count; i++) {
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@@ -6745,6 +6779,8 @@ int cam_tfe_hw_mgr_init(struct cam_hw_mgr_intf *hw_mgr_intf, int *iommu_hdl)
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j++;
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g_tfe_hw_mgr.cdm_reg_map[i] = &soc_info->reg_map[0];
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g_tfe_hw_mgr.session_data[i].link_hdl = 0;
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g_tfe_hw_mgr.session_data[i].is_shdr = false;
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CAM_DBG(CAM_ISP,
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"reg_map: mem base = %pK cam_base = 0x%llx",
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(void __iomem *)soc_info->reg_map[0].mem_base,
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@@ -129,7 +129,8 @@ struct cam_tfe_cdm_user_data {
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* @try_recovery_cnt Retry count for overflow recovery
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* @current_mup Current MUP val
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* @recovery_req_id The request id on which overflow recovery happens
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* @is_shdr_slave indicate whether context is slave in shdr usecase
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* @is_shdr Indicate if the usecase is SHDR
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* @is_shdr_slave Indicate whether context is slave in shdr usecase
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*/
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struct cam_tfe_hw_mgr_ctx {
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struct list_head list;
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@@ -178,6 +179,7 @@ struct cam_tfe_hw_mgr_ctx {
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uint32_t try_recovery_cnt;
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uint64_t recovery_req_id;
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enum cam_cdm_id cdm_id;
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bool is_shdr;
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bool is_shdr_slave;
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};
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@@ -195,6 +197,7 @@ struct cam_tfe_hw_mgr_ctx {
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* @free_ctx_list: free hw context list
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* @used_ctx_list: used hw context list
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* @ctx_pool: context storage
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* @session_data: Data related to current session
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* @tfe_csid_dev_caps csid device capability stored per core
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* @tfe_dev_caps tfe device capability per core
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* @work q work queue for TFE hw manager
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@@ -213,6 +216,7 @@ struct cam_tfe_hw_mgr {
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struct list_head free_ctx_list;
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struct list_head used_ctx_list;
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struct cam_tfe_hw_mgr_ctx ctx_pool[CAM_TFE_CTX_MAX];
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struct cam_isp_session_data session_data[CAM_TFE_HW_NUM_MAX];
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struct cam_tfe_csid_hw_caps tfe_csid_dev_caps[
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CAM_TFE_CSID_HW_NUM_MAX];
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@@ -257,6 +257,7 @@ enum cam_isp_hw_cmd_type {
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CAM_ISP_HW_CMD_DUMP_IRQ_DESCRIPTION,
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CAM_ISP_HW_CMD_GET_SET_PRIM_SOF_TS_ADDR,
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CAM_ISP_HW_CMD_DYNAMIC_CLOCK_UPDATE,
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CAM_ISP_HW_CMD_SET_SYNC_HW_IDX,
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CAM_ISP_HW_CMD_MAX,
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};
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@@ -588,6 +589,20 @@ struct cam_isp_hw_dump_header {
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uint32_t word_size;
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};
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/**
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* struct cam_isp_session_data - Session data
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*
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* @Brief: ISP session or usecase data
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*
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* @link_hdl: Link handle
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* @is_shdr: Indicate is usecase is shdr
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*
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*/
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struct cam_isp_session_data {
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int32_t link_hdl;
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bool is_shdr;
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};
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/**
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* struct cam_isp_hw_intf_data - ISP hw intf data
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*
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@@ -153,6 +153,8 @@ static struct cam_tfe_camif_reg_data tfe770_camif_reg_data = {
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.ai_c_srl_en_shift = 11,
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.ds16_c_srl_en_shift = 10,
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.ds4_c_srl_en_shift = 9,
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.shdr_mode_shift = 21,
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.extern_mup_shift = 22,
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};
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static struct cam_tfe_rdi_reg tfe770_rdi0_reg = {
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@@ -31,6 +31,7 @@ static const char drv_name[] = "tfe";
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#define CAM_TFE_CAMIF_IRQ_SOF_DEBUG_CNT_MAX 2
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#define CAM_TFE_DELAY_BW_REDUCTION_NUM_FRAMES 3
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#define CAM_TFE_MAX_OUT_OF_SYNC_ERR_COUNT 3
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#define CAM_TFE_DUAL_TFE_SYNC_SEL_IDX_FACTOR 1
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struct cam_tfe_top_common_data {
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struct cam_hw_soc_info *soc_info;
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@@ -60,6 +61,7 @@ struct cam_tfe_top_priv {
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struct timespec64 error_ts;
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uint32_t top_debug;
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uint32_t last_mup_val;
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uint32_t sync_hw_id;
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atomic_t switch_out_of_sync_cnt;
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};
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@@ -1764,6 +1766,27 @@ static int cam_tfe_top_bw_control(
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return rc;
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}
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static int cam_tfe_set_sync_hw_idx(
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struct cam_tfe_hw_core_info *core_info,
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void *cmd_args, uint32_t arg_size)
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{
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struct cam_tfe_top_priv *top_priv;
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uint32_t *hw_idx;
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if (!cmd_args) {
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CAM_ERR(CAM_ISP, "Error! Invalid input arguments");
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return -EINVAL;
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}
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top_priv = (struct cam_tfe_top_priv *)core_info->top_priv;
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hw_idx = (uint32_t *)cmd_args;
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top_priv->sync_hw_id = *hw_idx;
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CAM_DBG(CAM_ISP, "TFE:%d top sync hw idx %d", core_info->core_index,
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top_priv->sync_hw_id);
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return 0;
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}
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static int cam_tfe_top_get_reg_dump(
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struct cam_tfe_top_priv *top_priv,
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void *cmd_args, uint32_t arg_size)
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@@ -2397,7 +2420,7 @@ static int cam_tfe_camif_resource_start(
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if ((rsrc_data->sync_mode == CAM_ISP_HW_SYNC_SLAVE) ||
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(rsrc_data->sync_mode == CAM_ISP_HW_SYNC_MASTER)) {
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val |= (1 << rsrc_data->reg_data->dual_tfe_pix_en_shift);
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val |= ((rsrc_data->dual_tfe_sync_sel + 1) <<
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val |= ((rsrc_data->dual_tfe_sync_sel + CAM_TFE_DUAL_TFE_SYNC_SEL_IDX_FACTOR) <<
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rsrc_data->reg_data->dual_tfe_sync_sel_shift);
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}
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@@ -2426,11 +2449,14 @@ static int cam_tfe_camif_resource_start(
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}
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if (rsrc_data->shdr_en) {
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val |= rsrc_data->core_cfg &
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(1 << rsrc_data->reg_data->shdr_mode_shift);
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if (!rsrc_data->is_shdr_master)
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val |= rsrc_data->core_cfg &
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(1 << rsrc_data->reg_data->extern_mup_shift);
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val |= (1 << rsrc_data->reg_data->shdr_mode_shift);
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val |= (1 << rsrc_data->reg_data->dual_tfe_pix_en_shift);
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val |= ((top_priv->sync_hw_id + CAM_TFE_DUAL_TFE_SYNC_SEL_IDX_FACTOR) <<
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rsrc_data->reg_data->dual_tfe_sync_sel_shift);
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if (!rsrc_data->is_shdr_master) {
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val |= (1 << rsrc_data->reg_data->extern_mup_shift);
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val |= (1 << rsrc_data->reg_data->extern_reg_update_shift);
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}
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}
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cam_io_w_mb(val, rsrc_data->mem_base +
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@@ -3421,6 +3447,9 @@ int cam_tfe_process_cmd(void *hw_priv, uint32_t cmd_type,
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rc = cam_tfe_bus_get_path_port_map(hw_info->top_hw_info, cmd_args,
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arg_size);
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break;
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case CAM_ISP_HW_CMD_SET_SYNC_HW_IDX:
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rc = cam_tfe_set_sync_hw_idx(core_info, cmd_args, arg_size);
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break;
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default:
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CAM_ERR(CAM_ISP, "TFE:%d Invalid cmd type:%d",
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core_info->core_index, cmd_type);
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