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disp: msm: sde: flush reg dma during encoder disable

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Color features are disabled during encoder disable, but reg dma
flush is not triggered. This change does reg dma flush for the
features to be disabled during encoder disable.

Change-Id: Ia74d4c43ad7b699f0097b49d86ad59529c0b3230
Signed-off-by: Anjaneya Prasad Musunuri <quic_aprasad@quicinc.com>
(cherry picked from commit 0d9d979c76)
This commit is contained in:
Anjaneya Prasad Musunuri
2024-06-25 14:47:15 +05:30
committed by Mohit Sharma
parent 451c9ccdd5
commit f2f27d0454
1 changed files with 7 additions and 0 deletions
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7
msm/sde/sde_encoder.c
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@@ -3874,6 +3874,7 @@ void sde_encoder_helper_phys_disable(struct sde_encoder_phys *phys_enc,
struct sde_ctl_flush_cfg cfg; struct sde_ctl_flush_cfg cfg;
struct sde_hw_dsc *hw_dsc = NULL; struct sde_hw_dsc *hw_dsc = NULL;
int i; int i;
bool is_regdma_blocking = false, is_vid_mode = false;
ctl->ops.reset(ctl); ctl->ops.reset(ctl);
sde_encoder_helper_reset_mixers(phys_enc, NULL); sde_encoder_helper_reset_mixers(phys_enc, NULL);
@@ -3950,6 +3951,12 @@ void sde_encoder_helper_phys_disable(struct sde_encoder_phys *phys_enc,
_trigger_encoder_hw_fences_override(phys_enc->sde_kms, ctl); _trigger_encoder_hw_fences_override(phys_enc->sde_kms, ctl);
sde_crtc_disable_cp_features(sde_enc->base.crtc); sde_crtc_disable_cp_features(sde_enc->base.crtc);
if (sde_encoder_check_curr_mode(&sde_enc->base, MSM_DISPLAY_VIDEO_MODE))
is_vid_mode = true;
is_regdma_blocking = (is_vid_mode ||
_sde_encoder_is_autorefresh_enabled(sde_enc));
ctl->ops.reg_dma_flush(ctl, is_regdma_blocking);
ctl->ops.get_pending_flush(ctl, &cfg); ctl->ops.get_pending_flush(ctl, &cfg);
SDE_EVT32(DRMID(phys_enc->parent), cfg.pending_flush_mask); SDE_EVT32(DRMID(phys_enc->parent), cfg.pending_flush_mask);
ctl->ops.trigger_flush(ctl); ctl->ops.trigger_flush(ctl);