From f2b4941541e72fc5e593201e9cacad2198340d48 Mon Sep 17 00:00:00 2001 From: Matthew Rice Date: Mon, 18 Apr 2022 09:28:00 -0700 Subject: [PATCH] asoc: codecs: Fix PBR Battery stack settings Update PBR battery stack register settings to write battery stack - 1 Fix register masks to reference correct bit fields. Change-Id: I20ca099e7180b8d75dfd6ef93d8502500d53b9b7 Signed-off-by: Matthew Rice --- asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c b/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c index 716728ae24..002fcab387 100644 --- a/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c +++ b/asoc/codecs/lpass-cdc/lpass-cdc-wsa-macro.c @@ -3022,7 +3022,7 @@ static void lpass_cdc_wsa_macro_init_pbr(struct snd_soc_component *component) snd_soc_component_update_bits(component, LPASS_CDC_WSA_ILIM_CFG1, 0x0F, sys_gain); snd_soc_component_update_bits(component, - LPASS_CDC_WSA_ILIM_CFG9, 0xC0, bat_cfg << 0x7); + LPASS_CDC_WSA_ILIM_CFG9, 0xC0, (bat_cfg - 1) << 0x6); /* Thesh */ vth1 = LPASS_CDC_WSA_MACRO_VTH_TO_REG(pbr_vth1_data[sys_gain][bat_cfg][rload]); vth2 = LPASS_CDC_WSA_MACRO_VTH_TO_REG(pbr_vth2_data[sys_gain][bat_cfg][rload]); @@ -3084,7 +3084,7 @@ static void lpass_cdc_wsa_macro_init_pbr(struct snd_soc_component *component) snd_soc_component_update_bits(component, LPASS_CDC_WSA_ILIM_CFG1_1, 0x0F, sys_gain); snd_soc_component_update_bits(component, - LPASS_CDC_WSA_ILIM_CFG9, 0x30, bat_cfg << 0x5); + LPASS_CDC_WSA_ILIM_CFG9, 0x30, (bat_cfg - 1) << 0x4); /* Thesh */ vth1 = LPASS_CDC_WSA_MACRO_VTH_TO_REG(pbr_vth1_data[sys_gain][bat_cfg][rload]); vth2 = LPASS_CDC_WSA_MACRO_VTH_TO_REG(pbr_vth2_data[sys_gain][bat_cfg][rload]);