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@@ -618,11 +618,22 @@ int ce_send_fast(struct CE_handle *copyeng, qdf_nbuf_t msdu,
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uint64_t dma_addr;
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uint32_t user_flags;
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enum hif_ce_event_type type = FAST_TX_SOFTWARE_INDEX_UPDATE;
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+ bool ok_to_send = true;
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qdf_spin_lock_bh(&ce_state->ce_index_lock);
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- Q_TARGET_ACCESS_BEGIN(scn);
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- DATA_CE_UPDATE_SWINDEX(src_ring->sw_index, scn, ctrl_addr);
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+ /*
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+ * Request runtime PM resume if it has already suspended and make
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+ * sure there is no PCIe link access.
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+ */
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+ if (hif_pm_runtime_get(hif_hdl) != 0)
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+ ok_to_send = false;
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+
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+ if (ok_to_send) {
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+ Q_TARGET_ACCESS_BEGIN(scn);
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+ DATA_CE_UPDATE_SWINDEX(src_ring->sw_index, scn, ctrl_addr);
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+ }
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+
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write_index = src_ring->write_index;
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sw_index = src_ring->sw_index;
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@@ -636,7 +647,8 @@ int ce_send_fast(struct CE_handle *copyeng, qdf_nbuf_t msdu,
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SLOTS_PER_DATAPATH_TX,
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CE_RING_DELTA(nentries_mask, write_index, sw_index - 1));
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OL_ATH_CE_PKT_ERROR_COUNT_INCR(scn, CE_RING_DELTA_FAIL);
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- Q_TARGET_ACCESS_END(scn);
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+ if (ok_to_send)
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+ Q_TARGET_ACCESS_END(scn);
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qdf_spin_unlock_bh(&ce_state->ce_index_lock);
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return 0;
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}
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@@ -725,19 +737,20 @@ int ce_send_fast(struct CE_handle *copyeng, qdf_nbuf_t msdu,
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src_ring->write_index = write_index;
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- if (hif_pm_runtime_get(hif_hdl) == 0) {
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+ if (ok_to_send) {
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if (qdf_likely(ce_state->state == CE_RUNNING)) {
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type = FAST_TX_WRITE_INDEX_UPDATE;
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war_ce_src_ring_write_idx_set(scn, ctrl_addr,
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write_index);
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+ Q_TARGET_ACCESS_END(scn);
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} else
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ce_state->state = CE_PENDING;
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hif_pm_runtime_put(hif_hdl);
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}
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+
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hif_record_ce_desc_event(scn, ce_state->id, type,
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NULL, NULL, write_index);
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- Q_TARGET_ACCESS_END(scn);
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qdf_spin_unlock_bh(&ce_state->ce_index_lock);
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/* sent 1 packet */
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