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disp: msm: dsi: Support uncompressed rgb101010 format

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Add support for uncompressed rgb101010 format.

Change-Id: I60c2f7817eb2ea3e462c4692b1beb7f523836326
Signed-off-by: Rajeev Nandan <quic_rajeevny@quicinc.com>
Signed-off-by: Ritesh Kumar <quic_riteshk@quicinc.com>
This commit is contained in:
Rajeev Nandan
2021-10-07 23:11:32 +05:30
committed by Rajeev Nandan
parent ae2854f289
commit f259cf68d1
5 changed files with 19 additions and 6 deletions
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3
msm/dsi/dsi_ctrl.c
View File

@@ -1008,6 +1008,9 @@ int dsi_ctrl_pixel_format_to_bpp(enum dsi_pixel_format dst_format)
case DSI_PIXEL_FORMAT_RGB888:
bpp = 24;
break;
case DSI_PIXEL_FORMAT_RGB101010:
bpp = 30;
break;
default:
bpp = 24;
break;

13
msm/dsi/dsi_ctrl_hw_cmn.c
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@@ -41,9 +41,9 @@ static bool dsi_compression_enabled(struct dsi_mode_info *mode)
/* Unsupported formats default to RGB888 */
static const u8 cmd_mode_format_map[DSI_PIXEL_FORMAT_MAX] = {
0x6, 0x7, 0x8, 0x8, 0x0, 0x3, 0x4 };
0x6, 0x7, 0x8, 0x8, 0x0, 0x3, 0x4, 0x9 };
static const u8 video_mode_format_map[DSI_PIXEL_FORMAT_MAX] = {
0x0, 0x1, 0x2, 0x3, 0x3, 0x3, 0x3 };
0x0, 0x1, 0x2, 0x3, 0x3, 0x3, 0x3, 0x4 };
/**
* dsi_split_link_setup() - setup dsi split link configurations
@@ -543,10 +543,13 @@ void dsi_ctrl_hw_cmn_setup_cmd_stream(struct dsi_ctrl_hw *ctrl,
u32 reg = 0, offset = 0;
int pic_width = 0, this_frame_slices = 0, intf_ip_w = 0;
u32 pkt_per_line = 0, eol_byte_num = 0, bytes_in_slice = 0;
u32 bpp;
if (roi && (!roi->w || !roi->h))
return;
bpp = dsi_pixel_format_to_bpp(cfg->dst_format);
if (dsi_dsc_compression_enabled(mode)) {
struct msm_display_dsc_info dsc;
@@ -580,11 +583,11 @@ void dsi_ctrl_hw_cmn_setup_cmd_stream(struct dsi_ctrl_hw *ctrl,
bytes_in_slice = vdc.bytes_in_slice;
} else if (roi) {
width_final = roi->w;
stride_final = roi->w * 3;
stride_final = DIV_ROUND_UP(roi->w * bpp, 8);
height_final = roi->h;
} else {
width_final = mode->h_active;
stride_final = mode->h_active * 3;
stride_final = DIV_ROUND_UP(mode->h_active * bpp, 8);
height_final = mode->v_active;
}
@@ -701,7 +704,7 @@ void dsi_ctrl_hw_cmn_video_engine_setup(struct dsi_ctrl_hw *ctrl,
reg |= (cfg->bllp_lp11_en ? BIT(12) : 0);
reg |= (cfg->traffic_mode & 0x3) << 8;
reg |= (cfg->vc_id & 0x3);
reg |= (video_mode_format_map[common_cfg->dst_format] & 0x3) << 4;
reg |= (video_mode_format_map[common_cfg->dst_format] & 0x7) << 4;
DSI_W32(ctrl, DSI_VIDEO_MODE_CTRL, reg);
reg = (common_cfg->swap_mode & 0x7) << 12;

4
msm/dsi/dsi_defs.h
View File

@@ -39,6 +39,7 @@
* @DSI_PIXEL_FORMAT_RGB111:
* @DSI_PIXEL_FORMAT_RGB332:
* @DSI_PIXEL_FORMAT_RGB444:
* @DSI_PIXEL_FORMAT_RGB101010:
* @DSI_PIXEL_FORMAT_MAX:
*/
enum dsi_pixel_format {
@@ -49,6 +50,7 @@ enum dsi_pixel_format {
DSI_PIXEL_FORMAT_RGB111,
DSI_PIXEL_FORMAT_RGB332,
DSI_PIXEL_FORMAT_RGB444,
DSI_PIXEL_FORMAT_RGB101010,
DSI_PIXEL_FORMAT_MAX
};
@@ -767,6 +769,8 @@ static inline int dsi_pixel_format_to_bpp(enum dsi_pixel_format fmt)
return 8;
case DSI_PIXEL_FORMAT_RGB444:
return 12;
case DSI_PIXEL_FORMAT_RGB101010:
return 30;
}
return 24;
}

3
msm/dsi/dsi_panel.c
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@@ -954,6 +954,9 @@ static int dsi_panel_parse_pixel_format(struct dsi_host_common_cfg *host,
case 18:
fmt = DSI_PIXEL_FORMAT_RGB666;
break;
case 30:
fmt = DSI_PIXEL_FORMAT_RGB101010;
break;
case 24:
default:
fmt = DSI_PIXEL_FORMAT_RGB888;

2
msm/dsi/dsi_phy_timing_calc.c
View File

@@ -6,7 +6,7 @@
#include "dsi_phy_timing_calc.h"
static const u32 bits_per_pixel[DSI_PIXEL_FORMAT_MAX] = {
16, 18, 18, 24, 3, 8, 12 };
16, 18, 18, 24, 3, 8, 12, 30 };
static int dsi_phy_cmn_validate_and_set(struct timing_entry *t,
char const *t_name)