qcacmn: Add Waikiki monitor HAL processing

Add Waikiki monitor HAL processing

CRs-Fixed: 3073467
Change-Id: I2b1768b827f34785effed6c076a099628870e2a5

dp/wifi3.0/monitor/2.0/dp_rx_mon_status_2.0.c

@@ -43,7 +43,7 @@ dp_rx_process_pktlog_be(struct dp_soc *soc, struct dp_pdev *pdev,
 	qdf_nbuf_t nbuf = NULL;
 	enum WDI_EVENT pktlog_mode = WDI_NO_VAL;
 
-	if (mon_pdev->dp_peer_based_pktlog &&
+	if (!mon_pdev->dp_peer_based_pktlog &&
 	    (mon_pdev->rx_pktlog_mode == DP_RX_PKTLOG_DISABLED)) {
 		return QDF_STATUS_E_INVAL;
 	}

hal/wifi3.0/be/hal_be_hw_headers.h

@@ -20,7 +20,6 @@
 #ifndef _HAL_BE_HW_INTERNAL_H_
 #define _HAL_BE_HW_INTERNAL_H_
 
-#include "hal_hw_headers.h"
 #include "wcss_seq_hwioreg_umac.h"
 #include "phyrx_location.h"
 #include "receive_rssi_info.h"

hal/wifi3.0/hal_api_mon.h

@@ -22,6 +22,7 @@
 
 #include "qdf_types.h"
 #include "hal_internal.h"
+#include "hal_rx.h"
 #include "hal_hw_headers.h"
 #include <target_type.h>
 
@@ -77,6 +78,8 @@
 #define HAL_TLV_STATUS_MPDU_END 6
 #define HAL_TLV_STATUS_MSDU_START 7
 #define HAL_TLV_STATUS_MSDU_END 8
+#define HAL_TLV_STATUS_MON_BUF_ADDR 9
+#define HAL_TLV_STATUS_MPDU_START 10
 
 #define HAL_MAX_UL_MU_USERS	37
 
@@ -190,6 +193,100 @@
 #define HAL_RX_FRAME_CTRL_TYPE_CTRL 0x1
 #define HAL_RX_FRAME_CTRL_TYPE_DATA 0x2
 
+/**
+ * hal_dl_ul_flag - flag to indicate UL/DL
+ * @dl_ul_flag_is_dl_or_tdls: DL
+ * @dl_ul_flag_is_ul: UL
+ */
+enum hal_dl_ul_flag {
+	dl_ul_flag_is_dl_or_tdls,
+	dl_ul_flag_is_ul,
+};
+
+/*
+ * hal_eht_ppdu_sig_cmn_type - PPDU type
+ * @eht_ppdu_sig_tb_or_dl_ofdma: TB/DL_OFDMA PPDU
+ * @eht_ppdu_sig_su: SU PPDU
+ * @eht_ppdu_sig_dl_mu_mimo: DL_MU_MIMO PPDU
+ */
+enum hal_eht_ppdu_sig_cmn_type {
+	eht_ppdu_sig_tb_or_dl_ofdma,
+	eht_ppdu_sig_su,
+	eht_ppdu_sig_dl_mu_mimo,
+};
+
+/*
+ * hal_mon_packet_info - packet info
+ * @sw_cookie: 64-bit SW desc virtual address
+ * @dma_length: packet DMA length
+ * @msdu_continuation: msdu continulation in next buffer
+ * @truncated: packet is truncated
+ */
+struct hal_mon_packet_info {
+	uint64_t sw_cookie;
+	uint16_t dma_length;
+	bool msdu_continuation;
+	bool truncated;
+};
+
+/*
+ * hal_rx_mon_msdu_info - msdu info
+ * @first_buffer: first buffer of msdu
+ * @last_buffer: last buffer of msdu
+ * @first_mpdu: first MPDU
+ * @mpdu_length_err: MPDU length error
+ * @fcs_err: FCS error
+ * @first_msdu: first msdu
+ * @decap_type: decap type
+ * @last_msdu: last msdu
+ * @buffer_len: buffer len
+ * @frag_len: frag len
+ * @msdu_len: msdu len
+ * @msdu_index: msdu index
+ * @user_rssi: user rssi
+ * @l3_header_padding: L3 padding header
+ * @stbc: stbc enabled
+ * @sgi: SGI value
+ * @reception_type: reception type
+ */
+struct hal_rx_mon_msdu_info {
+	uint8_t first_buffer;
+	uint8_t last_buffer;
+	uint8_t first_mpdu;
+	uint8_t mpdu_length_err;
+	uint8_t fcs_err;
+	uint8_t first_msdu;
+	uint8_t decap_type;
+	uint8_t last_msdu;
+	uint16_t buffer_len;
+	uint16_t frag_len;
+	uint16_t msdu_len;
+	uint8_t msdu_index;
+	int8_t user_rssi;
+	uint8_t l3_header_padding;
+	uint8_t stbc;
+	uint8_t sgi;
+	uint8_t reception_type;
+};
+
+/*
+ * hal_rx_mon_mpdu_info - MPDU info
+ * @decap_type: decap_type
+ * @mpdu_length_err: MPDU length error
+ * @fcs_err: FCS error
+ * @overflow_err: overflow error
+ * @decrypt_err: decrypt error
+ * @mpdu_start_received: MPDU start received
+ */
+struct hal_rx_mon_mpdu_info {
+	uint8_t decap_type;
+	bool mpdu_length_err;
+	bool fcs_err;
+	bool overflow_err;
+	bool decrypt_err;
+	bool mpdu_start_received;
+};
+
 /**
  * struct hal_rx_mon_desc_info () - HAL Rx Monitor descriptor info
  *
@@ -504,7 +601,7 @@ enum {
  */
 struct hal_rx_ppdu_common_info {
 	uint32_t ppdu_id;
-	uint32_t ppdu_timestamp;
+	uint64_t ppdu_timestamp;
 	uint32_t mpdu_cnt_fcs_ok;
 	uint32_t mpdu_cnt_fcs_err;
 	uint32_t mpdu_fcs_ok_bitmap[HAL_RX_NUM_WORDS_PER_PPDU_BITMAP];
@@ -1126,6 +1223,20 @@ struct hal_rx_ppdu_info {
 	struct hal_rx_tlv_aggr_info tlv_aggr;
 	/* EHT SIG user info */
 	uint32_t eht_sig_user_info;
+	/*per user mpdu count */
+	uint16_t mpdu_count[HAL_MAX_UL_MU_USERS];
+	/*per user msdu count */
+	uint16_t msdu_count[HAL_MAX_UL_MU_USERS];
+	/* Placeholder to update per user last processed msdu’s info */
+	struct hal_rx_mon_msdu_info  msdu[HAL_MAX_UL_MU_USERS];
+	/* Placeholder to update per user last processed mpdu’s info */
+	struct hal_rx_mon_mpdu_info mpdu_info[HAL_MAX_UL_MU_USERS];
+	 /* placeholder to hold packet buffer info */
+	struct hal_mon_packet_info packet_info;
+	 /* per user per MPDU queue */
+	qdf_nbuf_t mpdu_q[HAL_MAX_UL_MU_USERS][HAL_RX_MAX_MPDU];
+	 /* ppdu info list element */
+	TAILQ_ENTRY(hal_rx_ppdu_info) ppdu_list_elem;
 };
 
 static inline uint32_t

hal/wifi3.0/hal_generic_api.h

@@ -20,7 +20,6 @@
 #define _HAL_GENERIC_API_H_
 
 #include <hal_rx.h>
-#include "hal_api_mon.h"
 
 /**
  * hal_get_radiotap_he_gi_ltf() - Convert HE ltf and GI value

hal/wifi3.0/kiwi/hal_kiwi.c

@@ -33,7 +33,6 @@
 #include "rx_flow_search_entry.h"
 #include "hal_rx_flow_info.h"
 #include "hal_be_api.h"
-#include "hal_be_api_mon.h"
 #include "reo_destination_ring_with_pn.h"
 
 #include <hal_be_rx.h>
@@ -124,6 +123,7 @@ struct tcl_data_cmd gtcl_data_symbol __attribute__((used));
 
 #include <hal_generic_api.h>
 #include <hal_be_generic_api.h>
+#include "hal_be_api_mon.h"
 
 #define LINK_DESC_SIZE (NUM_OF_DWORDS_RX_MSDU_LINK << 2)
 

hal/wifi3.0/qcn9224/hal_9224.c

@@ -48,34 +48,6 @@
 
 #include <hal_be_rx.h>
 
-#define UNIFIED_RXPCU_PPDU_END_INFO_8_RX_PPDU_DURATION_OFFSET \
-	RXPCU_PPDU_END_INFO_RX_PPDU_DURATION_OFFSET
-#define UNIFIED_RXPCU_PPDU_END_INFO_8_RX_PPDU_DURATION_MASK \
-	RXPCU_PPDU_END_INFO_RX_PPDU_DURATION_MASK
-#define UNIFIED_RXPCU_PPDU_END_INFO_8_RX_PPDU_DURATION_LSB \
-	RXPCU_PPDU_END_INFO_RX_PPDU_DURATION_LSB
-#define UNIFIED_PHYRX_HT_SIG_0_HT_SIG_INFO_PHYRX_HT_SIG_INFO_DETAILS_OFFSET \
-	PHYRX_HT_SIG_PHYRX_HT_SIG_INFO_DETAILS_MCS_OFFSET
-#define UNIFIED_PHYRX_L_SIG_B_0_L_SIG_B_INFO_PHYRX_L_SIG_B_INFO_DETAILS_OFFSET \
-	PHYRX_L_SIG_B_PHYRX_L_SIG_B_INFO_DETAILS_RATE_OFFSET
-#define UNIFIED_PHYRX_L_SIG_A_0_L_SIG_A_INFO_PHYRX_L_SIG_A_INFO_DETAILS_OFFSET \
-	PHYRX_L_SIG_A_PHYRX_L_SIG_A_INFO_DETAILS_RATE_OFFSET
-#define UNIFIED_PHYRX_VHT_SIG_A_0_VHT_SIG_A_INFO_PHYRX_VHT_SIG_A_INFO_DETAILS_OFFSET \
-	PHYRX_VHT_SIG_A_PHYRX_VHT_SIG_A_INFO_DETAILS_BANDWIDTH_OFFSET
-#define UNIFIED_PHYRX_HE_SIG_A_SU_0_HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS_OFFSET \
-	PHYRX_HE_SIG_A_SU_PHYRX_HE_SIG_A_SU_INFO_DETAILS_FORMAT_INDICATION_OFFSET
-#define UNIFIED_PHYRX_HE_SIG_A_MU_DL_0_HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_OFFSET \
-	PHYRX_HE_SIG_A_MU_DL_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_DL_UL_FLAG_OFFSET
-#define UNIFIED_PHYRX_HE_SIG_B1_MU_0_HE_SIG_B1_MU_INFO_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_OFFSET \
-	PHYRX_HE_SIG_B1_MU_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_RU_ALLOCATION_OFFSET
-#define UNIFIED_PHYRX_HE_SIG_B2_MU_0_HE_SIG_B2_MU_INFO_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_OFFSET \
-	PHYRX_HE_SIG_B2_MU_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_STA_ID_OFFSET
-#define UNIFIED_PHYRX_HE_SIG_B2_OFDMA_0_HE_SIG_B2_OFDMA_INFO_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_OFFSET \
-	PHYRX_HE_SIG_B2_OFDMA_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_STA_ID_OFFSET
-#define UNIFIED_PHYRX_RSSI_LEGACY_3_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET \
-	PHYRX_RSSI_LEGACY_PRE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_OFFSET
-#define UNIFIED_PHYRX_RSSI_LEGACY_19_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET \
-	PHYRX_RSSI_LEGACY_PREAMBLE_RSSI_INFO_DETAILS_RSSI_PRI20_CHAIN0_OFFSET
 #define UNIFIED_RX_MPDU_START_0_RX_MPDU_INFO_RX_MPDU_INFO_DETAILS_OFFSET \
 	RX_MPDU_START_RX_MPDU_INFO_DETAILS_RXPCU_MPDU_FILTER_IN_CATEGORY_OFFSET
 #define UNIFIED_RX_MSDU_LINK_8_RX_MSDU_DETAILS_MSDU_0_OFFSET \
@@ -127,6 +99,8 @@
 #define UNIFIED_WBM_RELEASE_RING_6_TX_RATE_STATS_INFO_TX_RATE_STATS_LSB \
 	WBM_RELEASE_RING_TX_TX_RATE_STATS_PPDU_TRANSMISSION_TSF_LSB
 
+#include "hal_be_api_mon.h"
+
 #ifdef CONFIG_WIFI_EMULATION_WIFI_3_0
 #define CMEM_REG_BASE 0x0010e000