qcacmn: Add hal_rx_msdu_end_l3_hdr_padding_get API
Implement hal_rx_msdu_end_l3_hdr_padding_get API based on the chipset as the macro to retrieve sa_idx value is chipset dependent. Change-Id: Ice1fc2d70e339dc1d80fa6f34f37c5a7aa074be5 CRs-Fixed: 2522133
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nshrivas

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43d563277d
commit
f05b2ae5c2
@@ -103,10 +103,29 @@ static uint32_t hal_rx_desc_is_first_msdu_6490(void *hw_desc_addr)
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return HAL_RX_GET(msdu_end, RX_MSDU_END_10, FIRST_MSDU);
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}
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/**
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* hal_rx_msdu_end_l3_hdr_padding_get_6490(): API to get_6490 the
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* l3_header padding from rx_msdu_end TLV
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*
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* @ buf: pointer to the start of RX PKT TLV headers
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* Return: number of l3 header padding bytes
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*/
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static uint32_t hal_rx_msdu_end_l3_hdr_padding_get_6490(uint8_t *buf)
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{
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struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
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struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
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uint32_t l3_header_padding;
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l3_header_padding = HAL_RX_MSDU_END_L3_HEADER_PADDING_GET(msdu_end);
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return l3_header_padding;
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}
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struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
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/* rx */
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hal_rx_get_rx_fragment_number_6490,
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hal_rx_msdu_end_da_is_mcbc_get_6490,
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hal_rx_msdu_end_sa_is_valid_get_6490,
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hal_rx_desc_is_first_msdu_6490,
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hal_rx_msdu_end_l3_hdr_padding_get_6490,
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};
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@@ -39,3 +39,9 @@
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RX_MSDU_END_11_SA_IDX_OFFSET)), \
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RX_MSDU_END_11_SA_IDX_MASK, \
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RX_MSDU_END_11_SA_IDX_LSB))
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#define HAL_RX_MSDU_END_L3_HEADER_PADDING_GET(_rx_msdu_end) \
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(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
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RX_MSDU_END_10_L3_HEADER_PADDING_OFFSET)), \
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RX_MSDU_END_10_L3_HEADER_PADDING_MASK, \
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RX_MSDU_END_10_L3_HEADER_PADDING_LSB))
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