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Merge "disp: msm: sde: fix cache controller node parse logic" into display-kernel.lnx.5.4

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2020-07-21 12:59:58 -07:00
committed by Gerrit - the friendly Code Review server
parent 7c4ab87985 d141d184e6
commit f04391273d
2 changed files with 11 additions and 21 deletions
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30
msm/sde/sde_hw_catalog.c
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@@ -470,11 +470,6 @@ enum {
UIDLE_PROP_MAX, UIDLE_PROP_MAX,
}; };
enum {
CACHE_CONTROLLER,
CACHE_CONTROLLER_PROP_MAX,
};
enum { enum {
REG_DMA_OFF, REG_DMA_OFF,
REG_DMA_ID, REG_DMA_ID,
@@ -872,10 +867,6 @@ static struct sde_prop_type uidle_prop[] = {
{UIDLE_LEN, "qcom,sde-uidle-size", false, PROP_TYPE_U32}, {UIDLE_LEN, "qcom,sde-uidle-size", false, PROP_TYPE_U32},
}; };
static struct sde_prop_type cache_prop[] = {
{CACHE_CONTROLLER, "qcom,llcc-v2", false, PROP_TYPE_NODE},
};
static struct sde_prop_type reg_dma_prop[REG_DMA_PROP_MAX] = { static struct sde_prop_type reg_dma_prop[REG_DMA_PROP_MAX] = {
[REG_DMA_OFF] = {REG_DMA_OFF, "qcom,sde-reg-dma-off", false, [REG_DMA_OFF] = {REG_DMA_OFF, "qcom,sde-reg-dma-off", false,
PROP_TYPE_U32_ARRAY}, PROP_TYPE_U32_ARRAY},
@@ -3225,25 +3216,22 @@ static int sde_cache_parse_dt(struct device_node *np,
struct platform_device *pdev; struct platform_device *pdev;
struct of_phandle_args phargs; struct of_phandle_args phargs;
struct sde_sc_cfg *sc_cfg = sde_cfg->sc_cfg; struct sde_sc_cfg *sc_cfg = sde_cfg->sc_cfg;
struct sde_dt_props *props; struct device_node *llcc_node;
int rc = 0; int rc = 0;
u32 off_count;
if (!sde_cfg) { if (!sde_cfg) {
SDE_ERROR("invalid argument\n"); SDE_ERROR("invalid argument\n");
return -EINVAL; return -EINVAL;
} }
props = sde_get_dt_props(np, CACHE_CONTROLLER_PROP_MAX, cache_prop, if (!sde_cfg->syscache_supported)
ARRAY_SIZE(cache_prop), &off_count); return 0;
if (IS_ERR_OR_NULL(props))
return PTR_ERR(props);
if (!props->exists[CACHE_CONTROLLER]) { llcc_node = of_find_node_by_name(NULL, "cache-controller");
SDE_DEBUG("cache controller missing, will disable img cache:%d", if (!llcc_node ||
props->exists[CACHE_CONTROLLER]); (!of_device_is_compatible(llcc_node, "qcom,llcc-v2"))) {
rc = 0; SDE_DEBUG("cache controller missing, will disable img cache\n");
goto end; return 0;
} }
slice = llcc_slice_getd(LLCC_DISP); slice = llcc_slice_getd(LLCC_DISP);
@@ -3308,7 +3296,6 @@ static int sde_cache_parse_dt(struct device_node *np,
cleanup: cleanup:
of_node_put(phargs.np); of_node_put(phargs.np);
end: end:
sde_put_dt_props(props);
return rc; return rc;
} }
@@ -4739,6 +4726,7 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
sde_cfg->dither_luma_mode_support = true; sde_cfg->dither_luma_mode_support = true;
sde_cfg->mdss_hw_block_size = 0x158; sde_cfg->mdss_hw_block_size = 0x158;
sde_cfg->has_trusted_vm_support = true; sde_cfg->has_trusted_vm_support = true;
sde_cfg->syscache_supported = true;
} else if (IS_HOLI_TARGET(hw_rev)) { } else if (IS_HOLI_TARGET(hw_rev)) {
sde_cfg->has_cwb_support = false; sde_cfg->has_cwb_support = false;
sde_cfg->has_qsync = true; sde_cfg->has_qsync = true;

2
msm/sde/sde_hw_catalog.h
View File

@@ -1422,6 +1422,7 @@ struct sde_perf_cfg {
* @qseed_sw_lib_rev qseed sw library type supporting the qseed hw * @qseed_sw_lib_rev qseed sw library type supporting the qseed hw
* @qseed_hw_version qseed hw version of the target * @qseed_hw_version qseed hw version of the target
* @sc_cfg: system cache configuration * @sc_cfg: system cache configuration
* @syscache_supported Flag to indicate if sys cache support is enabled
* @uidle_cfg Settings for uidle feature * @uidle_cfg Settings for uidle feature
* @sui_misr_supported indicate if secure-ui-misr is supported * @sui_misr_supported indicate if secure-ui-misr is supported
* @sui_block_xin_mask mask of all the xin-clients to be blocked during * @sui_block_xin_mask mask of all the xin-clients to be blocked during
@@ -1494,6 +1495,7 @@ struct sde_mdss_cfg {
u32 qseed_hw_version; u32 qseed_hw_version;
struct sde_sc_cfg sc_cfg[SDE_SYS_CACHE_MAX]; struct sde_sc_cfg sc_cfg[SDE_SYS_CACHE_MAX];
bool syscache_supported;
bool sui_misr_supported; bool sui_misr_supported;
u32 sui_block_xin_mask; u32 sui_block_xin_mask;