From eee37dab3fcc57adf8bd60e13cbdd1e42dd0351f Mon Sep 17 00:00:00 2001
From: Rakesh Pillai <pillair@codeaurora.org>
Date: Tue, 7 Apr 2020 00:02:23 +0530
Subject: [PATCH] qcacmn: Add dequeue value in delayed register write entry

The delayed register write for srngs will have
the value of the HP/TP at the time of enqueue,
but the final value which is written to the
hp_addr/tp_addr will be determined based on
HP/TP value at the time of dequeue of the
entry for a particular srng.

Hence to know what was the exact value which
was written to the HP/TP address, add one more
element in the delayed register write entry.
This element will contain the value of the
HP/TP which was actually written to the address.

Change-Id: I73e592611fa50b106da1deda06b839cf4fbe2126
CRs-Fixed: 2658331
---
 hal/wifi3.0/hal_internal.h |  6 ++++--
 hal/wifi3.0/hal_srng.c     | 21 ++++++++++++---------
 2 files changed, 16 insertions(+), 11 deletions(-)

diff --git a/hal/wifi3.0/hal_internal.h b/hal/wifi3.0/hal_internal.h
index 0da2824157..2a7d86a876 100644
--- a/hal/wifi3.0/hal_internal.h
+++ b/hal/wifi3.0/hal_internal.h
@@ -233,7 +233,8 @@ typedef struct hal_ring_handle *hal_ring_handle_t;
  * struct hal_reg_write_q_elem - delayed register write queue element
  * @srng: hal_srng queued for a delayed write
  * @addr: iomem address of the register
- * @val: register value at the time of delayed write enqueue
+ * @enqueue_val: register value at the time of delayed write enqueue
+ * @dequeue_val: register value at the time of delayed write dequeue
  * @valid: whether this entry is valid or not
  * @enqueue_time: enqueue time (qdf_log_timestamp)
  * @dequeue_time: dequeue time (qdf_log_timestamp)
@@ -241,7 +242,8 @@ typedef struct hal_ring_handle *hal_ring_handle_t;
 struct hal_reg_write_q_elem {
 	struct hal_srng *srng;
 	void __iomem *addr;
-	uint32_t val;
+	uint32_t enqueue_val;
+	uint32_t dequeue_val;
 	uint8_t valid;
 	qdf_time_t enqueue_time;
 	qdf_time_t dequeue_time;
diff --git a/hal/wifi3.0/hal_srng.c b/hal/wifi3.0/hal_srng.c
index c073e9ec6f..d15eaf37ce 100644
--- a/hal/wifi3.0/hal_srng.c
+++ b/hal/wifi3.0/hal_srng.c
@@ -390,14 +390,17 @@ static void hal_process_reg_write_q_elem(struct hal_soc *hal,
 	srng->reg_write_in_progress = false;
 	srng->wstats.dequeues++;
 
-	if (srng->ring_dir == HAL_SRNG_SRC_RING)
+	if (srng->ring_dir == HAL_SRNG_SRC_RING) {
+		q_elem->dequeue_val = srng->u.src_ring.hp;
 		hal_write_address_32_mb(hal,
 					srng->u.src_ring.hp_addr,
 					srng->u.src_ring.hp, false);
-	else
+	} else {
+		q_elem->dequeue_val = srng->u.dst_ring.tp;
 		hal_write_address_32_mb(hal,
 					srng->u.dst_ring.tp_addr,
 					srng->u.dst_ring.tp, false);
+	}
 
 	SRNG_UNLOCK(&srng->lock);
 }
@@ -458,17 +461,17 @@ static void hal_reg_write_work(void *arg)
 		delta_us = qdf_log_timestamp_to_usecs(q_elem->dequeue_time -
 						      q_elem->enqueue_time);
 		hal_reg_write_fill_sched_delay_hist(hal, delta_us);
-		hal_verbose_debug("read_idx %u srng 0x%x, addr 0x%pK val %u sched delay %llu us",
-				  hal->read_idx,
-				  q_elem->srng->ring_id,
-				  q_elem->addr,
-				  q_elem->val,
-				  delta_us);
 
 		hal->stats.wstats.dequeues++;
 		qdf_atomic_dec(&hal->stats.wstats.q_depth);
 
 		hal_process_reg_write_q_elem(hal, q_elem);
+		hal_verbose_debug("read_idx %u srng 0x%x, addr 0x%pK dequeue_val %u sched delay %llu us",
+				  hal->read_idx,
+				  q_elem->srng->ring_id,
+				  q_elem->addr,
+				  q_elem->dequeue_val,
+				  delta_us);
 
 		q_elem->valid = 0;
 		hal->read_idx = (hal->read_idx + 1) &
@@ -538,7 +541,7 @@ static void hal_reg_write_enqueue(struct hal_soc *hal_soc,
 
 	q_elem->srng = srng;
 	q_elem->addr = addr;
-	q_elem->val = value;
+	q_elem->enqueue_val = value;
 	q_elem->enqueue_time = qdf_get_log_timestamp();
 
 	q_elem->valid = true;