From eed1c6df2cea88a4e01a1c53b1012b16119b6a91 Mon Sep 17 00:00:00 2001 From: Prabhanjan Kandula Date: Thu, 19 Mar 2020 10:26:41 -0700 Subject: [PATCH] disp: msm: sde: enable pu checks only if main feature is set This change fixes feature specific partial update checks in atomic check by enabling partial update specific features only if respective core feature is enabled. Change-Id: If3678a52fa0f8d9e1d714a662601e5628e1637d2 Signed-off-by: Prabhanjan Kandula --- msm/sde/sde_color_processing.c | 22 ++++++++++++++++++++-- msm/sde/sde_crtc.h | 3 +++ 2 files changed, 23 insertions(+), 2 deletions(-) diff --git a/msm/sde/sde_color_processing.c b/msm/sde/sde_color_processing.c index 2ba5089287..de4fd87c49 100644 --- a/msm/sde/sde_color_processing.c +++ b/msm/sde/sde_color_processing.c @@ -204,6 +204,20 @@ static struct sde_kms *get_kms(struct drm_crtc *crtc) return to_sde_kms(priv->kms); } +static void update_pu_feature_enable(struct sde_crtc *sde_crtc, + u32 feature, bool enable) +{ + if (!sde_crtc || feature > SDE_CP_CRTC_MAX_PU_FEATURES) { + DRM_ERROR("invalid args feature %d\n", feature); + return; + } + + if (enable) + sde_crtc->cp_pu_feature_mask |= BIT(feature); + else + sde_crtc->cp_pu_feature_mask &= ~BIT(feature); +} + static int set_dspp_vlut_feature(struct sde_hw_dspp *hw_dspp, struct sde_hw_cp_cfg *hw_cfg, struct sde_crtc *hw_crtc) @@ -741,6 +755,8 @@ static int set_rc_mask_feature(struct sde_hw_dspp *hw_dspp, } } + update_pu_feature_enable(sde_crtc, SDE_CP_CRTC_DSPP_RC_PU, + hw_cfg->payload != NULL); exit: return ret; } @@ -1642,7 +1658,8 @@ static int sde_cp_crtc_check_pu_features(struct drm_crtc *crtc) feature_wrapper check_pu_feature = check_crtc_pu_feature_wrappers[i]; - if (!check_pu_feature) + if (!check_pu_feature || + !(sde_crtc->cp_pu_feature_mask & BIT(i))) continue; for (j = 0; j < hw_cfg.num_of_mixers; j++) { @@ -1801,7 +1818,8 @@ static int sde_cp_crtc_set_pu_features(struct drm_crtc *crtc, bool *need_flush) feature_wrapper set_pu_feature = set_crtc_pu_feature_wrappers[i]; - if (!set_pu_feature) + if (!set_pu_feature || + !(sde_crtc->cp_pu_feature_mask & BIT(i))) continue; for (j = 0; j < hw_cfg.num_of_mixers; j++) { diff --git a/msm/sde/sde_crtc.h b/msm/sde/sde_crtc.h index c5bbf06d68..c7a04d9a5c 100644 --- a/msm/sde/sde_crtc.h +++ b/msm/sde/sde_crtc.h @@ -245,6 +245,7 @@ struct sde_crtc_misr_info { * @cur_perf : current performance committed to clock/bandwidth driver * @plane_mask_old: keeps track of the planes used in the previous commit * @frame_trigger_mode: frame trigger mode + * @cp_pu_feature_mask: mask indicating cp feature enable for partial update * @ltm_buffer_cnt : number of ltm buffers * @ltm_buffers : struct stores ltm buffer related data * @ltm_buf_free : list of LTM buffers that are available @@ -323,6 +324,8 @@ struct sde_crtc { struct drm_property_blob *hist_blob; enum frame_trigger_mode_type frame_trigger_mode; + u32 cp_pu_feature_mask; + u32 ltm_buffer_cnt; struct sde_ltm_buffer *ltm_buffers[LTM_BUFFER_SIZE]; struct list_head ltm_buf_free;