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disp: msm: sde: correct pp block allocation during dcwb dither programming

In mid and low tier targets there is reduction in pingpong
blocks and static allocation of pingpong blocks with respect
to dedicated cwb ids causes mismatch failures and leads to
wb kickoff timeouts. This change corrects the pingpong block
id allocation for dedicated cwb in dither control register
programming path.

Change-Id: I98c06a2c3b49c7ea0556dcf1a921969c300fed16
Signed-off-by: Mahadevan <[email protected]>
Mahadevan il y a 3 ans
Parent
commit
ede3f587f7
1 fichiers modifiés avec 4 ajouts et 7 suppressions
  1. 4 7
      msm/sde/sde_hw_wb.c

+ 4 - 7
msm/sde/sde_hw_wb.c

@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 // SPDX-License-Identifier: GPL-2.0-only
 /*
 /*
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
  * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  */
  */
 
 
@@ -421,12 +422,7 @@ static void sde_hw_wb_program_cwb_dither_ctrl(struct sde_hw_wb *ctx,
 		return;
 		return;
 	}
 	}
 
 
-	/* map to pp_id from dcwb id */
-	if (dcwb_idx == DCWB_0) {
-		pp_id = PINGPONG_CWB_0;
-	} else if (dcwb_idx == DCWB_1) {
-		pp_id = PINGPONG_CWB_1;
-	} else {
+	if (dcwb_idx >= DCWB_MAX) {
 		DRM_ERROR("Invalid dcwb_idx %d\n", dcwb_idx);
 		DRM_ERROR("Invalid dcwb_idx %d\n", dcwb_idx);
 		return;
 		return;
 	}
 	}
@@ -434,7 +430,8 @@ static void sde_hw_wb_program_cwb_dither_ctrl(struct sde_hw_wb *ctx,
 	/* find pp blk with pp_id */
 	/* find pp blk with pp_id */
 	for (idx = 0; idx < DCWB_MAX - DCWB_0; ++idx) {
 	for (idx = 0; idx < DCWB_MAX - DCWB_0; ++idx) {
 		pp = &ctx->dcwb_pp_hw[idx];
 		pp = &ctx->dcwb_pp_hw[idx];
-		if (pp && pp->idx == pp_id) {
+		if (pp && dcwb_idx == idx + 1) {
+			pp_id = pp->idx;
 			found = true;
 			found = true;
 			break;
 			break;
 		}
 		}