Update drivers to be CASA compliant

Change-Id: I88e0e03d839a2f9c702ef9e62e0dfb03c6c139e5
Signed-off-by: Taha Azzaoui <[email protected]>

asoc/Kbuild

@@ -150,46 +150,14 @@ ifdef CONFIG_SND_SOC_SA8155
 	MACHINE_OBJS += sa8155.o
 endif
 
-ifdef CONFIG_SND_SOC_CPE
-	CPE_LSM_OBJS += msm-cpe-lsm.o
-endif
-
 ifdef CONFIG_SND_SOC_QDSP6V2
-	PLATFORM_OBJS += msm-audio-effects-q6-v2.o
-	PLATFORM_OBJS += msm-compress-q6-v2.o
-	PLATFORM_OBJS += msm-dai-fe.o
 	PLATFORM_OBJS += msm-dai-q6-hdmi-v2.o
 	PLATFORM_OBJS += msm-dai-q6-v2.o
-	PLATFORM_OBJS += msm-dai-stub-v2.o
-	PLATFORM_OBJS += msm-lsm-client.o
-	PLATFORM_OBJS += msm-pcm-afe-v2.o
-	PLATFORM_OBJS += msm-pcm-dtmf-v2.o
-	PLATFORM_OBJS += msm-pcm-hostless.o
-	PLATFORM_OBJS += msm-pcm-host-voice-v2.o
-	PLATFORM_OBJS += msm-pcm-loopback-v2.o
-	PLATFORM_OBJS += msm-pcm-q6-noirq.o
-	PLATFORM_OBJS += msm-pcm-q6-v2.o
-	PLATFORM_OBJS += msm-pcm-routing-v2.o
-	PLATFORM_OBJS += msm-pcm-voice-v2.o
-	PLATFORM_OBJS += msm-pcm-voip-v2.o
-	PLATFORM_OBJS += msm-transcode-loopback-q6-v2.o
 	PLATFORM_OBJS += platform_init.o
 endif
 ifdef CONFIG_WCD9XXX_CODEC_CORE
 	PLATFORM_OBJS += msm-dai-slim.o
 endif
-ifdef CONFIG_DOLBY_DS2
-	PLATFORM_OBJS += msm-ds2-dap-config.o
-endif
-ifdef CONFIG_DOLBY_LICENSE
-	PLATFORM_OBJS += msm-ds2-dap-config.o
-endif
-ifdef CONFIG_SND_HWDEP_ROUTING
-	PLATFORM_OBJS += msm-pcm-routing-devdep.o
-endif
-ifdef CONFIG_QTI_PP
-	PLATFORM_OBJS += msm-qti-pp-config.o
-endif
 
 LINUX_INC +=	-Iinclude/linux
 
@@ -263,8 +231,5 @@ machine_dlkm-y := $(MACHINE_OBJS)
 obj-$(CONFIG_SND_SOC_SA8155) += machine_dlkm.o
 machine_dlkm-y := $(MACHINE_OBJS)
 
-obj-$(CONFIG_SND_SOC_CPE) += cpe_lsm_dlkm.o
-cpe_lsm_dlkm-y := $(CPE_LSM_OBJS)
-
 # inject some build related information
 DEFINES += -DBUILD_TIMESTAMP=\"$(shell date -u +'%Y-%m-%dT%H:%M:%SZ')\"

asoc/codecs/audio-ext-clk-up.c

@@ -1,5 +1,5 @@
 // SPDX-License-Identifier: GPL-2.0-only
-/* Copyright (c) 2015-2019, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2015-2020, The Linux Foundation. All rights reserved.
  */
 
 #include <linux/kernel.h>
@@ -13,10 +13,13 @@
 #include "../../../drivers/clk/qcom/common.h"
 #include <linux/pinctrl/consumer.h>
 #include <linux/platform_device.h>
+#include <dsp/apr_audio-v2.h>
 #include <dt-bindings/clock/qcom,audio-ext-clk.h>
-#include <dsp/q6afe-v2.h>
+#ifdef CONFIG_AUDIO_PRM
+#include <dsp/audio_prm.h>
+#else
 #include "audio-ext-clk-up.h"
-
+#endif
 enum {
 	AUDIO_EXT_CLK_PMI,
 	AUDIO_EXT_CLK_LNBB2,
@@ -51,6 +54,9 @@ struct audio_ext_clk_priv {
 	struct device *dev;
 	int clk_src;
 	struct afe_clk_set clk_cfg;
+#ifdef CONFIG_AUDIO_PRM
+	struct clk_cfg prm_clk_cfg;
+#endif
 	struct audio_ext_clk audio_clk;
 	const char *clk_name;
 	uint32_t lpass_core_hwvote_client_handle;
@@ -69,16 +75,19 @@ static int audio_ext_clk_prepare(struct clk_hw *hw)
 	int ret;
 
 	if ((clk_priv->clk_src >= AUDIO_EXT_CLK_LPASS) &&
-		(clk_priv->clk_src < AUDIO_EXT_CLK_LPASS_MAX))  {
-		clk_priv->clk_cfg.enable = 1;
-		trace_printk("%s: vote for %d clock\n",
-			__func__, clk_priv->clk_src);
+		(clk_priv->clk_src < AUDIO_EXT_CLK_LPASS_MAX) && !clk_priv->clk_cfg.enable)  {
+#ifdef CONFIG_AUDIO_PRM
+	    pr_debug("%s: clk_id %d ",__func__, clk_priv->prm_clk_cfg.clk_id);
+		ret = audio_prm_set_lpass_clk_cfg(&clk_priv->prm_clk_cfg,1);
+#else
 		ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &clk_priv->clk_cfg);
+#endif
 		if (ret < 0) {
 			pr_err_ratelimited("%s afe_set_digital_codec_core_clock failed\n",
 				__func__);
 			return ret;
 		}
+		clk_priv->clk_cfg.enable = 1;
 	}
 
 	if (pnctrl_info->pinctrl) {
@@ -115,9 +124,13 @@ static void audio_ext_clk_unprepare(struct clk_hw *hw)
 	if ((clk_priv->clk_src >= AUDIO_EXT_CLK_LPASS) &&
 		(clk_priv->clk_src < AUDIO_EXT_CLK_LPASS_MAX))  {
 		clk_priv->clk_cfg.enable = 0;
-		trace_printk("%s: unvote for %d clock\n",
-			__func__, clk_priv->clk_src);
+#ifdef CONFIG_AUDIO_PRM
+		pr_debug("%s: clk_id %d",__func__,
+				clk_priv->prm_clk_cfg.clk_id);
+		ret = audio_prm_set_lpass_clk_cfg(&clk_priv->prm_clk_cfg,0);
+#else
 		ret = afe_set_lpass_clk_cfg(IDX_RSVD_3, &clk_priv->clk_cfg);
+#endif
 		if (ret < 0)
 			pr_err_ratelimited("%s: afe_set_lpass_clk_cfg failed, ret = %d\n",
 				__func__, ret);
@@ -147,6 +160,7 @@ static u8 audio_ext_clk_get_parent(struct clk_hw *hw)
 
 static int lpass_hw_vote_prepare(struct clk_hw *hw)
 {
+#if 0
 	struct audio_ext_clk_priv *clk_priv = to_audio_clk(hw);
 	int ret;
 
@@ -175,12 +189,13 @@ static int lpass_hw_vote_prepare(struct clk_hw *hw)
 			return ret;
 		}
 	}
-
+#endif
 	return 0;
 }
 
 static void lpass_hw_vote_unprepare(struct clk_hw *hw)
 {
+#if 0
 	struct audio_ext_clk_priv *clk_priv = to_audio_clk(hw);
 	int ret = 0;
 
@@ -207,6 +222,7 @@ static void lpass_hw_vote_unprepare(struct clk_hw *hw)
 				__func__, ret);
 		}
 	}
+#endif
 }
 
 static const struct clk_ops audio_ext_clk_ops = {
@@ -542,19 +558,38 @@ static int audio_ref_clk_probe(struct platform_device *pdev)
 	clk_priv->clk_cfg.clk_freq_in_hz = Q6AFE_LPASS_OSR_CLK_9_P600_MHZ;
 	clk_priv->clk_cfg.clk_attri = Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO;
 
+#ifdef CONFIG_AUDIO_PRM
+	/* Init prm clk cfg default values */
+	clk_priv->prm_clk_cfg.clk_id = Q6AFE_LPASS_CLK_ID_SPEAKER_I2S_OSR;
+	clk_priv->prm_clk_cfg.clk_freq_in_hz = Q6AFE_LPASS_OSR_CLK_9_P600_MHZ;
+	clk_priv->prm_clk_cfg.clk_attri = Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO;
+	clk_priv->prm_clk_cfg.clk_root = 0;
+#endif
+
 	ret = of_property_read_u32(pdev->dev.of_node,
 			"qcom,codec-lpass-ext-clk-freq",
 			&clk_freq);
-	if (!ret)
+	if (!ret) {
 		clk_priv->clk_cfg.clk_freq_in_hz = clk_freq;
+#ifdef CONFIG_AUDIO_PRM
+		clk_priv->prm_clk_cfg.clk_freq_in_hz = clk_freq;
+#endif
+	}
 
 	ret = of_property_read_u32(pdev->dev.of_node,
 			"qcom,codec-lpass-clk-id",
 			&clk_id);
-	if (!ret)
+	if (!ret) {
 		clk_priv->clk_cfg.clk_id = clk_id;
+#ifdef CONFIG_AUDIO_PRM
+		clk_priv->prm_clk_cfg.clk_id = clk_id;
+		dev_info(&pdev->dev, "%s: ext-clk freq: %d, lpass clk_id: %d, clk_src: %d\n",
+			__func__, clk_priv->prm_clk_cfg.clk_freq_in_hz,
+			clk_priv->prm_clk_cfg.clk_id, clk_priv->clk_src);
+#endif
+	}
 
-	dev_dbg(&pdev->dev, "%s: ext-clk freq: %d, lpass clk_id: %d, clk_src: %d\n",
+	dev_info(&pdev->dev, "%s: ext-clk freq: %d, lpass clk_id: %d, clk_src: %d\n",
 			__func__, clk_priv->clk_cfg.clk_freq_in_hz,
 			clk_priv->clk_cfg.clk_id, clk_priv->clk_src);
 	platform_set_drvdata(pdev, clk_priv);

asoc/msm-audio-defs-v2.h

@@ -0,0 +1,502 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
+ */
+#ifndef _MSM_AUDIO_DEFS_V2_H
+#define _MSM_AUDIO_DEFS_V2_H
+
+/*
+ * These names are used by HAL to specify the BE. If any changes are
+ * made to the string names or the max name length corresponding
+ * changes need to be made in the HAL to ensure they still match.
+ */
+#define LPASS_BE_NAME_MAX_LENGTH 24
+#define LPASS_BE_PRI_I2S_RX "PRIMARY_I2S_RX"
+#define LPASS_BE_PRI_I2S_TX "PRIMARY_I2S_TX"
+#define LPASS_BE_SLIMBUS_0_RX "SLIMBUS_0_RX"
+#define LPASS_BE_SLIMBUS_0_TX "SLIMBUS_0_TX"
+#define LPASS_BE_HDMI "HDMI"
+#define LPASS_BE_DISPLAY_PORT "DISPLAY_PORT"
+#define LPASS_BE_DISPLAY_PORT1 "DISPLAY_PORT1"
+#define LPASS_BE_INT_BT_SCO_RX "INT_BT_SCO_RX"
+#define LPASS_BE_INT_BT_SCO_TX "INT_BT_SCO_TX"
+#define LPASS_BE_INT_BT_A2DP_RX "INT_BT_A2DP_RX"
+#define LPASS_BE_INT_FM_RX "INT_FM_RX"
+#define LPASS_BE_INT_FM_TX "INT_FM_TX"
+#define LPASS_BE_AFE_PCM_RX "RT_PROXY_DAI_001_RX"
+#define LPASS_BE_AFE_PCM_TX "RT_PROXY_DAI_002_TX"
+#define LPASS_BE_AUXPCM_RX "AUX_PCM_RX"
+#define LPASS_BE_AUXPCM_TX "AUX_PCM_TX"
+#define LPASS_BE_SEC_AUXPCM_RX "SEC_AUX_PCM_RX"
+#define LPASS_BE_SEC_AUXPCM_TX "SEC_AUX_PCM_TX"
+#define LPASS_BE_TERT_AUXPCM_RX "TERT_AUX_PCM_RX"
+#define LPASS_BE_TERT_AUXPCM_TX "TERT_AUX_PCM_TX"
+#define LPASS_BE_QUAT_AUXPCM_RX "QUAT_AUX_PCM_RX"
+#define LPASS_BE_QUAT_AUXPCM_TX "QUAT_AUX_PCM_TX"
+#define LPASS_BE_QUIN_AUXPCM_RX "QUIN_AUX_PCM_RX"
+#define LPASS_BE_QUIN_AUXPCM_TX "QUIN_AUX_PCM_TX"
+#define LPASS_BE_SEN_AUXPCM_RX "SEN_AUX_PCM_RX"
+#define LPASS_BE_SEN_AUXPCM_TX "SEN_AUX_PCM_TX"
+#define LPASS_BE_VOICE_PLAYBACK_TX "VOICE_PLAYBACK_TX"
+#define LPASS_BE_VOICE2_PLAYBACK_TX "VOICE2_PLAYBACK_TX"
+#define LPASS_BE_INCALL_RECORD_RX "INCALL_RECORD_RX"
+#define LPASS_BE_INCALL_RECORD_TX "INCALL_RECORD_TX"
+#define LPASS_BE_SEC_I2S_RX "SECONDARY_I2S_RX"
+#define LPASS_BE_PRI_SPDIF_RX "PRI_SPDIF_RX"
+#define LPASS_BE_PRI_SPDIF_TX "PRI_SPDIF_TX"
+#define LPASS_BE_SEC_SPDIF_RX "SEC_SPDIF_RX"
+#define LPASS_BE_SEC_SPDIF_TX "SEC_SPDIF_TX"
+
+#define LPASS_BE_MI2S_RX "MI2S_RX"
+#define LPASS_BE_MI2S_TX "MI2S_TX"
+#define LPASS_BE_QUAT_MI2S_RX "QUAT_MI2S_RX"
+#define LPASS_BE_QUAT_MI2S_TX "QUAT_MI2S_TX"
+#define LPASS_BE_SEC_MI2S_RX "SEC_MI2S_RX"
+#define LPASS_BE_SEC_MI2S_RX_SD1 "SEC_MI2S_RX_SD1"
+#define LPASS_BE_SEC_MI2S_TX "SEC_MI2S_TX"
+#define LPASS_BE_PRI_MI2S_RX "PRI_MI2S_RX"
+#define LPASS_BE_PRI_MI2S_TX "PRI_MI2S_TX"
+#define LPASS_BE_TERT_MI2S_RX "TERT_MI2S_RX"
+#define LPASS_BE_TERT_MI2S_TX "TERT_MI2S_TX"
+#define LPASS_BE_AUDIO_I2S_RX "AUDIO_I2S_RX"
+#define LPASS_BE_STUB_RX "STUB_RX"
+#define LPASS_BE_STUB_TX "STUB_TX"
+#define LPASS_BE_SLIMBUS_1_RX "SLIMBUS_1_RX"
+#define LPASS_BE_SLIMBUS_1_TX "SLIMBUS_1_TX"
+#define LPASS_BE_STUB_1_TX "STUB_1_TX"
+#define LPASS_BE_SLIMBUS_2_RX "SLIMBUS_2_RX"
+#define LPASS_BE_SLIMBUS_2_TX "SLIMBUS_2_TX"
+#define LPASS_BE_SLIMBUS_3_RX "SLIMBUS_3_RX"
+#define LPASS_BE_SLIMBUS_3_TX "SLIMBUS_3_TX"
+#define LPASS_BE_SLIMBUS_4_RX "SLIMBUS_4_RX"
+#define LPASS_BE_SLIMBUS_4_TX "SLIMBUS_4_TX"
+#define LPASS_BE_SLIMBUS_TX_VI "SLIMBUS_TX_VI"
+#define LPASS_BE_SLIMBUS_5_RX "SLIMBUS_5_RX"
+#define LPASS_BE_SLIMBUS_5_TX "SLIMBUS_5_TX"
+#define LPASS_BE_SLIMBUS_6_RX "SLIMBUS_6_RX"
+#define LPASS_BE_SLIMBUS_6_TX "SLIMBUS_6_TX"
+#define LPASS_BE_QUIN_MI2S_RX "QUIN_MI2S_RX"
+#define LPASS_BE_QUIN_MI2S_TX "QUIN_MI2S_TX"
+#define LPASS_BE_SENARY_MI2S_TX "SENARY_MI2S_TX"
+#define LPASS_BE_SENARY_MI2S_RX "SENARY_MI2S_RX"
+
+#define LPASS_BE_PRI_META_MI2S_RX "PRI_META_MI2S_RX"
+#define LPASS_BE_SEC_META_MI2S_RX "SEC_META_MI2S_RX"
+
+#define LPASS_BE_PRI_TDM_RX_0 "PRI_TDM_RX_0"
+#define LPASS_BE_PRI_TDM_TX_0 "PRI_TDM_TX_0"
+#define LPASS_BE_PRI_TDM_RX_1 "PRI_TDM_RX_1"
+#define LPASS_BE_PRI_TDM_TX_1 "PRI_TDM_TX_1"
+#define LPASS_BE_PRI_TDM_RX_2 "PRI_TDM_RX_2"
+#define LPASS_BE_PRI_TDM_TX_2 "PRI_TDM_TX_2"
+#define LPASS_BE_PRI_TDM_RX_3 "PRI_TDM_RX_3"
+#define LPASS_BE_PRI_TDM_TX_3 "PRI_TDM_TX_3"
+#define LPASS_BE_PRI_TDM_RX_4 "PRI_TDM_RX_4"
+#define LPASS_BE_PRI_TDM_TX_4 "PRI_TDM_TX_4"
+#define LPASS_BE_PRI_TDM_RX_5 "PRI_TDM_RX_5"
+#define LPASS_BE_PRI_TDM_TX_5 "PRI_TDM_TX_5"
+#define LPASS_BE_PRI_TDM_RX_6 "PRI_TDM_RX_6"
+#define LPASS_BE_PRI_TDM_TX_6 "PRI_TDM_TX_6"
+#define LPASS_BE_PRI_TDM_RX_7 "PRI_TDM_RX_7"
+#define LPASS_BE_PRI_TDM_TX_7 "PRI_TDM_TX_7"
+#define LPASS_BE_SEC_TDM_RX_0 "SEC_TDM_RX_0"
+#define LPASS_BE_SEC_TDM_TX_0 "SEC_TDM_TX_0"
+#define LPASS_BE_SEC_TDM_RX_1 "SEC_TDM_RX_1"
+#define LPASS_BE_SEC_TDM_TX_1 "SEC_TDM_TX_1"
+#define LPASS_BE_SEC_TDM_RX_2 "SEC_TDM_RX_2"
+#define LPASS_BE_SEC_TDM_TX_2 "SEC_TDM_TX_2"
+#define LPASS_BE_SEC_TDM_RX_3 "SEC_TDM_RX_3"
+#define LPASS_BE_SEC_TDM_TX_3 "SEC_TDM_TX_3"
+#define LPASS_BE_SEC_TDM_RX_4 "SEC_TDM_RX_4"
+#define LPASS_BE_SEC_TDM_TX_4 "SEC_TDM_TX_4"
+#define LPASS_BE_SEC_TDM_RX_5 "SEC_TDM_RX_5"
+#define LPASS_BE_SEC_TDM_TX_5 "SEC_TDM_TX_5"
+#define LPASS_BE_SEC_TDM_RX_6 "SEC_TDM_RX_6"
+#define LPASS_BE_SEC_TDM_TX_6 "SEC_TDM_TX_6"
+#define LPASS_BE_SEC_TDM_RX_7 "SEC_TDM_RX_7"
+#define LPASS_BE_SEC_TDM_TX_7 "SEC_TDM_TX_7"
+#define LPASS_BE_TERT_TDM_RX_0 "TERT_TDM_RX_0"
+#define LPASS_BE_TERT_TDM_TX_0 "TERT_TDM_TX_0"
+#define LPASS_BE_TERT_TDM_RX_1 "TERT_TDM_RX_1"
+#define LPASS_BE_TERT_TDM_TX_1 "TERT_TDM_TX_1"
+#define LPASS_BE_TERT_TDM_RX_2 "TERT_TDM_RX_2"
+#define LPASS_BE_TERT_TDM_TX_2 "TERT_TDM_TX_2"
+#define LPASS_BE_TERT_TDM_RX_3 "TERT_TDM_RX_3"
+#define LPASS_BE_TERT_TDM_TX_3 "TERT_TDM_TX_3"
+#define LPASS_BE_TERT_TDM_RX_4 "TERT_TDM_RX_4"
+#define LPASS_BE_TERT_TDM_TX_4 "TERT_TDM_TX_4"
+#define LPASS_BE_TERT_TDM_RX_5 "TERT_TDM_RX_5"
+#define LPASS_BE_TERT_TDM_TX_5 "TERT_TDM_TX_5"
+#define LPASS_BE_TERT_TDM_RX_6 "TERT_TDM_RX_6"
+#define LPASS_BE_TERT_TDM_TX_6 "TERT_TDM_TX_6"
+#define LPASS_BE_TERT_TDM_RX_7 "TERT_TDM_RX_7"
+#define LPASS_BE_TERT_TDM_TX_7 "TERT_TDM_TX_7"
+#define LPASS_BE_QUAT_TDM_RX_0 "QUAT_TDM_RX_0"
+#define LPASS_BE_QUAT_TDM_TX_0 "QUAT_TDM_TX_0"
+#define LPASS_BE_QUAT_TDM_RX_1 "QUAT_TDM_RX_1"
+#define LPASS_BE_QUAT_TDM_TX_1 "QUAT_TDM_TX_1"
+#define LPASS_BE_QUAT_TDM_RX_2 "QUAT_TDM_RX_2"
+#define LPASS_BE_QUAT_TDM_TX_2 "QUAT_TDM_TX_2"
+#define LPASS_BE_QUAT_TDM_RX_3 "QUAT_TDM_RX_3"
+#define LPASS_BE_QUAT_TDM_TX_3 "QUAT_TDM_TX_3"
+#define LPASS_BE_QUAT_TDM_RX_4 "QUAT_TDM_RX_4"
+#define LPASS_BE_QUAT_TDM_TX_4 "QUAT_TDM_TX_4"
+#define LPASS_BE_QUAT_TDM_RX_5 "QUAT_TDM_RX_5"
+#define LPASS_BE_QUAT_TDM_TX_5 "QUAT_TDM_TX_5"
+#define LPASS_BE_QUAT_TDM_RX_6 "QUAT_TDM_RX_6"
+#define LPASS_BE_QUAT_TDM_TX_6 "QUAT_TDM_TX_6"
+#define LPASS_BE_QUAT_TDM_RX_7 "QUAT_TDM_RX_7"
+#define LPASS_BE_QUAT_TDM_TX_7 "QUAT_TDM_TX_7"
+#define LPASS_BE_AFE_LOOPBACK_TX "AFE_LOOPBACK_TX"
+#define LPASS_BE_QUIN_TDM_RX_0 "QUIN_TDM_RX_0"
+#define LPASS_BE_QUIN_TDM_TX_0 "QUIN_TDM_TX_0"
+#define LPASS_BE_QUIN_TDM_RX_1 "QUIN_TDM_RX_1"
+#define LPASS_BE_QUIN_TDM_TX_1 "QUIN_TDM_TX_1"
+#define LPASS_BE_QUIN_TDM_RX_2 "QUIN_TDM_RX_2"
+#define LPASS_BE_QUIN_TDM_TX_2 "QUIN_TDM_TX_2"
+#define LPASS_BE_QUIN_TDM_RX_3 "QUIN_TDM_RX_3"
+#define LPASS_BE_QUIN_TDM_TX_3 "QUIN_TDM_TX_3"
+#define LPASS_BE_QUIN_TDM_RX_4 "QUIN_TDM_RX_4"
+#define LPASS_BE_QUIN_TDM_TX_4 "QUIN_TDM_TX_4"
+#define LPASS_BE_QUIN_TDM_RX_5 "QUIN_TDM_RX_5"
+#define LPASS_BE_QUIN_TDM_TX_5 "QUIN_TDM_TX_5"
+#define LPASS_BE_QUIN_TDM_RX_6 "QUIN_TDM_RX_6"
+#define LPASS_BE_QUIN_TDM_TX_6 "QUIN_TDM_TX_6"
+#define LPASS_BE_QUIN_TDM_RX_7 "QUIN_TDM_RX_7"
+#define LPASS_BE_QUIN_TDM_TX_7 "QUIN_TDM_TX_7"
+#define LPASS_BE_SEN_TDM_RX_0 "SEN_TDM_RX_0"
+#define LPASS_BE_SEN_TDM_TX_0 "SEN_TDM_TX_0"
+#define LPASS_BE_SEN_TDM_RX_1 "SEN_TDM_RX_1"
+#define LPASS_BE_SEN_TDM_TX_1 "SEN_TDM_TX_1"
+#define LPASS_BE_SEN_TDM_RX_2 "SEN_TDM_RX_2"
+#define LPASS_BE_SEN_TDM_TX_2 "SEN_TDM_TX_2"
+#define LPASS_BE_SEN_TDM_RX_3 "SEN_TDM_RX_3"
+#define LPASS_BE_SEN_TDM_TX_3 "SEN_TDM_TX_3"
+#define LPASS_BE_SEN_TDM_RX_4 "SEN_TDM_RX_4"
+#define LPASS_BE_SEN_TDM_TX_4 "SEN_TDM_TX_4"
+#define LPASS_BE_SEN_TDM_RX_5 "SEN_TDM_RX_5"
+#define LPASS_BE_SEN_TDM_TX_5 "SEN_TDM_TX_5"
+#define LPASS_BE_SEN_TDM_RX_6 "SEN_TDM_RX_6"
+#define LPASS_BE_SEN_TDM_TX_6 "SEN_TDM_TX_6"
+#define LPASS_BE_SEN_TDM_RX_7 "SEN_TDM_RX_7"
+#define LPASS_BE_SEN_TDM_TX_7 "SEN_TDM_TX_7"
+
+#define LPASS_BE_SLIMBUS_7_RX "SLIMBUS_7_RX"
+#define LPASS_BE_SLIMBUS_7_TX "SLIMBUS_7_TX"
+#define LPASS_BE_SLIMBUS_8_RX "SLIMBUS_8_RX"
+#define LPASS_BE_SLIMBUS_8_TX "SLIMBUS_8_TX"
+#define LPASS_BE_SLIMBUS_9_RX "SLIMBUS_9_RX"
+#define LPASS_BE_SLIMBUS_9_TX "SLIMBUS_9_TX"
+
+#define LPASS_BE_USB_AUDIO_RX "USB_AUDIO_RX"
+#define LPASS_BE_USB_AUDIO_TX "USB_AUDIO_TX"
+
+#define LPASS_BE_INT0_MI2S_RX "INT0_MI2S_RX"
+#define LPASS_BE_INT0_MI2S_TX "INT0_MI2S_TX"
+#define LPASS_BE_INT1_MI2S_RX "INT1_MI2S_RX"
+#define LPASS_BE_INT1_MI2S_TX "INT1_MI2S_TX"
+#define LPASS_BE_INT2_MI2S_RX "INT2_MI2S_RX"
+#define LPASS_BE_INT2_MI2S_TX "INT2_MI2S_TX"
+#define LPASS_BE_INT3_MI2S_RX "INT3_MI2S_RX"
+#define LPASS_BE_INT3_MI2S_TX "INT3_MI2S_TX"
+#define LPASS_BE_INT4_MI2S_RX "INT4_MI2S_RX"
+#define LPASS_BE_INT4_MI2S_TX "INT4_MI2S_TX"
+#define LPASS_BE_INT5_MI2S_RX "INT5_MI2S_RX"
+#define LPASS_BE_INT5_MI2S_TX "INT5_MI2S_TX"
+#define LPASS_BE_INT6_MI2S_RX "INT6_MI2S_RX"
+#define LPASS_BE_INT6_MI2S_TX "INT6_MI2S_TX"
+
+#define LPASS_BE_WSA_CDC_DMA_RX_0 "WSA_CDC_DMA_RX_0"
+#define LPASS_BE_WSA_CDC_DMA_TX_0 "WSA_CDC_DMA_TX_0"
+#define LPASS_BE_WSA_CDC_DMA_RX_1 "WSA_CDC_DMA_RX_1"
+#define LPASS_BE_WSA_CDC_DMA_TX_1 "WSA_CDC_DMA_TX_1"
+#define LPASS_BE_WSA_CDC_DMA_TX_2 "WSA_CDC_DMA_TX_2"
+#define LPASS_BE_VA_CDC_DMA_TX_0 "VA_CDC_DMA_TX_0"
+#define LPASS_BE_VA_CDC_DMA_TX_1 "VA_CDC_DMA_TX_1"
+#define LPASS_BE_VA_CDC_DMA_TX_2 "VA_CDC_DMA_TX_2"
+
+#define LPASS_BE_RX_CDC_DMA_RX_0 "RX_CDC_DMA_RX_0"
+#define LPASS_BE_RX_CDC_DMA_RX_1 "RX_CDC_DMA_RX_1"
+#define LPASS_BE_RX_CDC_DMA_RX_2 "RX_CDC_DMA_RX_2"
+#define LPASS_BE_RX_CDC_DMA_RX_3 "RX_CDC_DMA_RX_3"
+#define LPASS_BE_RX_CDC_DMA_RX_4 "RX_CDC_DMA_RX_4"
+#define LPASS_BE_RX_CDC_DMA_RX_5 "RX_CDC_DMA_RX_5"
+#define LPASS_BE_RX_CDC_DMA_RX_6 "RX_CDC_DMA_RX_6"
+#define LPASS_BE_RX_CDC_DMA_RX_7 "RX_CDC_DMA_RX_7"
+#define LPASS_BE_TX_CDC_DMA_TX_0 "TX_CDC_DMA_TX_0"
+#define LPASS_BE_TX_CDC_DMA_TX_1 "TX_CDC_DMA_TX_1"
+#define LPASS_BE_TX_CDC_DMA_TX_2 "TX_CDC_DMA_TX_2"
+#define LPASS_BE_TX_CDC_DMA_TX_3 "TX_CDC_DMA_TX_3"
+#define LPASS_BE_TX_CDC_DMA_TX_4 "TX_CDC_DMA_TX_4"
+#define LPASS_BE_TX_CDC_DMA_TX_5 "TX_CDC_DMA_TX_5"
+
+/* For multimedia front-ends, asm session is allocated dynamically.
+ * Hence, asm session/multimedia front-end mapping has to be maintained.
+ * Due to this reason, additional multimedia front-end must be placed before
+ * non-multimedia front-ends.
+ */
+
+enum {
+	MSM_FRONTEND_DAI_MULTIMEDIA1 = 0,
+	MSM_FRONTEND_DAI_MULTIMEDIA2,
+	MSM_FRONTEND_DAI_MULTIMEDIA3,
+	MSM_FRONTEND_DAI_MULTIMEDIA4,
+	MSM_FRONTEND_DAI_MULTIMEDIA5,
+	MSM_FRONTEND_DAI_MULTIMEDIA6,
+	MSM_FRONTEND_DAI_MULTIMEDIA7,
+	MSM_FRONTEND_DAI_MULTIMEDIA8,
+	MSM_FRONTEND_DAI_MULTIMEDIA9,
+	MSM_FRONTEND_DAI_MULTIMEDIA10,
+	MSM_FRONTEND_DAI_MULTIMEDIA11,
+	MSM_FRONTEND_DAI_MULTIMEDIA12,
+	MSM_FRONTEND_DAI_MULTIMEDIA13,
+	MSM_FRONTEND_DAI_MULTIMEDIA14,
+	MSM_FRONTEND_DAI_MULTIMEDIA15,
+	MSM_FRONTEND_DAI_MULTIMEDIA16,
+	MSM_FRONTEND_DAI_MULTIMEDIA17,
+	MSM_FRONTEND_DAI_MULTIMEDIA18,
+	MSM_FRONTEND_DAI_MULTIMEDIA19,
+	MSM_FRONTEND_DAI_MULTIMEDIA20,
+	MSM_FRONTEND_DAI_MULTIMEDIA21,
+	MSM_FRONTEND_DAI_MULTIMEDIA22,
+	MSM_FRONTEND_DAI_MULTIMEDIA26,
+	MSM_FRONTEND_DAI_MULTIMEDIA27,
+	MSM_FRONTEND_DAI_MULTIMEDIA28,
+	MSM_FRONTEND_DAI_MULTIMEDIA29,
+	MSM_FRONTEND_DAI_MULTIMEDIA30,
+	MSM_FRONTEND_DAI_VOIP,
+	MSM_FRONTEND_DAI_AFE_RX,
+	MSM_FRONTEND_DAI_AFE_TX,
+	MSM_FRONTEND_DAI_VOICE_STUB,
+	MSM_FRONTEND_DAI_DTMF_RX,
+	MSM_FRONTEND_DAI_QCHAT,
+	MSM_FRONTEND_DAI_VOLTE_STUB,
+	MSM_FRONTEND_DAI_LSM1,
+	MSM_FRONTEND_DAI_LSM2,
+	MSM_FRONTEND_DAI_LSM3,
+	MSM_FRONTEND_DAI_LSM4,
+	MSM_FRONTEND_DAI_LSM5,
+	MSM_FRONTEND_DAI_LSM6,
+	MSM_FRONTEND_DAI_LSM7,
+	MSM_FRONTEND_DAI_LSM8,
+	MSM_FRONTEND_DAI_VOICE2_STUB,
+	MSM_FRONTEND_DAI_VOICEMMODE1,
+	MSM_FRONTEND_DAI_VOICEMMODE2,
+	MSM_FRONTEND_DAI_MAX,
+};
+
+#define MSM_FRONTEND_DAI_MM_SIZE (MSM_FRONTEND_DAI_MULTIMEDIA30 + 1)
+#define MSM_FRONTEND_DAI_MM_MAX_ID MSM_FRONTEND_DAI_MULTIMEDIA30
+
+enum {
+	MSM_BACKEND_DAI_PRI_I2S_RX = 0,
+	MSM_BACKEND_DAI_PRI_I2S_TX,
+	MSM_BACKEND_DAI_SLIMBUS_0_RX,
+	MSM_BACKEND_DAI_SLIMBUS_0_TX,
+	MSM_BACKEND_DAI_HDMI_RX,
+	MSM_BACKEND_DAI_INT_BT_SCO_RX,
+	MSM_BACKEND_DAI_INT_BT_SCO_TX,
+	MSM_BACKEND_DAI_INT_FM_RX,
+	MSM_BACKEND_DAI_INT_FM_TX,
+	MSM_BACKEND_DAI_AFE_PCM_RX,
+	MSM_BACKEND_DAI_AFE_PCM_TX,
+	MSM_BACKEND_DAI_AUXPCM_RX,
+	MSM_BACKEND_DAI_AUXPCM_TX,
+	MSM_BACKEND_DAI_VOICE_PLAYBACK_TX,
+	MSM_BACKEND_DAI_VOICE2_PLAYBACK_TX,
+	MSM_BACKEND_DAI_INCALL_RECORD_RX,
+	MSM_BACKEND_DAI_INCALL_RECORD_TX,
+	MSM_BACKEND_DAI_MI2S_RX,
+	MSM_BACKEND_DAI_MI2S_TX,
+	MSM_BACKEND_DAI_SEC_I2S_RX,
+	MSM_BACKEND_DAI_SLIMBUS_1_RX,
+	MSM_BACKEND_DAI_SLIMBUS_1_TX,
+	MSM_BACKEND_DAI_SLIMBUS_2_RX,
+	MSM_BACKEND_DAI_SLIMBUS_2_TX,
+	MSM_BACKEND_DAI_SLIMBUS_3_RX,
+	MSM_BACKEND_DAI_SLIMBUS_3_TX,
+	MSM_BACKEND_DAI_SLIMBUS_4_RX,
+	MSM_BACKEND_DAI_SLIMBUS_4_TX,
+	MSM_BACKEND_DAI_SLIMBUS_5_RX,
+	MSM_BACKEND_DAI_SLIMBUS_5_TX,
+	MSM_BACKEND_DAI_SLIMBUS_6_RX,
+	MSM_BACKEND_DAI_SLIMBUS_6_TX,
+	MSM_BACKEND_DAI_SLIMBUS_7_RX,
+	MSM_BACKEND_DAI_SLIMBUS_7_TX,
+	MSM_BACKEND_DAI_SLIMBUS_8_RX,
+	MSM_BACKEND_DAI_SLIMBUS_8_TX,
+	MSM_BACKEND_DAI_EXTPROC_RX,
+	MSM_BACKEND_DAI_EXTPROC_TX,
+	MSM_BACKEND_DAI_EXTPROC_EC_TX,
+	MSM_BACKEND_DAI_QUATERNARY_MI2S_RX,
+	MSM_BACKEND_DAI_QUATERNARY_MI2S_TX,
+	MSM_BACKEND_DAI_SECONDARY_MI2S_RX,
+	MSM_BACKEND_DAI_SECONDARY_MI2S_TX,
+	MSM_BACKEND_DAI_PRI_MI2S_RX,
+	MSM_BACKEND_DAI_PRI_MI2S_TX,
+	MSM_BACKEND_DAI_TERTIARY_MI2S_RX,
+	MSM_BACKEND_DAI_TERTIARY_MI2S_TX,
+	MSM_BACKEND_DAI_AUDIO_I2S_RX,
+	MSM_BACKEND_DAI_SEC_AUXPCM_RX,
+	MSM_BACKEND_DAI_SEC_AUXPCM_TX,
+	MSM_BACKEND_DAI_PRI_SPDIF_RX,
+	MSM_BACKEND_DAI_SECONDARY_MI2S_RX_SD1,
+	MSM_BACKEND_DAI_QUINARY_MI2S_RX,
+	MSM_BACKEND_DAI_QUINARY_MI2S_TX,
+	MSM_BACKEND_DAI_SENARY_MI2S_TX,
+	MSM_BACKEND_DAI_PRI_TDM_RX_0,
+	MSM_BACKEND_DAI_PRI_TDM_TX_0,
+	MSM_BACKEND_DAI_PRI_TDM_RX_1,
+	MSM_BACKEND_DAI_PRI_TDM_TX_1,
+	MSM_BACKEND_DAI_PRI_TDM_RX_2,
+	MSM_BACKEND_DAI_PRI_TDM_TX_2,
+	MSM_BACKEND_DAI_PRI_TDM_RX_3,
+	MSM_BACKEND_DAI_PRI_TDM_TX_3,
+	MSM_BACKEND_DAI_PRI_TDM_RX_4,
+	MSM_BACKEND_DAI_PRI_TDM_TX_4,
+	MSM_BACKEND_DAI_PRI_TDM_RX_5,
+	MSM_BACKEND_DAI_PRI_TDM_TX_5,
+	MSM_BACKEND_DAI_PRI_TDM_RX_6,
+	MSM_BACKEND_DAI_PRI_TDM_TX_6,
+	MSM_BACKEND_DAI_PRI_TDM_RX_7,
+	MSM_BACKEND_DAI_PRI_TDM_TX_7,
+	MSM_BACKEND_DAI_SEC_TDM_RX_0,
+	MSM_BACKEND_DAI_SEC_TDM_TX_0,
+	MSM_BACKEND_DAI_SEC_TDM_RX_1,
+	MSM_BACKEND_DAI_SEC_TDM_TX_1,
+	MSM_BACKEND_DAI_SEC_TDM_RX_2,
+	MSM_BACKEND_DAI_SEC_TDM_TX_2,
+	MSM_BACKEND_DAI_SEC_TDM_RX_3,
+	MSM_BACKEND_DAI_SEC_TDM_TX_3,
+	MSM_BACKEND_DAI_SEC_TDM_RX_4,
+	MSM_BACKEND_DAI_SEC_TDM_TX_4,
+	MSM_BACKEND_DAI_SEC_TDM_RX_5,
+	MSM_BACKEND_DAI_SEC_TDM_TX_5,
+	MSM_BACKEND_DAI_SEC_TDM_RX_6,
+	MSM_BACKEND_DAI_SEC_TDM_TX_6,
+	MSM_BACKEND_DAI_SEC_TDM_RX_7,
+	MSM_BACKEND_DAI_SEC_TDM_TX_7,
+	MSM_BACKEND_DAI_TERT_TDM_RX_0,
+	MSM_BACKEND_DAI_TERT_TDM_TX_0,
+	MSM_BACKEND_DAI_TERT_TDM_RX_1,
+	MSM_BACKEND_DAI_TERT_TDM_TX_1,
+	MSM_BACKEND_DAI_TERT_TDM_RX_2,
+	MSM_BACKEND_DAI_TERT_TDM_TX_2,
+	MSM_BACKEND_DAI_TERT_TDM_RX_3,
+	MSM_BACKEND_DAI_TERT_TDM_TX_3,
+	MSM_BACKEND_DAI_TERT_TDM_RX_4,
+	MSM_BACKEND_DAI_TERT_TDM_TX_4,
+	MSM_BACKEND_DAI_TERT_TDM_RX_5,
+	MSM_BACKEND_DAI_TERT_TDM_TX_5,
+	MSM_BACKEND_DAI_TERT_TDM_RX_6,
+	MSM_BACKEND_DAI_TERT_TDM_TX_6,
+	MSM_BACKEND_DAI_TERT_TDM_RX_7,
+	MSM_BACKEND_DAI_TERT_TDM_TX_7,
+	MSM_BACKEND_DAI_QUAT_TDM_RX_0,
+	MSM_BACKEND_DAI_QUAT_TDM_TX_0,
+	MSM_BACKEND_DAI_QUAT_TDM_RX_1,
+	MSM_BACKEND_DAI_QUAT_TDM_TX_1,
+	MSM_BACKEND_DAI_QUAT_TDM_RX_2,
+	MSM_BACKEND_DAI_QUAT_TDM_TX_2,
+	MSM_BACKEND_DAI_QUAT_TDM_RX_3,
+	MSM_BACKEND_DAI_QUAT_TDM_TX_3,
+	MSM_BACKEND_DAI_QUAT_TDM_RX_4,
+	MSM_BACKEND_DAI_QUAT_TDM_TX_4,
+	MSM_BACKEND_DAI_QUAT_TDM_RX_5,
+	MSM_BACKEND_DAI_QUAT_TDM_TX_5,
+	MSM_BACKEND_DAI_QUAT_TDM_RX_6,
+	MSM_BACKEND_DAI_QUAT_TDM_TX_6,
+	MSM_BACKEND_DAI_QUAT_TDM_RX_7,
+	MSM_BACKEND_DAI_QUAT_TDM_TX_7,
+	MSM_BACKEND_DAI_QUIN_TDM_RX_0,
+	MSM_BACKEND_DAI_QUIN_TDM_TX_0,
+	MSM_BACKEND_DAI_QUIN_TDM_RX_1,
+	MSM_BACKEND_DAI_QUIN_TDM_TX_1,
+	MSM_BACKEND_DAI_QUIN_TDM_RX_2,
+	MSM_BACKEND_DAI_QUIN_TDM_TX_2,
+	MSM_BACKEND_DAI_QUIN_TDM_RX_3,
+	MSM_BACKEND_DAI_QUIN_TDM_TX_3,
+	MSM_BACKEND_DAI_QUIN_TDM_RX_4,
+	MSM_BACKEND_DAI_QUIN_TDM_TX_4,
+	MSM_BACKEND_DAI_QUIN_TDM_RX_5,
+	MSM_BACKEND_DAI_QUIN_TDM_TX_5,
+	MSM_BACKEND_DAI_QUIN_TDM_RX_6,
+	MSM_BACKEND_DAI_QUIN_TDM_TX_6,
+	MSM_BACKEND_DAI_QUIN_TDM_RX_7,
+	MSM_BACKEND_DAI_QUIN_TDM_TX_7,
+	MSM_BACKEND_DAI_SEN_TDM_RX_0,
+	MSM_BACKEND_DAI_SEN_TDM_TX_0,
+	MSM_BACKEND_DAI_SEN_TDM_RX_1,
+	MSM_BACKEND_DAI_SEN_TDM_TX_1,
+	MSM_BACKEND_DAI_SEN_TDM_RX_2,
+	MSM_BACKEND_DAI_SEN_TDM_TX_2,
+	MSM_BACKEND_DAI_SEN_TDM_RX_3,
+	MSM_BACKEND_DAI_SEN_TDM_TX_3,
+	MSM_BACKEND_DAI_SEN_TDM_RX_4,
+	MSM_BACKEND_DAI_SEN_TDM_TX_4,
+	MSM_BACKEND_DAI_SEN_TDM_RX_5,
+	MSM_BACKEND_DAI_SEN_TDM_TX_5,
+	MSM_BACKEND_DAI_SEN_TDM_RX_6,
+	MSM_BACKEND_DAI_SEN_TDM_TX_6,
+	MSM_BACKEND_DAI_SEN_TDM_RX_7,
+	MSM_BACKEND_DAI_SEN_TDM_TX_7,
+	MSM_BACKEND_DAI_INT_BT_A2DP_RX,
+	MSM_BACKEND_DAI_USB_RX,
+	MSM_BACKEND_DAI_USB_TX,
+	MSM_BACKEND_DAI_DISPLAY_PORT_RX,
+	MSM_BACKEND_DAI_DISPLAY_PORT_RX_1,
+	MSM_BACKEND_DAI_TERT_AUXPCM_RX,
+	MSM_BACKEND_DAI_TERT_AUXPCM_TX,
+	MSM_BACKEND_DAI_QUAT_AUXPCM_RX,
+	MSM_BACKEND_DAI_QUAT_AUXPCM_TX,
+	MSM_BACKEND_DAI_QUIN_AUXPCM_RX,
+	MSM_BACKEND_DAI_QUIN_AUXPCM_TX,
+	MSM_BACKEND_DAI_INT0_MI2S_RX,
+	MSM_BACKEND_DAI_INT0_MI2S_TX,
+	MSM_BACKEND_DAI_INT1_MI2S_RX,
+	MSM_BACKEND_DAI_INT1_MI2S_TX,
+	MSM_BACKEND_DAI_INT2_MI2S_RX,
+	MSM_BACKEND_DAI_INT2_MI2S_TX,
+	MSM_BACKEND_DAI_INT3_MI2S_RX,
+	MSM_BACKEND_DAI_INT3_MI2S_TX,
+	MSM_BACKEND_DAI_INT4_MI2S_RX,
+	MSM_BACKEND_DAI_INT4_MI2S_TX,
+	MSM_BACKEND_DAI_INT5_MI2S_RX,
+	MSM_BACKEND_DAI_INT5_MI2S_TX,
+	MSM_BACKEND_DAI_INT6_MI2S_RX,
+	MSM_BACKEND_DAI_INT6_MI2S_TX,
+	MSM_BACKEND_DAI_SEN_AUXPCM_RX,
+	MSM_BACKEND_DAI_SEN_AUXPCM_TX,
+	MSM_BACKEND_DAI_SENARY_MI2S_RX,
+	MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0,
+	MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0,
+	MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1,
+	MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1,
+	MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2,
+	MSM_BACKEND_DAI_VA_CDC_DMA_TX_0,
+	MSM_BACKEND_DAI_VA_CDC_DMA_TX_1,
+	MSM_BACKEND_DAI_VA_CDC_DMA_TX_2,
+	MSM_BACKEND_DAI_RX_CDC_DMA_RX_0,
+	MSM_BACKEND_DAI_TX_CDC_DMA_TX_0,
+	MSM_BACKEND_DAI_RX_CDC_DMA_RX_1,
+	MSM_BACKEND_DAI_TX_CDC_DMA_TX_1,
+	MSM_BACKEND_DAI_RX_CDC_DMA_RX_2,
+	MSM_BACKEND_DAI_TX_CDC_DMA_TX_2,
+	MSM_BACKEND_DAI_RX_CDC_DMA_RX_3,
+	MSM_BACKEND_DAI_TX_CDC_DMA_TX_3,
+	MSM_BACKEND_DAI_RX_CDC_DMA_RX_4,
+	MSM_BACKEND_DAI_TX_CDC_DMA_TX_4,
+	MSM_BACKEND_DAI_RX_CDC_DMA_RX_5,
+	MSM_BACKEND_DAI_TX_CDC_DMA_TX_5,
+	MSM_BACKEND_DAI_RX_CDC_DMA_RX_6,
+	MSM_BACKEND_DAI_RX_CDC_DMA_RX_7,
+	MSM_BACKEND_DAI_PRI_SPDIF_TX,
+	MSM_BACKEND_DAI_SEC_SPDIF_RX,
+	MSM_BACKEND_DAI_SEC_SPDIF_TX,
+	MSM_BACKEND_DAI_SLIMBUS_9_RX,
+	MSM_BACKEND_DAI_SLIMBUS_9_TX,
+	MSM_BACKEND_DAI_AFE_LOOPBACK_TX,
+	MSM_BACKEND_DAI_PRI_META_MI2S_RX,
+	MSM_BACKEND_DAI_SEC_META_MI2S_RX,
+	MSM_BACKEND_DAI_MAX,
+};
+#endif /*_MSM_PCM_H*/

asoc/msm-dai-q6-hdmi-v2.c

@@ -1,5 +1,5 @@
 // SPDX-License-Identifier: GPL-2.0-only
-/* Copyright (c) 2012-2019, The Linux Foundation. All rights reserved.
+/* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
  */
 
 #include <linux/init.h>
@@ -14,7 +14,6 @@
 #include <sound/soc.h>
 #include <sound/pcm_params.h>
 #include <dsp/apr_audio-v2.h>
-#include <dsp/q6afe-v2.h>
 #include "msm-dai-q6-v2.h"
 
 #define HDMI_RX_CA_MAX 0x32
@@ -51,6 +50,7 @@ struct msm_dai_q6_hdmi_dai_data {
 	union afe_port_config port_config;
 };
 
+#if 0
 static int get_port_id(int dai_id)
 {
 	/* Currently, display devices share a common AFE port */
@@ -59,6 +59,7 @@ static int get_port_id(int dai_id)
 
 	return dai_id;
 }
+#endif
 
 static int msm_dai_q6_ext_disp_format_put(struct snd_kcontrol *kcontrol,
 					  struct snd_ctl_elem_value *ucontrol)
@@ -195,6 +196,7 @@ static int msm_dai_q6_ext_disp_drift_info(struct snd_kcontrol *kcontrol,
 static int msm_dai_q6_ext_disp_drift_get(struct snd_kcontrol *kcontrol,
 		struct snd_ctl_elem_value *ucontrol)
 {
+	#if 0
 	int ret = -EINVAL;
 	struct afe_param_id_dev_timing_stats timing_stats;
 	struct snd_soc_dai *dai = kcontrol->private_data;
@@ -220,6 +222,8 @@ static int msm_dai_q6_ext_disp_drift_get(struct snd_kcontrol *kcontrol,
 	       sizeof(struct afe_param_id_dev_timing_stats));
 done:
 	return ret;
+	#endif
+	return 0;
 }
 
 static const struct snd_kcontrol_new hdmi_config_controls[] = {
@@ -348,17 +352,18 @@ static void msm_dai_q6_hdmi_shutdown(struct snd_pcm_substream *substream,
 				struct snd_soc_dai *dai)
 {
 	struct msm_dai_q6_hdmi_dai_data *dai_data = dev_get_drvdata(dai->dev);
-	int rc = 0;
+//	int rc = 0;
 
 	if (!test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
 		pr_info("%s:  afe port not started. dai_data->status_mask = %ld\n",
 		 __func__, *dai_data->status_mask);
 		return;
 	}
-
+	#if 0
 	rc = afe_close(get_port_id(dai->id)); /* can block */
 	if (rc < 0)
 		dev_err(dai->dev, "fail to close AFE port\n");
+	#endif
 
 	pr_debug("%s: dai_data->status_mask = %ld\n", __func__,
 			*dai_data->status_mask);
@@ -378,6 +383,7 @@ static int msm_dai_q6_hdmi_prepare(struct snd_pcm_substream *substream,
 							      dai_data->ca.ca;
 
 	if (!test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
+		#if 0
 		rc = afe_set_display_stream(get_port_id(dai->id), dai_data->stream_idx,
 						dai_data->ctl_idx);
 		if (rc < 0) {
@@ -397,9 +403,10 @@ static int msm_dai_q6_hdmi_prepare(struct snd_pcm_substream *substream,
 		else
 			set_bit(STATUS_PORT_STARTED,
 				dai_data->status_mask);
+		#endif
 	}
 
-err:
+//err:
 	return rc;
 }
 
@@ -518,15 +525,17 @@ static int msm_dai_q6_hdmi_dai_probe(struct snd_soc_dai *dai)
 static int msm_dai_q6_hdmi_dai_remove(struct snd_soc_dai *dai)
 {
 	struct msm_dai_q6_hdmi_dai_data *dai_data;
-	int rc;
+//	int rc;
 
 	dai_data = dev_get_drvdata(dai->dev);
 
 	/* If AFE port is still up, close it */
 	if (test_bit(STATUS_PORT_STARTED, dai_data->status_mask)) {
+		#if 0
 		rc = afe_close(get_port_id(dai->id)); /* can block */
 		if (rc < 0)
 			dev_err(dai->dev, "fail to close AFE port\n");
+		#endif
 
 		clear_bit(STATUS_PORT_STARTED, dai_data->status_mask);
 	}

asoc/msm-dai-q6-v2.h

@@ -43,6 +43,8 @@
 #define MSM_META_MI2S_MIN  MSM_PRIM_META_MI2S
 #define MSM_META_MI2S_MAX  MSM_SEC_META_MI2S
 
+#define MAX_NUM_I2S_META_PORT_MEMBER_PORTS 4
+
 struct msm_dai_auxpcm_config {
 	u16 mode;
 	u16 sync;
@@ -57,6 +59,8 @@ struct msm_dai_auxpcm_config {
 struct msm_dai_auxpcm_pdata {
 	struct msm_dai_auxpcm_config mode_8k;
 	struct msm_dai_auxpcm_config mode_16k;
+	struct msm_dai_auxpcm_config mode_32k;
+	struct msm_dai_auxpcm_config mode_48k;
 };
 
 struct msm_mi2s_pdata {

asoc/platform_init.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2017 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017, 2020 The Linux Foundation. All rights reserved.
 */
 
 #include <linux/kernel.h>
@@ -9,48 +9,18 @@
 
 static int __init audio_platform_init(void)
 {
-	msm_compress_dsp_init();
-	msm_fe_dai_init();
 	msm_dai_q6_hdmi_init();
 	msm_dai_q6_init();
 	msm_dai_slim_init();
-	msm_dai_stub_init();
-	msm_lsm_client_init();
-	msm_pcm_afe_init();
-	msm_pcm_dtmf_init();
-	msm_pcm_hostless_init();
-	msm_voice_host_init();
-	msm_pcm_loopback_init();
-	msm_pcm_noirq_init();
-	msm_pcm_dsp_init();
-	msm_soc_routing_platform_init();
-	msm_pcm_voice_init();
-	msm_pcm_voip_init();
-	msm_transcode_loopback_init();
 
 	return 0;
 }
 
 static void audio_platform_exit(void)
 {
-	msm_transcode_loopback_exit();
-	msm_pcm_voip_exit();
-	msm_pcm_voice_exit();
-	msm_soc_routing_platform_exit();
-	msm_pcm_dsp_exit();
-	msm_pcm_noirq_exit();
-	msm_pcm_loopback_exit();
-	msm_voice_host_exit();
-	msm_pcm_hostless_exit();
-	msm_pcm_dtmf_exit();
-	msm_pcm_afe_exit();
-	msm_lsm_client_exit();
-	msm_dai_stub_exit();
 	msm_dai_slim_exit();
 	msm_dai_q6_exit();
 	msm_dai_q6_hdmi_exit();
-	msm_fe_dai_exit();
-	msm_compress_dsp_exit();
 }
 
 module_init(audio_platform_init);

asoc/platform_init.h

@@ -1,47 +1,15 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2018, 2020 The Linux Foundation. All rights reserved.
  */
 
 #ifndef __PLATFORM_INIT_H__
 #define __PLATFORM_INIT_H__
-int msm_compress_dsp_init(void);
-int msm_fe_dai_init(void);
 int msm_dai_q6_hdmi_init(void);
 int msm_dai_q6_init(void);
-int msm_dai_stub_init(void);
-int msm_lsm_client_init(void);
-int msm_pcm_afe_init(void);
-int msm_pcm_dtmf_init(void);
-int msm_pcm_hostless_init(void);
-int msm_voice_host_init(void);
-int msm_pcm_loopback_init(void);
-int msm_pcm_noirq_init(void);
-int msm_pcm_dsp_init(void);
-int msm_soc_routing_platform_init(void);
-int msm_pcm_voice_init(void);
-int msm_pcm_voip_init(void);
-int msm_transcode_loopback_init(void);
-int msm_cpe_lsm_init(void);
 
-void msm_cpe_lsm_exit(void);
-void msm_transcode_loopback_exit(void);
-void msm_pcm_voip_exit(void);
-void msm_pcm_voice_exit(void);
-void msm_soc_routing_platform_exit(void);
-void msm_pcm_dsp_exit(void);
-void msm_pcm_noirq_exit(void);
-void msm_pcm_loopback_exit(void);
-void msm_voice_host_exit(void);
-void msm_pcm_hostless_exit(void);
-void msm_pcm_dtmf_exit(void);
-void msm_pcm_afe_exit(void);
-void msm_lsm_client_exit(void);
-void msm_dai_stub_exit(void);
 void msm_dai_q6_exit(void);
 void msm_dai_q6_hdmi_exit(void);
-void msm_fe_dai_exit(void);
-void msm_compress_dsp_exit(void);
 
 #if IS_ENABLED(CONFIG_WCD9XXX_CODEC_CORE)
 int msm_dai_slim_init(void);