From bb4029020d14caacdf9e30979f2d54acfc39a601 Mon Sep 17 00:00:00 2001 From: Meng Wang Date: Wed, 10 Jan 2018 15:25:57 +0800 Subject: [PATCH] asoc: wcd934x: update register default values before post SSR Update register default values before post SSR to avoid codec nack issue. Change-Id: Ibf1e3275d27c4b65ab179b9ddc5a51621c89eab7 Signed-off-by: Meng Wang --- asoc/codecs/wcd934x/wcd934x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/asoc/codecs/wcd934x/wcd934x.c b/asoc/codecs/wcd934x/wcd934x.c index 21c7f12e70..bf9627c793 100644 --- a/asoc/codecs/wcd934x/wcd934x.c +++ b/asoc/codecs/wcd934x/wcd934x.c @@ -10021,8 +10021,8 @@ static int tavil_post_reset_cb(struct wcd9xxx *wcd9xxx) else if (control->mclk_rate == WCD934X_MCLK_CLK_9P6MHZ) snd_soc_update_bits(codec, WCD934X_CODEC_RPM_CLK_MCLK_CFG, 0x03, 0x01); - wcd_resmgr_post_ssr_v2(tavil->resmgr); tavil_update_reg_defaults(tavil); + wcd_resmgr_post_ssr_v2(tavil->resmgr); tavil_codec_init_reg(tavil); __tavil_enable_efuse_sensing(tavil); tavil_mclk2_reg_defaults(tavil);