qcacld-3.0: [11AX] Add support in HDD to update HE Capabilities

Add support in HDD to update 11ax - High Efficiency(HE) Capabilities
received as part of the target configuration.

Add support for new WNI_CFG global config parameters to be
used for implementing 11AX standard.

Change-Id: I3f0d3af2369157c657ac59676a434dc794f84b19
CRs-Fixed: 1073481

Kbuild

@@ -491,6 +491,10 @@ ifeq ($(CONFIG_WLAN_FEATURE_NAN_DATAPATH), y)
 HDD_OBJS += $(HDD_SRC_DIR)/wlan_hdd_nan_datapath.o
 endif
 
+ifeq ($(CONFIG_WLAN_FEATURE_11AX),y)
+HDD_OBJS += $(HDD_SRC_DIR)/wlan_hdd_he.o
+endif
+
 ########### HOST DIAG LOG ###########
 HOST_DIAG_LOG_DIR :=	$(WLAN_COMMON_ROOT)/utils/host_diag_log
 

core/hdd/inc/wlan_hdd_he.h

@@ -0,0 +1,41 @@
+/*
+ * Copyright (c) 2017 The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/**
+ * DOC : wlan_hdd_he.h
+ *
+ * WLAN Host Device Driver file for 802.11ax (High Efficiency) support.
+ *
+ */
+
+#if !defined(WLAN_HDD_HE_H)
+#define WLAN_HDD_HE_H
+
+struct hdd_context_s;
+struct wma_tgt_cfg;
+
+#ifdef WLAN_FEATURE_11AX
+void hdd_update_tgt_he_cap(struct hdd_context_s *hdd_ctx,
+			   struct wma_tgt_cfg *cfg);
+#else
+static inline void hdd_update_tgt_he_cap(struct hdd_context_s *hdd_ctx,
+					 struct wma_tgt_cfg *cfg)
+{
+}
+#endif
+#endif /* if !defined(WLAN_HDD_HE_H)*/

core/hdd/src/wlan_hdd_he.c

@@ -0,0 +1,251 @@
+/*
+ * Copyright (c) 2017 The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/**
+ * DOC : wlan_hdd_he.c
+ *
+ * WLAN Host Device Driver file for 802.11ax (High Efficiency) support.
+ *
+ */
+
+#include "wlan_hdd_main.h"
+#include "wlan_hdd_he.h"
+
+/**
+ * hdd_he_wni_cfg_to_string() - return string conversion of HE WNI CFG
+ * @cfg_id: Config ID.
+ *
+ * This utility function helps log string conversion of WNI config ID.
+ *
+ * Return: string conversion of the HE WNI config ID, if match found;
+ *	"Invalid" otherwise.
+ */
+static const char *hdd_he_wni_cfg_to_string(uint16_t cfg_id)
+{
+	switch (cfg_id) {
+	default:
+		return "Invalid";
+	CASE_RETURN_STRING(WNI_CFG_HE_CONTROL);
+	CASE_RETURN_STRING(WNI_CFG_HE_TWT_REQUESTOR);
+	CASE_RETURN_STRING(WNI_CFG_HE_TWT_RESPONDER);
+	CASE_RETURN_STRING(WNI_CFG_HE_FRAGMENTATION);
+	CASE_RETURN_STRING(WNI_CFG_HE_MAX_FRAG_MSDU);
+	CASE_RETURN_STRING(WNI_CFG_HE_MIN_FRAG_SIZE);
+	CASE_RETURN_STRING(WNI_CFG_HE_TRIG_PAD);
+	CASE_RETURN_STRING(WNI_CFG_HE_MTID_AGGR);
+	CASE_RETURN_STRING(WNI_CFG_HE_LINK_ADAPTATION);
+	CASE_RETURN_STRING(WNI_CFG_HE_ALL_ACK);
+	CASE_RETURN_STRING(WNI_CFG_HE_UL_MU_RSP_SCHEDULING);
+	CASE_RETURN_STRING(WNI_CFG_HE_BUFFER_STATUS_RPT);
+	CASE_RETURN_STRING(WNI_CFG_HE_BCAST_TWT);
+	CASE_RETURN_STRING(WNI_CFG_HE_BA_32BIT);
+	CASE_RETURN_STRING(WNI_CFG_HE_MU_CASCADING);
+	CASE_RETURN_STRING(WNI_CFG_HE_MULTI_TID);
+	CASE_RETURN_STRING(WNI_CFG_HE_DL_MU_BA);
+	CASE_RETURN_STRING(WNI_CFG_HE_OMI);
+	CASE_RETURN_STRING(WNI_CFG_HE_OFDMA_RA);
+	CASE_RETURN_STRING(WNI_CFG_HE_MAX_AMPDU_LEN);
+	CASE_RETURN_STRING(WNI_CFG_HE_AMSDU_FRAG);
+	CASE_RETURN_STRING(WNI_CFG_HE_FLEX_TWT_SCHED);
+	CASE_RETURN_STRING(WNI_CFG_HE_RX_CTRL);
+	CASE_RETURN_STRING(WNI_CFG_HE_BSRP_AMPDU_AGGR);
+	CASE_RETURN_STRING(WNI_CFG_HE_QTP);
+	CASE_RETURN_STRING(WNI_CFG_HE_A_BQR);
+	CASE_RETURN_STRING(WNI_CFG_HE_DUAL_BAND);
+	CASE_RETURN_STRING(WNI_CFG_HE_CHAN_WIDTH);
+	CASE_RETURN_STRING(WNI_CFG_HE_RX_PREAM_PUNC);
+	CASE_RETURN_STRING(WNI_CFG_HE_CLASS_OF_DEVICE);
+	CASE_RETURN_STRING(WNI_CFG_HE_LDPC);
+	CASE_RETURN_STRING(WNI_CFG_HE_LTF_PPDU);
+	CASE_RETURN_STRING(WNI_CFG_HE_LTF_NDP);
+	CASE_RETURN_STRING(WNI_CFG_HE_STBC);
+	CASE_RETURN_STRING(WNI_CFG_HE_DOPPLER);
+	CASE_RETURN_STRING(WNI_CFG_HE_UL_MUMIMO);
+	CASE_RETURN_STRING(WNI_CFG_HE_DCM_TX);
+	CASE_RETURN_STRING(WNI_CFG_HE_DCM_RX);
+	CASE_RETURN_STRING(WNI_CFG_HE_MU_PPDU);
+	CASE_RETURN_STRING(WNI_CFG_HE_SU_BEAMFORMER);
+	CASE_RETURN_STRING(WNI_CFG_HE_SU_BEAMFORMEE);
+	CASE_RETURN_STRING(WNI_CFG_HE_MU_BEAMFORMER);
+	CASE_RETURN_STRING(WNI_CFG_HE_BFEE_STS_LT80);
+	CASE_RETURN_STRING(WNI_CFG_HE_NSTS_TOT_LT80);
+	CASE_RETURN_STRING(WNI_CFG_HE_BFEE_STS_GT80);
+	CASE_RETURN_STRING(WNI_CFG_HE_NSTS_TOT_GT80);
+	CASE_RETURN_STRING(WNI_CFG_HE_NUM_SOUND_LT80);
+	CASE_RETURN_STRING(WNI_CFG_HE_NUM_SOUND_GT80);
+	CASE_RETURN_STRING(WNI_CFG_HE_SU_FEED_TONE16);
+	CASE_RETURN_STRING(WNI_CFG_HE_MU_FEED_TONE16);
+	CASE_RETURN_STRING(WNI_CFG_HE_CODEBOOK_SU);
+	CASE_RETURN_STRING(WNI_CFG_HE_CODEBOOK_MU);
+	CASE_RETURN_STRING(WNI_CFG_HE_BFRM_FEED);
+	CASE_RETURN_STRING(WNI_CFG_HE_ER_SU_PPDU);
+	CASE_RETURN_STRING(WNI_CFG_HE_DL_PART_BW);
+	CASE_RETURN_STRING(WNI_CFG_HE_PPET_PRESENT);
+	CASE_RETURN_STRING(WNI_CFG_HE_SRP);
+	CASE_RETURN_STRING(WNI_CFG_HE_POWER_BOOST);
+	CASE_RETURN_STRING(WNI_CFG_HE_4x_LTF_GI);
+	CASE_RETURN_STRING(WNI_CFG_HE_NSS);
+	CASE_RETURN_STRING(WNI_CFG_HE_MCS);
+	CASE_RETURN_STRING(WNI_CFG_HE_PPET);
+	}
+}
+
+/**
+ * hdd_he_set_wni_cfg() - Update WNI CFG
+ * @hdd_ctx: HDD context
+ * @cfg_id: CFG to be udpated
+ * @new_value: Value to be updated
+ *
+ * Update WNI CFG with the value passed.
+ *
+ * Return: None
+ */
+static void hdd_he_set_wni_cfg(struct hdd_context_s *hdd_ctx,
+			    uint16_t cfg_id, uint32_t new_value)
+{
+	QDF_STATUS status;
+
+	status = sme_cfg_set_int(hdd_ctx->hHal, cfg_id, new_value);
+	if (QDF_IS_STATUS_ERROR(status))
+		hdd_err("could not set %s", hdd_he_wni_cfg_to_string(cfg_id));
+}
+
+/**
+ * hdd_update_tgt_he_cap() - Update HE related capabilities
+ * @hdd_ctx: HDD context
+ * @he_cap: Target HE capabilities
+ *
+ * This function updaates WNI CFG with Target capabilities received as part of
+ * Default values present in WNI CFG are the values supported by FW/HW.
+ * INI should be introduced if user control is required to control the value.
+ *
+ * Return: None
+ */
+void hdd_update_tgt_he_cap(struct hdd_context_s *hdd_ctx,
+			   struct wma_tgt_cfg *cfg)
+{
+	uint32_t ppet_size = sizeof(tDot11fIEppe_threshold);
+	QDF_STATUS status;
+	tDot11fIEvendor_he_cap *he_cap = &cfg->he_cap;
+
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_CONTROL, he_cap->htc_he);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_TWT_REQUESTOR,
+			   he_cap->twt_request);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_TWT_RESPONDER,
+			   he_cap->twt_responder);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_FRAGMENTATION,
+			   he_cap->fragmentation);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_MAX_FRAG_MSDU,
+			   he_cap->max_num_frag_msdu);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_MIN_FRAG_SIZE,
+			   he_cap->min_frag_size);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_TRIG_PAD,
+			   he_cap->trigger_frm_mac_pad);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_MTID_AGGR,
+			   he_cap->multi_tid_aggr);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_LINK_ADAPTATION,
+			   he_cap->he_link_adaptation);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_ALL_ACK, he_cap->all_ack);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_UL_MU_RSP_SCHEDULING,
+			   he_cap->ul_mu_rsp_sched);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_BUFFER_STATUS_RPT,
+			   he_cap->a_bsr);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_BCAST_TWT,
+			   he_cap->broadcast_twt);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_BA_32BIT,
+			   he_cap->ba_32bit_bitmap);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_MU_CASCADING,
+			   he_cap->mu_cascade);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_MULTI_TID,
+			   he_cap->ack_enabled_multitid);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_DL_MU_BA, he_cap->dl_mu_ba);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_OMI, he_cap->omi_a_ctrl);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_OFDMA_RA, he_cap->ofdma_ra);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_MAX_AMPDU_LEN,
+			   he_cap->max_ampdu_len);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_AMSDU_FRAG, he_cap->amsdu_frag);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_FLEX_TWT_SCHED,
+			   he_cap->flex_twt_sched);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_RX_CTRL, he_cap->rx_ctrl_frame);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_BSRP_AMPDU_AGGR,
+			   he_cap->bsrp_ampdu_aggr);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_QTP, he_cap->qtp);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_A_BQR, he_cap->a_bqr);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_DUAL_BAND, he_cap->dual_band);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_CHAN_WIDTH, he_cap->chan_width);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_RX_PREAM_PUNC,
+			   he_cap->rx_pream_puncturing);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_CLASS_OF_DEVICE,
+			   he_cap->device_class);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_LDPC, he_cap->ldpc_coding);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_LTF_PPDU,
+			   he_cap->he_ltf_gi_ppdu);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_LTF_NDP, he_cap->he_ltf_gi_ndp);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_STBC, he_cap->stbc);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_DOPPLER, he_cap->doppler);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_UL_MUMIMO, he_cap->ul_mu);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_DCM_TX, he_cap->dcm_enc_tx);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_DCM_RX, he_cap->dcm_enc_rx);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_MU_PPDU, he_cap->ul_he_mu);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_SU_BEAMFORMER,
+			   he_cap->su_beamformer);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_SU_BEAMFORMEE,
+			   he_cap->su_beamformee);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_MU_BEAMFORMER,
+			   he_cap->mu_beamformer);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_BFEE_STS_LT80,
+			   he_cap->bfee_sts_lt_80);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_NSTS_TOT_LT80,
+			   he_cap->nsts_tol_lt_80);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_BFEE_STS_GT80,
+			   he_cap->bfee_sta_gt_80);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_NSTS_TOT_GT80,
+			   he_cap->nsts_tot_gt_80);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_NUM_SOUND_LT80,
+			   he_cap->num_sounding_lt_80);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_NUM_SOUND_GT80,
+			   he_cap->num_sounding_gt_80);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_SU_FEED_TONE16,
+			   he_cap->su_feedback_tone16);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_MU_FEED_TONE16,
+			   he_cap->mu_feedback_tone16);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_CODEBOOK_SU,
+			   he_cap->codebook_su);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_CODEBOOK_MU,
+			   he_cap->codebook_mu);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_BFRM_FEED,
+			   he_cap->beamforming_feedback);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_ER_SU_PPDU,
+			   he_cap->he_er_su_ppdu);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_DL_PART_BW,
+			   he_cap->dl_mu_mimo_part_bw);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_PPET_PRESENT,
+			   he_cap->ppet_present);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_SRP, he_cap->srp);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_POWER_BOOST,
+			   he_cap->power_boost);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_4x_LTF_GI, he_cap->he_ltf_gi_4x);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_NSS, he_cap->nss_supported);
+	hdd_he_set_wni_cfg(hdd_ctx, WNI_CFG_HE_MCS, he_cap->mcs_supported);
+
+	/* PPET can not be configured by user - Set values from FW */
+	status = sme_cfg_set_str(hdd_ctx->hHal, WNI_CFG_HE_PPET,
+				 (void *)&he_cap->ppe_threshold, ppet_size);
+	if (status == QDF_STATUS_E_FAILURE)
+		hdd_alert("could not set HE PPET");
+}

core/hdd/src/wlan_hdd_main.c

@@ -93,6 +93,7 @@
 #include "wlan_hdd_driver_ops.h"
 #include "epping_main.h"
 #include "wlan_hdd_memdump.h"
+#include "wlan_hdd_he.h"
 
 #include <wlan_hdd_ipa.h>
 #include "hif.h"
@@ -1452,6 +1453,10 @@ void hdd_update_tgt_cfg(void *context, void *param)
 	hdd_update_tgt_ht_cap(hdd_ctx, &cfg->ht_cap);
 
 	hdd_update_tgt_vht_cap(hdd_ctx, &cfg->vht_cap);
+	if (cfg->services.en_11ax) {
+		hdd_info("11AX: 11ax is enabled - update HDD config");
+		hdd_update_tgt_he_cap(hdd_ctx, cfg);
+	}
 
 	hdd_update_vdev_nss(hdd_ctx);
 

core/mac/inc/wni_cfg.h

@@ -254,6 +254,68 @@ enum {
 	WNI_CFG_MAX_HT_MCS_TX_DATA,
 	WNI_CFG_DISABLE_ABG_RATE_FOR_TX_DATA,
 	WNI_CFG_RATE_FOR_TX_MGMT,
+	WNI_CFG_HE_CONTROL,
+	WNI_CFG_HE_TWT_REQUESTOR,
+	WNI_CFG_HE_TWT_RESPONDER,
+	WNI_CFG_HE_FRAGMENTATION,
+	WNI_CFG_HE_MAX_FRAG_MSDU,
+	WNI_CFG_HE_MIN_FRAG_SIZE,
+	WNI_CFG_HE_TRIG_PAD,
+	WNI_CFG_HE_MTID_AGGR,
+	WNI_CFG_HE_LINK_ADAPTATION,
+	WNI_CFG_HE_ALL_ACK,
+	WNI_CFG_HE_UL_MU_RSP_SCHEDULING,
+	WNI_CFG_HE_BUFFER_STATUS_RPT,
+	WNI_CFG_HE_BCAST_TWT,
+	WNI_CFG_HE_BA_32BIT,
+	WNI_CFG_HE_MU_CASCADING,
+	WNI_CFG_HE_MULTI_TID,
+	WNI_CFG_HE_DL_MU_BA,
+	WNI_CFG_HE_OMI,
+	WNI_CFG_HE_OFDMA_RA,
+	WNI_CFG_HE_MAX_AMPDU_LEN,
+	WNI_CFG_HE_AMSDU_FRAG,
+	WNI_CFG_HE_FLEX_TWT_SCHED,
+	WNI_CFG_HE_RX_CTRL,
+	WNI_CFG_HE_BSRP_AMPDU_AGGR,
+	WNI_CFG_HE_QTP,
+	WNI_CFG_HE_A_BQR,
+	WNI_CFG_HE_DUAL_BAND,
+	WNI_CFG_HE_CHAN_WIDTH,
+	WNI_CFG_HE_RX_PREAM_PUNC,
+	WNI_CFG_HE_CLASS_OF_DEVICE,
+	WNI_CFG_HE_LDPC,
+	WNI_CFG_HE_LTF_PPDU,
+	WNI_CFG_HE_LTF_NDP,
+	WNI_CFG_HE_STBC,
+	WNI_CFG_HE_DOPPLER,
+	WNI_CFG_HE_UL_MUMIMO,
+	WNI_CFG_HE_DCM_TX,
+	WNI_CFG_HE_DCM_RX,
+	WNI_CFG_HE_MU_PPDU,
+	WNI_CFG_HE_SU_BEAMFORMER,
+	WNI_CFG_HE_SU_BEAMFORMEE,
+	WNI_CFG_HE_MU_BEAMFORMER,
+	WNI_CFG_HE_BFEE_STS_LT80,
+	WNI_CFG_HE_NSTS_TOT_LT80,
+	WNI_CFG_HE_BFEE_STS_GT80,
+	WNI_CFG_HE_NSTS_TOT_GT80,
+	WNI_CFG_HE_NUM_SOUND_LT80,
+	WNI_CFG_HE_NUM_SOUND_GT80,
+	WNI_CFG_HE_SU_FEED_TONE16,
+	WNI_CFG_HE_MU_FEED_TONE16,
+	WNI_CFG_HE_CODEBOOK_SU,
+	WNI_CFG_HE_CODEBOOK_MU,
+	WNI_CFG_HE_BFRM_FEED,
+	WNI_CFG_HE_ER_SU_PPDU,
+	WNI_CFG_HE_DL_PART_BW,
+	WNI_CFG_HE_PPET_PRESENT,
+	WNI_CFG_HE_SRP,
+	WNI_CFG_HE_POWER_BOOST,
+	WNI_CFG_HE_4x_LTF_GI,
+	WNI_CFG_HE_NSS,
+	WNI_CFG_HE_MCS,
+	WNI_CFG_HE_PPET,
 	/* Any new items to be added should be above this strictly */
 	CFG_PARAM_MAX_NUM
 };
@@ -305,6 +367,7 @@ enum {
 #define WNI_CFG_ASSOC_RSP_ADDNIE_DATA_LEN    255
 #define WNI_CFG_PROBE_RSP_BCN_ADDNIE_DATA_LEN    255
 #define WNI_CFG_WPS_UUID_LEN    16
+#define WNI_CFG_HE_PPET_LEN 27
 
 /*
  * Integer parameter min/max/default values
@@ -1275,6 +1338,250 @@ enum {
 #define WNI_CFG_RATE_FOR_TX_MGMT_STAMAX   0xFF
 #define WNI_CFG_RATE_FOR_TX_MGMT_STADEF   0xFF
 
+#define WNI_CFG_HE_CONTROL_STAMIN 0
+#define WNI_CFG_HE_CONTROL_STAMAX 1
+#define WNI_CFG_HE_CONTROL_STADEF 0
+
+#define WNI_CFG_HE_TWT_REQUESTOR_STAMIN 0
+#define WNI_CFG_HE_TWT_REQUESTOR_STAMAX 1
+#define WNI_CFG_HE_TWT_REQUESTOR_STADEF 0
+
+#define WNI_CFG_HE_TWT_RESPONDER_STAMIN 0
+#define WNI_CFG_HE_TWT_RESPONDER_STAMAX 1
+#define WNI_CFG_HE_TWT_RESPONDER_STADEF 0
+
+#define WNI_CFG_HE_FRAGMENTATION_STAMIN 0
+#define WNI_CFG_HE_FRAGMENTATION_STAMAX 0x3
+#define WNI_CFG_HE_FRAGMENTATION_STADEF 0
+
+#define WNI_CFG_HE_MAX_FRAG_MSDU_STAMIN 0
+#define WNI_CFG_HE_MAX_FRAG_MSDU_STAMAX 0x7
+#define WNI_CFG_HE_MAX_FRAG_MSDU_STADEF 0
+
+#define WNI_CFG_HE_MIN_FRAG_SIZE_STAMIN 0
+#define WNI_CFG_HE_MIN_FRAG_SIZE_STAMAX 0x3
+#define WNI_CFG_HE_MIN_FRAG_SIZE_STADEF 0
+
+#define WNI_CFG_HE_TRIG_PAD_STAMIN 0
+#define WNI_CFG_HE_TRIG_PAD_STAMAX 2
+#define WNI_CFG_HE_TRIG_PAD_STADEF 0
+
+#define WNI_CFG_HE_MTID_AGGR_STAMIN 0
+#define WNI_CFG_HE_MTID_AGGR_STAMAX 0x7
+#define WNI_CFG_HE_MTID_AGGR_STADEF 0
+
+#define WNI_CFG_HE_LINK_ADAPTATION_STAMIN 0
+#define WNI_CFG_HE_LINK_ADAPTATION_STAMAX 0x3
+#define WNI_CFG_HE_LINK_ADAPTATION_STADEF 0
+
+#define WNI_CFG_HE_ALL_ACK_STAMIN 0
+#define WNI_CFG_HE_ALL_ACK_STAMAX 1
+#define WNI_CFG_HE_ALL_ACK_STADEF 0
+
+#define WNI_CFG_HE_UL_MU_RSP_SCHEDULING_STAMIN 0
+#define WNI_CFG_HE_UL_MU_RSP_SCHEDULING_STAMAX 1
+#define WNI_CFG_HE_UL_MU_RSP_SCHEDULING_STADEF 0
+
+#define WNI_CFG_HE_BUFFER_STATUS_RPT_STAMIN 0
+#define WNI_CFG_HE_BUFFER_STATUS_RPT_STAMAX 1
+#define WNI_CFG_HE_BUFFER_STATUS_RPT_STADEF 0
+
+#define WNI_CFG_HE_BCAST_TWT_STAMIN 0
+#define WNI_CFG_HE_BCAST_TWT_STAMAX 1
+#define WNI_CFG_HE_BCAST_TWT_STADEF 0
+
+#define WNI_CFG_HE_BA_32BIT_STAMIN 0
+#define WNI_CFG_HE_BA_32BIT_STAMAX 1
+#define WNI_CFG_HE_BA_32BIT_STADEF 0
+
+#define WNI_CFG_HE_MU_CASCADING_STAMIN 0
+#define WNI_CFG_HE_MU_CASCADING_STAMAX 1
+#define WNI_CFG_HE_MU_CASCADING_STADEF 0
+
+#define WNI_CFG_HE_MULTI_TID_STAMIN 0
+#define WNI_CFG_HE_MULTI_TID_STAMAX 1
+#define WNI_CFG_HE_MULTI_TID_STADEF 0
+
+#define WNI_CFG_HE_DL_MU_BA_STAMIN 0
+#define WNI_CFG_HE_DL_MU_BA_STAMAX 1
+#define WNI_CFG_HE_DL_MU_BA_STADEF 0
+
+#define WNI_CFG_HE_OMI_STAMIN 0
+#define WNI_CFG_HE_OMI_STAMAX 1
+#define WNI_CFG_HE_OMI_STADEF 0
+
+#define WNI_CFG_HE_OFDMA_RA_STAMIN 0
+#define WNI_CFG_HE_OFDMA_RA_STAMAX 1
+#define WNI_CFG_HE_OFDMA_RA_STADEF 0
+
+#define WNI_CFG_HE_MAX_AMPDU_LEN_STAMIN 0
+#define WNI_CFG_HE_MAX_AMPDU_LEN_STAMAX 0x3
+#define WNI_CFG_HE_MAX_AMPDU_LEN_STADEF 0
+
+#define WNI_CFG_HE_AMSDU_FRAG_STAMIN 0
+#define WNI_CFG_HE_AMSDU_FRAG_STAMAX 1
+#define WNI_CFG_HE_AMSDU_FRAG_STADEF 0
+
+#define WNI_CFG_HE_FLEX_TWT_SCHED_STAMIN 0
+#define WNI_CFG_HE_FLEX_TWT_SCHED_STAMAX 1
+#define WNI_CFG_HE_FLEX_TWT_SCHED_STADEF 0
+
+#define WNI_CFG_HE_RX_CTRL_STAMIN 0
+#define WNI_CFG_HE_RX_CTRL_STAMAX 1
+#define WNI_CFG_HE_RX_CTRL_STADEF 0
+
+#define WNI_CFG_HE_BSRP_AMPDU_AGGR_STAMIN 0
+#define WNI_CFG_HE_BSRP_AMPDU_AGGR_STAMAX 1
+#define WNI_CFG_HE_BSRP_AMPDU_AGGR_STADEF 0
+
+#define WNI_CFG_HE_QTP_STAMIN 0
+#define WNI_CFG_HE_QTP_STAMAX 1
+#define WNI_CFG_HE_QTP_STADEF 0
+
+#define WNI_CFG_HE_A_BQR_STAMIN 0
+#define WNI_CFG_HE_A_BQR_STAMAX 1
+#define WNI_CFG_HE_A_BQR_STADEF 0
+
+#define WNI_CFG_HE_DUAL_BAND_STAMIN 0
+#define WNI_CFG_HE_DUAL_BAND_STAMAX 1
+#define WNI_CFG_HE_DUAL_BAND_STADEF 0
+
+#define WNI_CFG_HE_CHAN_WIDTH_STAMIN 0
+#define WNI_CFG_HE_CHAN_WIDTH_STAMAX 0x3F
+#define WNI_CFG_HE_CHAN_WIDTH_STADEF 0
+
+#define WNI_CFG_HE_RX_PREAM_PUNC_STAMIN 0
+#define WNI_CFG_HE_RX_PREAM_PUNC_STAMAX 0xF
+#define WNI_CFG_HE_RX_PREAM_PUNC_STADEF 0
+
+#define WNI_CFG_HE_CLASS_OF_DEVICE_STAMIN 0
+#define WNI_CFG_HE_CLASS_OF_DEVICE_STAMAX 1
+#define WNI_CFG_HE_CLASS_OF_DEVICE_STADEF 0
+
+#define WNI_CFG_HE_LDPC_STAMIN 0
+#define WNI_CFG_HE_LDPC_STAMAX 1
+#define WNI_CFG_HE_LDPC_STADEF 0
+
+#define WNI_CFG_HE_LTF_PPDU_STAMIN 0
+#define WNI_CFG_HE_LTF_PPDU_STAMAX 0x3
+#define WNI_CFG_HE_LTF_PPDU_STADEF 0
+
+#define WNI_CFG_HE_LTF_NDP_STAMIN 0
+#define WNI_CFG_HE_LTF_NDP_STAMAX 0x3
+#define WNI_CFG_HE_LTF_NDP_STADEF 0
+
+#define WNI_CFG_HE_STBC_STAMIN 0
+#define WNI_CFG_HE_STBC_STAMAX 0x3
+#define WNI_CFG_HE_STBC_STADEF 0
+
+#define WNI_CFG_HE_DOPPLER_STAMIN 0
+#define WNI_CFG_HE_DOPPLER_STAMAX 0x3
+#define WNI_CFG_HE_DOPPLER_STADEF 0
+
+#define WNI_CFG_HE_UL_MUMIMO_STAMIN 0
+#define WNI_CFG_HE_UL_MUMIMO_STAMAX 0x3
+#define WNI_CFG_HE_UL_MUMIMO_STADEF 0
+
+#define WNI_CFG_HE_DCM_TX_STAMIN 0
+#define WNI_CFG_HE_DCM_TX_STAMAX 0x7
+#define WNI_CFG_HE_DCM_TX_STADEF 0
+
+#define WNI_CFG_HE_DCM_RX_STAMIN 0
+#define WNI_CFG_HE_DCM_RX_STAMAX 0x7
+#define WNI_CFG_HE_DCM_RX_STADEF 0
+
+#define WNI_CFG_HE_MU_PPDU_STAMIN 0
+#define WNI_CFG_HE_MU_PPDU_STAMAX 1
+#define WNI_CFG_HE_MU_PPDU_STADEF 0
+
+#define WNI_CFG_HE_SU_BEAMFORMER_STAMIN 0
+#define WNI_CFG_HE_SU_BEAMFORMER_STAMAX 1
+#define WNI_CFG_HE_SU_BEAMFORMER_STADEF 0
+
+#define WNI_CFG_HE_SU_BEAMFORMEE_STAMIN 0
+#define WNI_CFG_HE_SU_BEAMFORMEE_STAMAX 1
+#define WNI_CFG_HE_SU_BEAMFORMEE_STADEF 0
+
+#define WNI_CFG_HE_MU_BEAMFORMER_STAMIN 0
+#define WNI_CFG_HE_MU_BEAMFORMER_STAMAX 1
+#define WNI_CFG_HE_MU_BEAMFORMER_STADEF 0
+
+#define WNI_CFG_HE_BFEE_STS_LT80_STAMIN 0x3
+#define WNI_CFG_HE_BFEE_STS_LT80_STAMAX 0x7
+#define WNI_CFG_HE_BFEE_STS_LT80_STADEF 0
+
+#define WNI_CFG_HE_NSTS_TOT_LT80_STAMIN 0x3
+#define WNI_CFG_HE_NSTS_TOT_LT80_STAMAX 0x7
+#define WNI_CFG_HE_NSTS_TOT_LT80_STADEF 0
+
+#define WNI_CFG_HE_BFEE_STS_GT80_STAMIN 0x3
+#define WNI_CFG_HE_BFEE_STS_GT80_STAMAX 0x7
+#define WNI_CFG_HE_BFEE_STS_GT80_STADEF 0
+
+#define WNI_CFG_HE_NSTS_TOT_GT80_STAMIN 0x3
+#define WNI_CFG_HE_NSTS_TOT_GT80_STAMAX 0x7
+#define WNI_CFG_HE_NSTS_TOT_GT80_STADEF 0
+
+#define WNI_CFG_HE_NUM_SOUND_LT80_STAMIN 0
+#define WNI_CFG_HE_NUM_SOUND_LT80_STAMAX 0x7
+#define WNI_CFG_HE_NUM_SOUND_LT80_STADEF 0
+
+#define WNI_CFG_HE_NUM_SOUND_GT80_STAMIN 0
+#define WNI_CFG_HE_NUM_SOUND_GT80_STAMAX 0x7
+#define WNI_CFG_HE_NUM_SOUND_GT80_STADEF 0
+
+#define WNI_CFG_HE_SU_FEED_TONE16_STAMIN 0
+#define WNI_CFG_HE_SU_FEED_TONE16_STAMAX 1
+#define WNI_CFG_HE_SU_FEED_TONE16_STADEF 0
+
+#define WNI_CFG_HE_MU_FEED_TONE16_STAMIN 0
+#define WNI_CFG_HE_MU_FEED_TONE16_STAMAX 1
+#define WNI_CFG_HE_MU_FEED_TONE16_STADEF 0
+
+#define WNI_CFG_HE_CODEBOOK_SU_STAMIN 0
+#define WNI_CFG_HE_CODEBOOK_SU_STAMAX 1
+#define WNI_CFG_HE_CODEBOOK_SU_STADEF 0
+
+#define WNI_CFG_HE_CODEBOOK_MU_STAMIN 0
+#define WNI_CFG_HE_CODEBOOK_MU_STAMAX 1
+#define WNI_CFG_HE_CODEBOOK_MU_STADEF 0
+
+#define WNI_CFG_HE_BFRM_FEED_STAMIN 0
+#define WNI_CFG_HE_BFRM_FEED_STAMAX 0x7
+#define WNI_CFG_HE_BFRM_FEED_STADEF 0
+
+#define WNI_CFG_HE_ER_SU_PPDU_STAMIN 0
+#define WNI_CFG_HE_ER_SU_PPDU_STAMAX 1
+#define WNI_CFG_HE_ER_SU_PPDU_STADEF 0
+
+#define WNI_CFG_HE_DL_PART_BW_STAMIN 0
+#define WNI_CFG_HE_DL_PART_BW_STAMAX 1
+#define WNI_CFG_HE_DL_PART_BW_STADEF 0
+
+#define WNI_CFG_HE_PPET_PRESENT_STAMIN 0
+#define WNI_CFG_HE_PPET_PRESENT_STAMAX 1
+#define WNI_CFG_HE_PPET_PRESENT_STADEF 0
+
+#define WNI_CFG_HE_SRP_STAMIN 0
+#define WNI_CFG_HE_SRP_STAMAX 1
+#define WNI_CFG_HE_SRP_STADEF 0
+
+#define WNI_CFG_HE_POWER_BOOST_STAMIN 0
+#define WNI_CFG_HE_POWER_BOOST_STAMAX 1
+#define WNI_CFG_HE_POWER_BOOST_STADEF 0
+
+#define WNI_CFG_HE_4x_LTF_GI_STAMIN 0
+#define WNI_CFG_HE_4x_LTF_GI_STAMAX 1
+#define WNI_CFG_HE_4x_LTF_GI_STADEF 0
+
+#define WNI_CFG_HE_NSS_STAMIN 0
+#define WNI_CFG_HE_NSS_STAMAX 0x7
+#define WNI_CFG_HE_NSS_STADEF 0
+
+#define WNI_CFG_HE_MCS_STAMIN 0
+#define WNI_CFG_HE_MCS_STAMAX 0x7
+#define WNI_CFG_HE_MCS_STADEF 0
+
 #define CFG_STA_MAGIC_DWORD    0xbeefbeef
 
 #endif

core/mac/src/cfg/cfg_proc_msg.c

@@ -1193,7 +1193,257 @@ cgstatic cfg_static[CFG_PARAM_MAX_NUM] = {
 	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
 	WNI_CFG_RATE_FOR_TX_MGMT_STAMIN,
 	WNI_CFG_RATE_FOR_TX_MGMT_STAMAX,
-	WNI_CFG_RATE_FOR_TX_MGMT_STADEF}
+	WNI_CFG_RATE_FOR_TX_MGMT_STADEF},
+	{WNI_CFG_HE_CONTROL,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_CONTROL_STAMIN, WNI_CFG_HE_CONTROL_STAMAX,
+	WNI_CFG_HE_CONTROL_STADEF},
+	{WNI_CFG_HE_TWT_REQUESTOR,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_TWT_REQUESTOR_STAMIN, WNI_CFG_HE_TWT_REQUESTOR_STAMAX,
+	WNI_CFG_HE_TWT_REQUESTOR_STADEF},
+	{WNI_CFG_HE_TWT_RESPONDER,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_TWT_RESPONDER_STAMIN, WNI_CFG_HE_TWT_RESPONDER_STAMAX,
+	WNI_CFG_HE_TWT_RESPONDER_STADEF},
+	{WNI_CFG_HE_FRAGMENTATION,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_FRAGMENTATION_STAMIN, WNI_CFG_HE_FRAGMENTATION_STAMAX,
+	WNI_CFG_HE_FRAGMENTATION_STADEF},
+	{WNI_CFG_HE_MAX_FRAG_MSDU,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_MAX_FRAG_MSDU_STAMIN, WNI_CFG_HE_MAX_FRAG_MSDU_STAMAX,
+	WNI_CFG_HE_MAX_FRAG_MSDU_STADEF},
+	{WNI_CFG_HE_MIN_FRAG_SIZE,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_MIN_FRAG_SIZE_STAMIN, WNI_CFG_HE_MIN_FRAG_SIZE_STAMAX,
+	WNI_CFG_HE_MIN_FRAG_SIZE_STADEF},
+	{WNI_CFG_HE_TRIG_PAD,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_TRIG_PAD_STAMIN, WNI_CFG_HE_TRIG_PAD_STAMAX,
+	WNI_CFG_HE_TRIG_PAD_STADEF},
+	{WNI_CFG_HE_MTID_AGGR,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_MTID_AGGR_STAMIN, WNI_CFG_HE_MTID_AGGR_STAMAX,
+	WNI_CFG_HE_MTID_AGGR_STADEF},
+	{WNI_CFG_HE_LINK_ADAPTATION,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_LINK_ADAPTATION_STAMIN, WNI_CFG_HE_LINK_ADAPTATION_STAMAX,
+	WNI_CFG_HE_LINK_ADAPTATION_STADEF},
+	{WNI_CFG_HE_ALL_ACK,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_ALL_ACK_STAMIN, WNI_CFG_HE_ALL_ACK_STAMAX,
+	WNI_CFG_HE_ALL_ACK_STADEF},
+	{WNI_CFG_HE_UL_MU_RSP_SCHEDULING,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_UL_MU_RSP_SCHEDULING_STAMIN,
+	WNI_CFG_HE_UL_MU_RSP_SCHEDULING_STAMAX,
+	WNI_CFG_HE_UL_MU_RSP_SCHEDULING_STADEF},
+	{WNI_CFG_HE_BUFFER_STATUS_RPT,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_BUFFER_STATUS_RPT_STAMIN,
+	WNI_CFG_HE_BUFFER_STATUS_RPT_STAMAX,
+	WNI_CFG_HE_BUFFER_STATUS_RPT_STADEF},
+	{WNI_CFG_HE_BCAST_TWT,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_BCAST_TWT_STAMIN, WNI_CFG_HE_BCAST_TWT_STAMAX,
+	WNI_CFG_HE_BCAST_TWT_STADEF},
+	{WNI_CFG_HE_BA_32BIT,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_BA_32BIT_STAMIN, WNI_CFG_HE_BA_32BIT_STAMAX,
+	WNI_CFG_HE_BA_32BIT_STADEF},
+	{WNI_CFG_HE_MU_CASCADING,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_MU_CASCADING_STAMIN, WNI_CFG_HE_MU_CASCADING_STAMAX,
+	WNI_CFG_HE_MU_CASCADING_STADEF},
+	{WNI_CFG_HE_MULTI_TID,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_MULTI_TID_STAMIN, WNI_CFG_HE_MULTI_TID_STAMAX,
+	WNI_CFG_HE_MULTI_TID_STADEF},
+	{WNI_CFG_HE_DL_MU_BA,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_DL_MU_BA_STAMIN, WNI_CFG_HE_DL_MU_BA_STAMAX,
+	WNI_CFG_HE_DL_MU_BA_STADEF},
+	{WNI_CFG_HE_OMI,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_OMI_STAMIN, WNI_CFG_HE_OMI_STAMAX,
+	WNI_CFG_HE_OMI_STADEF},
+	{WNI_CFG_HE_OFDMA_RA,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_OFDMA_RA_STAMIN, WNI_CFG_HE_OFDMA_RA_STAMAX,
+	WNI_CFG_HE_OFDMA_RA_STADEF},
+	{WNI_CFG_HE_MAX_AMPDU_LEN,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_MAX_AMPDU_LEN_STAMIN, WNI_CFG_HE_MAX_AMPDU_LEN_STAMAX,
+	WNI_CFG_HE_MAX_AMPDU_LEN_STADEF},
+	{WNI_CFG_HE_AMSDU_FRAG,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_AMSDU_FRAG_STAMIN, WNI_CFG_HE_AMSDU_FRAG_STAMAX,
+	WNI_CFG_HE_AMSDU_FRAG_STADEF},
+	{WNI_CFG_HE_FLEX_TWT_SCHED,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_FLEX_TWT_SCHED_STAMIN, WNI_CFG_HE_FLEX_TWT_SCHED_STAMAX,
+	WNI_CFG_HE_FLEX_TWT_SCHED_STADEF},
+	{WNI_CFG_HE_RX_CTRL,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_RX_CTRL_STAMIN, WNI_CFG_HE_RX_CTRL_STAMAX,
+	WNI_CFG_HE_RX_CTRL_STADEF},
+	{WNI_CFG_HE_BSRP_AMPDU_AGGR,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_BSRP_AMPDU_AGGR_STAMIN, WNI_CFG_HE_BSRP_AMPDU_AGGR_STAMAX,
+	WNI_CFG_HE_BSRP_AMPDU_AGGR_STADEF},
+	{WNI_CFG_HE_QTP,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_QTP_STAMIN, WNI_CFG_HE_QTP_STAMAX,
+	WNI_CFG_HE_QTP_STADEF},
+	{WNI_CFG_HE_A_BQR,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_A_BQR_STAMIN, WNI_CFG_HE_A_BQR_STAMAX,
+	WNI_CFG_HE_A_BQR_STADEF},
+	{WNI_CFG_HE_DUAL_BAND,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_DUAL_BAND_STAMIN, WNI_CFG_HE_DUAL_BAND_STAMAX,
+	WNI_CFG_HE_DUAL_BAND_STADEF},
+	{WNI_CFG_HE_CHAN_WIDTH,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_CHAN_WIDTH_STAMIN, WNI_CFG_HE_CHAN_WIDTH_STAMAX,
+	WNI_CFG_HE_CHAN_WIDTH_STADEF},
+	{WNI_CFG_HE_RX_PREAM_PUNC,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_RX_PREAM_PUNC_STAMIN, WNI_CFG_HE_RX_PREAM_PUNC_STAMAX,
+	WNI_CFG_HE_RX_PREAM_PUNC_STADEF},
+	{WNI_CFG_HE_CLASS_OF_DEVICE,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_CLASS_OF_DEVICE_STAMIN, WNI_CFG_HE_CLASS_OF_DEVICE_STAMAX,
+	WNI_CFG_HE_CLASS_OF_DEVICE_STADEF},
+	{WNI_CFG_HE_LDPC,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_LDPC_STAMIN, WNI_CFG_HE_LDPC_STAMAX,
+	WNI_CFG_HE_LDPC_STADEF},
+	{WNI_CFG_HE_LTF_PPDU,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_LTF_PPDU_STAMIN, WNI_CFG_HE_LTF_PPDU_STAMAX,
+	WNI_CFG_HE_LTF_PPDU_STADEF},
+	{WNI_CFG_HE_LTF_NDP,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_LTF_NDP_STAMIN, WNI_CFG_HE_LTF_NDP_STAMAX,
+	WNI_CFG_HE_LTF_NDP_STADEF},
+	{WNI_CFG_HE_STBC,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_STBC_STAMIN, WNI_CFG_HE_STBC_STAMAX,
+	WNI_CFG_HE_STBC_STADEF},
+	{WNI_CFG_HE_DOPPLER,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_DOPPLER_STAMIN, WNI_CFG_HE_DOPPLER_STAMAX,
+	WNI_CFG_HE_DOPPLER_STADEF},
+	{WNI_CFG_HE_UL_MUMIMO,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_UL_MUMIMO_STAMIN, WNI_CFG_HE_UL_MUMIMO_STAMAX,
+	WNI_CFG_HE_UL_MUMIMO_STADEF},
+	{WNI_CFG_HE_DCM_TX,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_DCM_TX_STAMIN, WNI_CFG_HE_DCM_TX_STAMAX,
+	WNI_CFG_HE_DCM_TX_STADEF},
+	{WNI_CFG_HE_DCM_RX,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_DCM_RX_STAMIN, WNI_CFG_HE_DCM_RX_STAMAX,
+	WNI_CFG_HE_DCM_RX_STADEF},
+	{WNI_CFG_HE_MU_PPDU,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_MU_PPDU_STAMIN, WNI_CFG_HE_MU_PPDU_STAMAX,
+	WNI_CFG_HE_MU_PPDU_STADEF},
+	{WNI_CFG_HE_SU_BEAMFORMER,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_SU_BEAMFORMER_STAMIN, WNI_CFG_HE_SU_BEAMFORMER_STAMAX,
+	WNI_CFG_HE_SU_BEAMFORMER_STADEF},
+	{WNI_CFG_HE_SU_BEAMFORMEE,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_SU_BEAMFORMEE_STAMIN, WNI_CFG_HE_SU_BEAMFORMEE_STAMAX,
+	WNI_CFG_HE_SU_BEAMFORMEE_STADEF},
+	{WNI_CFG_HE_MU_BEAMFORMER,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_MU_BEAMFORMER_STAMIN, WNI_CFG_HE_MU_BEAMFORMER_STAMAX,
+	WNI_CFG_HE_MU_BEAMFORMER_STADEF},
+	{WNI_CFG_HE_BFEE_STS_LT80,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_BFEE_STS_LT80_STAMIN, WNI_CFG_HE_BFEE_STS_LT80_STAMAX,
+	WNI_CFG_HE_BFEE_STS_LT80_STADEF},
+	{WNI_CFG_HE_NSTS_TOT_LT80,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_NSTS_TOT_LT80_STAMIN, WNI_CFG_HE_NSTS_TOT_LT80_STAMAX,
+	WNI_CFG_HE_NSTS_TOT_LT80_STADEF},
+	{WNI_CFG_HE_BFEE_STS_GT80,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_BFEE_STS_GT80_STAMIN, WNI_CFG_HE_BFEE_STS_GT80_STAMAX,
+	WNI_CFG_HE_BFEE_STS_GT80_STADEF},
+	{WNI_CFG_HE_NSTS_TOT_GT80,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_NSTS_TOT_GT80_STAMIN, WNI_CFG_HE_NSTS_TOT_GT80_STAMAX,
+	WNI_CFG_HE_NSTS_TOT_GT80_STADEF},
+	{WNI_CFG_HE_NUM_SOUND_LT80,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_NUM_SOUND_LT80_STAMIN, WNI_CFG_HE_NUM_SOUND_LT80_STAMAX,
+	WNI_CFG_HE_NUM_SOUND_LT80_STADEF},
+	{WNI_CFG_HE_NUM_SOUND_GT80,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_NUM_SOUND_GT80_STAMIN, WNI_CFG_HE_NUM_SOUND_GT80_STAMAX,
+	WNI_CFG_HE_NUM_SOUND_GT80_STADEF},
+	{WNI_CFG_HE_SU_FEED_TONE16,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_SU_FEED_TONE16_STAMIN, WNI_CFG_HE_SU_FEED_TONE16_STAMAX,
+	WNI_CFG_HE_SU_FEED_TONE16_STADEF},
+	{WNI_CFG_HE_MU_FEED_TONE16,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_MU_FEED_TONE16_STAMIN, WNI_CFG_HE_MU_FEED_TONE16_STAMAX,
+	WNI_CFG_HE_MU_FEED_TONE16_STADEF},
+	{WNI_CFG_HE_CODEBOOK_SU,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_CODEBOOK_SU_STAMIN, WNI_CFG_HE_CODEBOOK_SU_STAMAX,
+	WNI_CFG_HE_CODEBOOK_SU_STADEF},
+	{WNI_CFG_HE_CODEBOOK_MU,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_CODEBOOK_MU_STAMIN, WNI_CFG_HE_CODEBOOK_MU_STAMAX,
+	WNI_CFG_HE_CODEBOOK_MU_STADEF},
+	{WNI_CFG_HE_BFRM_FEED,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_BFRM_FEED_STAMIN, WNI_CFG_HE_BFRM_FEED_STAMAX,
+	WNI_CFG_HE_BFRM_FEED_STADEF},
+	{WNI_CFG_HE_ER_SU_PPDU,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_ER_SU_PPDU_STAMIN, WNI_CFG_HE_ER_SU_PPDU_STAMAX,
+	WNI_CFG_HE_ER_SU_PPDU_STADEF},
+	{WNI_CFG_HE_DL_PART_BW,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_DL_PART_BW_STAMIN, WNI_CFG_HE_DL_PART_BW_STAMAX,
+	WNI_CFG_HE_DL_PART_BW_STADEF},
+	{WNI_CFG_HE_PPET_PRESENT,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_PPET_PRESENT_STAMIN, WNI_CFG_HE_PPET_PRESENT_STAMAX,
+	WNI_CFG_HE_PPET_PRESENT_STADEF},
+	{WNI_CFG_HE_SRP,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_SRP_STAMIN, WNI_CFG_HE_SRP_STAMAX,
+	WNI_CFG_HE_SRP_STADEF},
+	{WNI_CFG_HE_POWER_BOOST,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_POWER_BOOST_STAMIN, WNI_CFG_HE_POWER_BOOST_STAMAX,
+	WNI_CFG_HE_POWER_BOOST_STADEF},
+	{WNI_CFG_HE_4x_LTF_GI,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_4x_LTF_GI_STAMIN, WNI_CFG_HE_4x_LTF_GI_STAMAX,
+	WNI_CFG_HE_4x_LTF_GI_STADEF},
+	{WNI_CFG_HE_NSS,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_NSS_STAMIN, WNI_CFG_HE_NSS_STAMAX,
+	WNI_CFG_HE_NSS_STADEF},
+	{WNI_CFG_HE_MCS,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE | CFG_CTL_INT,
+	WNI_CFG_HE_MCS_STAMIN, WNI_CFG_HE_MCS_STAMAX,
+	WNI_CFG_HE_MCS_STADEF},
+	{WNI_CFG_HE_PPET,
+	CFG_CTL_VALID | CFG_CTL_RE | CFG_CTL_WE,
+	0, 0, 0}
 };
 
 
@@ -1390,7 +1640,12 @@ cfgstatic_string cfg_static_string[CFG_MAX_STATIC_STRING] = {
 	{WNI_CFG_WPS_UUID,
 	WNI_CFG_WPS_UUID_LEN,
 	6,
-	{0xa, 0xb, 0xc, 0xd, 0xe, 0xf} }
+	{0xa, 0xb, 0xc, 0xd, 0xe, 0xf} },
+	{WNI_CFG_HE_PPET,
+	WNI_CFG_HE_PPET_LEN,
+	WNI_CFG_HE_PPET_LEN,
+	{0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0,
+	 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0} }
 };
 
 /*--------------------------------------------------------------------*/