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@@ -1,7 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
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- * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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+ * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <linux/iopoll.h>
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@@ -697,13 +697,14 @@ static int cam_tfe_csid_cid_reserve(struct cam_tfe_csid_hw *csid_hw,
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const struct cam_tfe_csid_reg_offset *csid_reg;
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CAM_DBG(CAM_ISP,
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- "CSID:%d res_id:0x%x Lane type:%d lane_num:%d dt:%d vc:%d",
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+ "CSID:%d res_id:0x%x Lane type:%d lane_num:%d dt:%d vc:%d, is_EPD: %d",
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csid_hw->hw_intf->hw_idx,
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cid_reserv->in_port->res_id,
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cid_reserv->in_port->lane_type,
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cid_reserv->in_port->lane_num,
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cid_reserv->in_port->dt[0],
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- cid_reserv->in_port->vc[0]);
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+ cid_reserv->in_port->vc[0],
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+ cid_reserv->in_port->epd_supported);
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if (cid_reserv->in_port->res_id >= CAM_ISP_TFE_IN_RES_MAX) {
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CAM_ERR(CAM_ISP, "CSID:%d Invalid phy sel %d",
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@@ -801,6 +802,8 @@ static int cam_tfe_csid_cid_reserve(struct cam_tfe_csid_hw *csid_hw,
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cid_reserv->in_port->lane_type;
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csid_hw->csi2_rx_cfg.lane_num =
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cid_reserv->in_port->lane_num;
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+ if (cid_reserv->in_port->epd_supported)
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+ csid_hw->csi2_rx_cfg.epd_supported = 1;
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switch (cid_reserv->in_port->res_id) {
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case CAM_ISP_TFE_IN_RES_TPG:
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@@ -1101,6 +1104,10 @@ static int cam_tfe_csid_enable_csi2(
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/* enable packet ecc correction */
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val |= 1;
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+ /* enable epd mode */
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+ if (csid_hw->csi2_rx_cfg.epd_supported)
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+ val |= (csid_hw->csi2_rx_cfg.epd_supported <<
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+ csid_reg->csi2_reg->csi2_rx_epd_mode_shift_en);
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cam_io_w_mb(val, soc_info->reg_map[0].mem_base +
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csid_reg->csi2_reg->csid_csi2_rx_cfg1_addr);
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@@ -1119,6 +1126,10 @@ static int cam_tfe_csid_enable_csi2(
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TFE_CSID_CSI2_RX_ERROR_UNBOUNDED_FRAME |
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TFE_CSID_CSI2_RX_ERROR_CPHY_PH_CRC;
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+ if (csid_hw->csi2_rx_cfg.epd_supported &&
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+ (csid_hw->csi2_rx_cfg.lane_type == CAM_ISP_LANE_TYPE_DPHY))
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+ val &= ~TFE_CSID_CSI2_RX_ERROR_CPHY_EOT_RECEPTION;
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+
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/* Enable the interrupt based on csid debug info set */
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if (csid_hw->csid_debug & TFE_CSID_DEBUG_ENABLE_SOT_IRQ)
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val |= TFE_CSID_CSI2_RX_INFO_PHY_DL0_SOT_CAPTURED |
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@@ -3948,8 +3959,16 @@ irqreturn_t cam_tfe_csid_irq(int irq_num, void *data)
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}
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if (irq_status[TFE_CSID_IRQ_REG_RX] &
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- TFE_CSID_CSI2_RX_ERROR_CPHY_EOT_RECEPTION)
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- csid_hw->error_irq_count++;
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+ TFE_CSID_CSI2_RX_ERROR_CPHY_EOT_RECEPTION) {
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+ if (csid_hw->csi2_rx_cfg.epd_supported)
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+ CAM_DBG(CAM_ISP,
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+ "CSID[%u] Rcvd Only ERROR_EOT for EPD sensor PHY type: %s(%u)",
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+ csid_hw->hw_intf->hw_idx,
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+ (csid_hw->csi2_rx_cfg.lane_type) ? "cphy" : "dphy",
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+ csid_hw->csi2_rx_cfg.lane_type);
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+ else
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+ csid_hw->error_irq_count++;
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+ }
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if (irq_status[TFE_CSID_IRQ_REG_RX] &
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TFE_CSID_CSI2_RX_ERROR_CPHY_SOT_RECEPTION)
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