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disp: msm: sde: add partial update support for spr block

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This change adds support for regdma accelerated programming of
partial update offsets for SPR hw block and validation of ROI
during atomic check based on SPR hw block limitations.

Change-Id: I9e20af4ba7752e8a4af5e9738612c57603163744
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
This commit is contained in:
Prabhanjan Kandula
2019-09-05 09:12:20 -07:00
committed by Gerrit - the friendly Code Review server
parent d94c7aef02
commit ebc5d6c7da
7 changed files with 155 additions and 3 deletions
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20
msm/sde/sde_hw_dspp.c
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@@ -276,11 +276,25 @@ static void dspp_rc(struct sde_hw_dspp *c)
static void dspp_spr(struct sde_hw_dspp *c)
{
int ret = 0;
if (!c) {
SDE_ERROR("invalid arguments\n");
return;
}
c->ops.setup_spr_init_config = NULL;
c->ops.setup_spr_pu_config = NULL;
if (c->cap->sblk->spr.version == SDE_COLOR_PROCESS_VER(0x1, 0x0)) {
reg_dmav1_init_dspp_op_v4(SDE_DSPP_SPR, c->idx);
ret = reg_dmav1_init_dspp_op_v4(SDE_DSPP_SPR, c->idx);
if (ret) {
SDE_ERROR("regdma init failed for spr, ret %d\n", ret);
return;
}
c->ops.setup_spr_init_config = reg_dmav1_setup_spr_init_cfgv1;
} else {
c->ops.setup_spr_init_config = NULL;
c->ops.setup_spr_pu_config = reg_dmav1_setup_spr_pu_cfgv1;
}
}