wcd939x: update register defaults for wcd939x codec
Few register default values are incorrectly set for harmonium codec in the register map table. Fix it by setting correct values as per the hardware interface documentation. Change-Id: Ibcb517d6050a4932243ead396e6f89294aab4a23 Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
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@@ -1,7 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2018-2019, 2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <linux/regmap.h>
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@@ -63,12 +63,12 @@ static struct reg_default wcd939x_defaults[] = {
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{WCD939X_MICB2_TEST_CTL_1, 0x1a},
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{WCD939X_MICB2_TEST_CTL_2, 0x00},
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{WCD939X_MICB2_TEST_CTL_3, 0x24},
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{WCD939X_MICB3_TEST_CTL_1, 0x1a},
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{WCD939X_MICB3_TEST_CTL_2, 0x00},
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{WCD939X_MICB3_TEST_CTL_3, 0xa4},
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{WCD939X_MICB3_TEST_CTL_1, 0x9a},
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{WCD939X_MICB3_TEST_CTL_2, 0x80},
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{WCD939X_MICB3_TEST_CTL_3, 0x24},
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{WCD939X_MICB4_TEST_CTL_1, 0x1a},
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{WCD939X_MICB4_TEST_CTL_2, 0x00},
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{WCD939X_MICB4_TEST_CTL_3, 0xa4},
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{WCD939X_MICB4_TEST_CTL_2, 0x80},
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{WCD939X_MICB4_TEST_CTL_3, 0x24},
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{WCD939X_ADC_VCM, 0x39},
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{WCD939X_BIAS_ATEST, 0xe0},
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{WCD939X_SPARE1, 0x00},
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@@ -380,6 +380,7 @@ static int wcd939x_set_swr_clk_rate(struct snd_soc_component *component,
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static int wcd939x_init_reg(struct snd_soc_component *component)
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{
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struct wcd939x_priv *wcd939x = snd_soc_component_get_drvdata(component);
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snd_soc_component_update_bits(component,
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REG_FIELD_VALUE(BIAS, ANALOG_BIAS_EN, 0x01));
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@@ -436,7 +437,8 @@ static int wcd939x_init_reg(struct snd_soc_component *component)
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snd_soc_component_update_bits(component,
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REG_FIELD_VALUE(HPH_OCP_CTL, SCD_OP_EN, 0x01));
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snd_soc_component_write(component, WCD939X_CFG0, 0x05);
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if (wcd939x->version != WCD939X_VERSION_2_0)
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snd_soc_component_write(component, WCD939X_CFG0, 0x05);
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return 0;
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}
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