disp: msm: restrict AVR_STEP based on panel requirement
Some panels require a fixed step rate for a particular mode. This change allows DSI panels to specify a single supported step rate for each nominal fps rate which SDE will enforce during atomic check of AVR parameters. Change-Id: I049415449bc88ccd396fced16d4534251eac3a06 Signed-off-by: Steve Cohen <cohens@codeaurora.org>
此提交包含在:
@@ -1239,6 +1239,38 @@ error:
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return rc;
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}
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static int dsi_panel_parse_avr_caps(struct dsi_panel *panel,
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struct device_node *of_node)
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{
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struct dsi_avr_capabilities *avr_caps = &panel->avr_caps;
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struct dsi_parser_utils *utils = &panel->utils;
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int val, rc = 0;
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val = utils->count_u32_elems(utils->data, "qcom,dsi-qsync-avr-step-list");
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if (val <= 0) {
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DSI_DEBUG("[%s] optional avr step list not defined, val:%d\n", panel->name, val);
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return rc;
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} else if (val > 1 && val != panel->dfps_caps.dfps_list_len) {
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DSI_ERR("[%s] avr step list size %d not same as dfps list %d\n",
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val, panel->dfps_caps.dfps_list_len);
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return -EINVAL;
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}
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avr_caps->avr_step_fps_list = kcalloc(val, sizeof(u32), GFP_KERNEL);
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if (!avr_caps->avr_step_fps_list)
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return -ENOMEM;
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rc = utils->read_u32_array(utils->data, "qcom,dsi-qsync-avr-step-list",
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avr_caps->avr_step_fps_list, val);
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if (rc) {
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kfree(avr_caps->avr_step_fps_list);
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return rc;
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}
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avr_caps->avr_step_fps_list_len = val;
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return rc;
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}
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static int dsi_panel_parse_qsync_caps(struct dsi_panel *panel,
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struct device_node *of_node)
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{
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@@ -3509,6 +3541,10 @@ struct dsi_panel *dsi_panel_get(struct device *parent,
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if (rc)
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DSI_DEBUG("failed to parse qsync features, rc=%d\n", rc);
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rc = dsi_panel_parse_avr_caps(panel, of_node);
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if (rc)
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DSI_ERR("failed to parse AVR features, rc=%d\n", rc);
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rc = dsi_panel_parse_dyn_clk_caps(panel);
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if (rc)
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DSI_ERR("failed to parse dynamic clk config, rc=%d\n", rc);
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@@ -3594,6 +3630,7 @@ void dsi_panel_put(struct dsi_panel *panel)
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/* free resources allocated for ESD check */
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dsi_panel_esd_config_deinit(&panel->esd_config);
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kfree(panel->avr_caps.avr_step_fps_list);
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kfree(panel);
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}
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