From cb4f39024181943c01bb91954b80594719f62417 Mon Sep 17 00:00:00 2001 From: Jeykumar Sankaran Date: Tue, 19 May 2020 19:40:09 -0700 Subject: [PATCH 1/4] disp: msm: sde: add helper api to check executing VM Adds a DT property to indicate trusted VM execution environment and support catalog parsing for the same. Add helper API to read the value. Change-Id: I9194618b6f080119f1f15271a9b3c7edf938ca08 Signed-off-by: Jeykumar Sankaran --- msm/sde/sde_hw_catalog.c | 4 ++++ msm/sde/sde_hw_catalog.h | 3 +++ msm/sde/sde_kms.h | 13 +++++++++++++ 3 files changed, 20 insertions(+) diff --git a/msm/sde/sde_hw_catalog.c b/msm/sde/sde_hw_catalog.c index 711bcd7c66..953fb3d1d7 100644 --- a/msm/sde/sde_hw_catalog.c +++ b/msm/sde/sde_hw_catalog.c @@ -201,6 +201,7 @@ enum sde_prop { PIPE_ORDER_VERSION, SEC_SID_MASK, BASE_LAYER, + TRUSTED_VM_ENV, SDE_PROP_MAX, }; @@ -571,6 +572,7 @@ static struct sde_prop_type sde_prop[] = { PROP_TYPE_U32}, {SEC_SID_MASK, "qcom,sde-secure-sid-mask", false, PROP_TYPE_U32_ARRAY}, {BASE_LAYER, "qcom,sde-mixer-stage-base-layer", false, PROP_TYPE_BOOL}, + {TRUSTED_VM_ENV, "qcom,sde-trusted-vm-env", false, PROP_TYPE_BOOL}, }; static struct sde_prop_type sde_perf_prop[] = { @@ -3733,6 +3735,8 @@ static void _sde_top_parse_dt_helper(struct sde_mdss_cfg *cfg, cfg->has_base_layer = PROP_VALUE_ACCESS(props->values, BASE_LAYER, 0); cfg->qseed_hw_version = PROP_VALUE_ACCESS(props->values, QSEED_HW_VERSION, 0); + cfg->trusted_vm_env = PROP_VALUE_ACCESS(props->values, TRUSTED_VM_ENV, + 0); } static int sde_top_parse_dt(struct device_node *np, struct sde_mdss_cfg *cfg) diff --git a/msm/sde/sde_hw_catalog.h b/msm/sde/sde_hw_catalog.h index 6246699f9e..89309359aa 100644 --- a/msm/sde/sde_hw_catalog.h +++ b/msm/sde/sde_hw_catalog.h @@ -1360,6 +1360,8 @@ struct sde_perf_cfg { * this HW version. Contains number of instances, * register offsets, capabilities of the all MDSS HW sub-blocks. * + * @trusted_vm_env set to true, if the driver is executing in + * the trusted VM. false, otherwise. * @max_sspp_linewidth max source pipe line width support. * @vig_sspp_linewidth max vig source pipe line width support. * @scaling_linewidth max vig source pipe linewidth for scaling usecases @@ -1432,6 +1434,7 @@ struct sde_perf_cfg { */ struct sde_mdss_cfg { u32 hwversion; + bool trusted_vm_env; u32 max_sspp_linewidth; u32 vig_sspp_linewidth; diff --git a/msm/sde/sde_kms.h b/msm/sde/sde_kms.h index 7a9db1ae24..bd383e3ea2 100644 --- a/msm/sde/sde_kms.h +++ b/msm/sde/sde_kms.h @@ -642,6 +642,19 @@ static inline bool sde_kms_rect_is_null(const struct sde_rect *r) return (!r->w || !r->h); } +/* + * sde_in_trusted_vm - checks the executing VM + * return: true, if the device driver is executing in the trusted VM + * false, if the device driver is executing in the primary VM + */ +static inline bool sde_in_trusted_vm(const struct sde_kms *sde_kms) +{ + if (sde_kms && sde_kms->catalog) + return sde_kms->catalog->trusted_vm_env; + + return false; +} + /** * Vblank enable/disable functions */ From e81f110f6eda74a4751fe101af803f508b8ce1b6 Mon Sep 17 00:00:00 2001 From: Jeykumar Sankaran Date: Tue, 19 May 2020 20:52:59 -0700 Subject: [PATCH 2/4] disp: msm: sde: make mnoc icc paths optional ICC frameworks may not be enabled for all the OS environments. SDE is expected to work in the environments where ICC paths are not defined e.g Trusted VM. Except mnoc bus, SDE is keeping all the other paths optional. This change adds mnoc bus to the optional list. Change-Id: I1e3d31a3b0f49fb32041bc7e2192b014f6497267 Signed-off-by: Jeykumar Sankaran --- msm/sde_power_handle.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/msm/sde_power_handle.c b/msm/sde_power_handle.c index ff94796112..c0f3774fa3 100644 --- a/msm/sde_power_handle.c +++ b/msm/sde_power_handle.c @@ -446,8 +446,7 @@ static int sde_power_mnoc_bus_parse(struct platform_device *pdev, /* at least one databus path is required */ if (!pdbus->data_paths_cnt) { - pr_err("missing required interconnect:%s, rc:%d\n", name, rc); - return -EINVAL; + pr_info("mnoc interconnect path(s) not defined, rc: %d\n", rc); } else if (rc) { pr_info("ignoring error %d for non-primary data path\n", rc); rc = 0; From 935af8104ae058bcdd6f3dfc07d1a143027b081d Mon Sep 17 00:00:00 2001 From: Jeykumar Sankaran Date: Tue, 19 May 2020 20:55:00 -0700 Subject: [PATCH 3/4] disp: msm: sde: avoid MDSS register access during boot in trusted VM Trusted VM will be assigned MDSS HW access dynamically only on TUI use case start boundary. So, any HW access during the boot sequence will result in stage2 faults. But SDE driver initializes few HW blocks during the boot up sequence. This change fixes them by either skipping those accesses, if those registers expected to be programmed by the Primary VM or postponing those accesses until the HW is assigned. Change-Id: Ic85238c5d734e9ac993072374c1b0ae661708fca Signed-off-by: Jeykumar Sankaran --- msm/sde/sde_core_irq.c | 21 ++++++++++++--------- msm/sde/sde_hw_cdm.c | 5 +++-- msm/sde/sde_kms.c | 9 +++++++-- 3 files changed, 22 insertions(+), 13 deletions(-) diff --git a/msm/sde/sde_core_irq.c b/msm/sde/sde_core_irq.c index 81e43c18b2..4026be94c4 100644 --- a/msm/sde/sde_core_irq.c +++ b/msm/sde/sde_core_irq.c @@ -464,16 +464,19 @@ void sde_core_irq_preinstall(struct sde_kms *sde_kms) return; } - rc = pm_runtime_get_sync(sde_kms->dev->dev); - if (rc < 0) { - SDE_ERROR("failed to enable power resource %d\n", rc); - SDE_EVT32(rc, SDE_EVTLOG_ERROR); - return; - } + if (!sde_in_trusted_vm(sde_kms)) { + rc = pm_runtime_get_sync(sde_kms->dev->dev); + if (rc < 0) { + SDE_ERROR("failed to enable power resource %d\n", rc); + SDE_EVT32(rc, SDE_EVTLOG_ERROR); + return; + } - sde_clear_all_irqs(sde_kms); - sde_disable_all_irqs(sde_kms); - pm_runtime_put_sync(sde_kms->dev->dev); + sde_clear_all_irqs(sde_kms); + sde_disable_all_irqs(sde_kms); + + pm_runtime_put_sync(sde_kms->dev->dev); + } spin_lock_init(&sde_kms->irq_obj.cb_lock); diff --git a/msm/sde/sde_hw_cdm.c b/msm/sde/sde_hw_cdm.c index df25ce8df2..3344a85cb5 100644 --- a/msm/sde/sde_hw_cdm.c +++ b/msm/sde/sde_hw_cdm.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only /* - * Copyright (c) 2015-2019, The Linux Foundation. All rights reserved. + * Copyright (c) 2015-2020, The Linux Foundation. All rights reserved. */ #include "sde_hw_mdss.h" @@ -341,7 +341,8 @@ struct sde_hw_cdm *sde_hw_cdm_init(enum sde_cdm idx, * Perform any default initialization for the chroma down module * @setup default csc coefficients */ - sde_hw_cdm_setup_csc_10bit(c, &rgb2yuv_cfg); + if (!m->trusted_vm_env) + sde_hw_cdm_setup_csc_10bit(c, &rgb2yuv_cfg); return c; diff --git a/msm/sde/sde_kms.c b/msm/sde/sde_kms.c index d420d23dd3..f36b24c7e7 100644 --- a/msm/sde/sde_kms.c +++ b/msm/sde/sde_kms.c @@ -3156,15 +3156,20 @@ static void sde_kms_handle_power_event(u32 event_type, void *usr) if (event_type == SDE_POWER_EVENT_POST_ENABLE) { sde_irq_update(msm_kms, true); - if (sde_kms->splash_data.num_splash_displays) + sde_kms->first_kickoff = true; + if (sde_kms->splash_data.num_splash_displays || + sde_in_trusted_vm(sde_kms)) return; + sde_vbif_init_memtypes(sde_kms); sde_kms_init_shared_hw(sde_kms); _sde_kms_set_lutdma_vbif_remap(sde_kms); - sde_kms->first_kickoff = true; } else if (event_type == SDE_POWER_EVENT_PRE_DISABLE) { sde_irq_update(msm_kms, false); sde_kms->first_kickoff = false; + if (sde_in_trusted_vm(sde_kms)) + return; + _sde_kms_active_override(sde_kms, true); if (!is_sde_rsc_available(SDE_RSC_INDEX)) sde_vbif_axi_halt_request(sde_kms); From 06ab29478dcaa2424216df4daa0bc856b92acc81 Mon Sep 17 00:00:00 2001 From: Jeykumar Sankaran Date: Tue, 19 May 2020 21:02:56 -0700 Subject: [PATCH 4/4] disp: msm: sde: avoid physical encoder disable(s) in trusted VM VM switches during TUI usecase are expected to be seamless i.e without display reset. In SDE language, this translates to respective display drivers not tearing down the HW pipeline while releasing the HW. In Primary VM, this taken care by keeping the DRM pipeline alive when TUI is active. In Trusted VM, since the client creates and destroys the display per session, checks are needed to bypass the physical encoder disable(s). Change-Id: Iac42f02806962405c9364b1ffed85778229977e9 Signed-off-by: Jeykumar Sankaran --- msm/sde/sde_encoder.c | 3 ++- msm/sde/sde_encoder_phys_cmd.c | 17 ++++++++++------- msm/sde/sde_encoder_phys_vid.c | 3 +++ 3 files changed, 15 insertions(+), 8 deletions(-) diff --git a/msm/sde/sde_encoder.c b/msm/sde/sde_encoder.c index 364ebcb5d2..600f495aef 100644 --- a/msm/sde/sde_encoder.c +++ b/msm/sde/sde_encoder.c @@ -2802,7 +2802,8 @@ static void sde_encoder_virt_disable(struct drm_encoder *drm_enc) * and after physical encoder is disabled, to make sure timing * engine is already disabled (for video mode). */ - sde_encoder_dce_disable(sde_enc); + if (!sde_in_trusted_vm(sde_kms)) + sde_encoder_dce_disable(sde_enc); sde_encoder_resource_control(drm_enc, SDE_ENC_RC_EVENT_STOP); diff --git a/msm/sde/sde_encoder_phys_cmd.c b/msm/sde/sde_encoder_phys_cmd.c index 6fb59e4ba8..0afc05c47e 100644 --- a/msm/sde/sde_encoder_phys_cmd.c +++ b/msm/sde/sde_encoder_phys_cmd.c @@ -1315,13 +1315,16 @@ static void sde_encoder_phys_cmd_disable(struct sde_encoder_phys *phys_enc) return; } - if (phys_enc->has_intf_te && phys_enc->hw_intf->ops.enable_tearcheck) - phys_enc->hw_intf->ops.enable_tearcheck( - phys_enc->hw_intf, - false); - else if (phys_enc->hw_pp->ops.enable_tearcheck) - phys_enc->hw_pp->ops.enable_tearcheck(phys_enc->hw_pp, - false); + if (!sde_in_trusted_vm(phys_enc->sde_kms)) { + if (phys_enc->has_intf_te && + phys_enc->hw_intf->ops.enable_tearcheck) + phys_enc->hw_intf->ops.enable_tearcheck( + phys_enc->hw_intf, + false); + else if (phys_enc->hw_pp->ops.enable_tearcheck) + phys_enc->hw_pp->ops.enable_tearcheck(phys_enc->hw_pp, + false); + } phys_enc->enable_state = SDE_ENC_DISABLED; } diff --git a/msm/sde/sde_encoder_phys_vid.c b/msm/sde/sde_encoder_phys_vid.c index bb5be3de9d..5898eea83c 100644 --- a/msm/sde/sde_encoder_phys_vid.c +++ b/msm/sde/sde_encoder_phys_vid.c @@ -1061,6 +1061,9 @@ static void sde_encoder_phys_vid_disable(struct sde_encoder_phys *phys_enc) return; } + if (sde_in_trusted_vm(phys_enc->sde_kms)) + goto exit; + spin_lock_irqsave(phys_enc->enc_spinlock, lock_flags); phys_enc->hw_intf->ops.enable_timing(phys_enc->hw_intf, 0); sde_encoder_phys_inc_pending(phys_enc);