qcacmn: Fix reo reinjection path

Add 2 hal soc ops, hal_msdu_desc_info_set and
hal_mpdu_desc_info_se for berilliyum datapath.
Attach hal_rx_msdu_ext_desc_info_get_ptr_be to its function
pointer.
Get reo queue descriptor address as a 5 byte value as in
beryllium datapath it is being obtained from rx packet tlv.

Change-Id: Ia58597384e1a3d5eec493b865a88bab4f209502d
CRs-Fixed: 3084532
This commit is contained in:
Ananya Gupta
2021-11-18 18:19:41 +05:30
committed by Madan Koyyalamudi
parent de814c9b16
commit e5a33cd5b6
7 changed files with 61 additions and 11 deletions

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@@ -1240,7 +1240,8 @@ static QDF_STATUS dp_rx_defrag_reo_reinject(struct dp_peer *peer,
void *link_desc_va;
void *msdu0, *msdu_desc_info;
void *ent_ring_desc, *ent_mpdu_desc_info, *ent_qdesc_addr;
void *dst_mpdu_desc_info, *dst_qdesc_addr;
void *dst_mpdu_desc_info;
uint64_t dst_qdesc_addr;
qdf_dma_addr_t paddr;
uint32_t nbuf_len, seq_no, dst_ind;
uint32_t *mpdu_wrd;
@@ -1388,7 +1389,7 @@ static QDF_STATUS dp_rx_defrag_reo_reinject(struct dp_peer *peer,
(uint8_t *)dst_ring_desc,
qdf_nbuf_data(head));
qdf_mem_copy(ent_qdesc_addr, dst_qdesc_addr, 5);
qdf_mem_copy(ent_qdesc_addr, &dst_qdesc_addr, 5);
hal_set_reo_ent_desc_reo_dest_ind(soc->hal_soc,
(uint8_t *)ent_ring_desc, dst_ind);

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@@ -868,6 +868,44 @@ void hal_cookie_conversion_reg_cfg_be(hal_soc_handle_t hal_soc_hdl,
}
qdf_export_symbol(hal_cookie_conversion_reg_cfg_be);
static inline void
hal_msdu_desc_info_set_be(hal_soc_handle_t hal_soc_hdl,
void *msdu_desc, uint32_t dst_ind,
uint32_t nbuf_len)
{
struct rx_msdu_desc_info *msdu_desc_info =
(struct rx_msdu_desc_info *)msdu_desc;
HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
FIRST_MSDU_IN_MPDU_FLAG, 1);
HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
LAST_MSDU_IN_MPDU_FLAG, 1);
HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
MSDU_CONTINUATION, 0x0);
HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
MSDU_LENGTH, nbuf_len);
HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
SA_IS_VALID, 1);
HAL_RX_MSDU_DESC_INFO_SET(msdu_desc_info,
DA_IS_VALID, 1);
}
static inline void
hal_mpdu_desc_info_set_be(hal_soc_handle_t hal_soc_hdl,
void *mpdu_desc, uint32_t seq_no)
{
struct rx_mpdu_desc_info *mpdu_desc_info =
(struct rx_mpdu_desc_info *)mpdu_desc;
HAL_RX_MPDU_DESC_INFO_SET(mpdu_desc_info,
MSDU_COUNT, 0x1);
/* unset frag bit */
HAL_RX_MPDU_DESC_INFO_SET(mpdu_desc_info,
FRAGMENT_FLAG, 0x0);
HAL_RX_MPDU_DESC_INFO_SET(mpdu_desc_info,
RAW_MPDU, 0x0);
}
/**
* hal_rx_msdu_reo_dst_ind_get: Gets the REO
* destination ring ID from the msdu desc info
@@ -1006,4 +1044,8 @@ void hal_hw_txrx_default_ops_attach_be(struct hal_soc *hal_soc)
hal_soc->ops->hal_rx_msdu_reo_dst_ind_get =
hal_rx_msdu_reo_dst_ind_get_be;
hal_soc->ops->hal_get_idle_link_bm_id = hal_get_idle_link_bm_id_be;
hal_soc->ops->hal_rx_msdu_ext_desc_info_get_ptr =
hal_rx_msdu_ext_desc_info_get_ptr_be;
hal_soc->ops->hal_msdu_desc_info_set = hal_msdu_desc_info_set_be;
hal_soc->ops->hal_mpdu_desc_info_set = hal_mpdu_desc_info_set_be;
}

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@@ -384,6 +384,12 @@ struct rx_pkt_tlvs {
#define HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(_rx_pkt_tlv) \
HAL_RX_MSDU_END(_rx_pkt_tlv).sa_sw_peer_id
#define HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(_rx_pkt_tlv) \
HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_31_0
#define HAL_RX_REO_QUEUE_DESC_ADDR_39_32_GET(_rx_pkt_tlv) \
HAL_RX_MPDU_START(_rx_pkt_tlv).rx_reo_queue_desc_addr_39_32
/* used by monitor mode for parsing from full TLV */
#define HAL_RX_MON_GET_FC_VALID(_rx_mpdu_start) \
HAL_RX_GET(rx_mpdu_start, RX_MPDU_INFO, MPDU_FRAME_CONTROL_VALID)
@@ -728,13 +734,12 @@ static inline uint8_t *hal_get_reo_ent_desc_qdesc_addr_be(uint8_t *desc)
* @buf: pointer to the start of RX PKT TLV headers
* Return: qdesc adrress in reo destination ring buffer
*/
static inline uint8_t *hal_rx_get_qdesc_addr_be(uint8_t *dst_ring_desc,
static inline uint64_t hal_rx_get_qdesc_addr_be(uint8_t *dst_ring_desc,
uint8_t *buf)
{
struct rx_pkt_tlvs *rx_pkt_tlvs = (struct rx_pkt_tlvs *)buf;
return (uint8_t *)(&HAL_RX_MPDU_START(rx_pkt_tlvs) +
RX_MPDU_INFO_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET);
return (uint64_t)HAL_RX_REO_QUEUE_DESC_ADDR_31_0_GET(rx_pkt_tlvs);
}
/**

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@@ -1000,7 +1000,7 @@ struct hal_hw_txrx_ops {
void (*hal_rx_tlv_populate_mpdu_desc_info)(uint8_t *buf,
void *mpdu_desc_info_hdl);
uint8_t *(*hal_get_reo_ent_desc_qdesc_addr)(uint8_t *desc);
uint8_t *(*hal_rx_get_qdesc_addr)(uint8_t *dst_ring_desc,
uint64_t (*hal_rx_get_qdesc_addr)(uint8_t *dst_ring_desc,
uint8_t *buf);
void (*hal_set_reo_ent_desc_reo_dest_ind)(uint8_t *desc,
uint32_t dst_ind);

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@@ -2583,7 +2583,7 @@ hal_get_reo_ent_desc_qdesc_addr(hal_soc_handle_t hal_soc_hdl, uint8_t *desc)
return NULL;
}
static inline uint8_t *
static inline uint64_t
hal_rx_get_qdesc_addr(hal_soc_handle_t hal_soc_hdl, uint8_t *dst_ring_desc,
uint8_t *buf)
{
@@ -2592,7 +2592,7 @@ hal_rx_get_qdesc_addr(hal_soc_handle_t hal_soc_hdl, uint8_t *dst_ring_desc,
if (hal_soc->ops->hal_rx_get_qdesc_addr)
return hal_soc->ops->hal_rx_get_qdesc_addr(dst_ring_desc, buf);
return NULL;
return 0;
}
static inline void

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@@ -1,5 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -1355,8 +1356,8 @@ uint8_t hal_get_tlv_hdr_size_li(void)
return sizeof(struct tlv_32_hdr);
}
uint8_t *hal_rx_get_qdesc_addr_li(uint8_t *dst_ring_desc, uint8_t *buf)
uint64_t hal_rx_get_qdesc_addr_li(uint8_t *dst_ring_desc, uint8_t *buf)
{
return dst_ring_desc +
return *(uint64_t *)dst_ring_desc +
REO_DESTINATION_RING_6_RX_REO_QUEUE_DESC_ADDR_31_0_OFFSET;
}

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@@ -1,5 +1,6 @@
/*
* Copyright (c) 2017-2019, 2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -77,5 +78,5 @@ void hal_reo_init_cmd_ring_li(hal_soc_handle_t hal_soc_hdl,
uint8_t hal_get_tlv_hdr_size_li(void);
uint8_t *hal_rx_get_qdesc_addr_li(uint8_t *dst_ring_desc, uint8_t *buf);
uint64_t hal_rx_get_qdesc_addr_li(uint8_t *dst_ring_desc, uint8_t *buf);
#endif /* _HAL_LI_REO_H_ */