qcacmn: Register ppe2tcl and reo2ppe ring interrupts

Enable and register PPE2TCL and REO2PPE ring interrupts
for direct switch
Set interrupt timer threshold for ppe2tcl ring as 30 us.

Change-Id: Ida1ff6c3c2000f16f07960f7eae0d10edc337dc0
CRs-Fixed: 3341790

dp/wifi3.0/be/dp_be.c

@@ -946,6 +946,9 @@ void dp_free_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
 		if (ring_type == WBM2SW_RELEASE &&
 		    ring_num == WBM2_SW_PPE_REL_RING_ID)
 			pld_pfrm_free_irq(soc->osdev->dev, srng->irq, soc);
+		else if (ring_type == REO2PPE || ring_type == PPE2TCL)
+			pld_pfrm_free_irq(soc->osdev->dev, srng->irq,
+					  dp_get_ppe_ds_ctxt(soc));
 	}
 }
 
@@ -953,14 +956,15 @@ static
 int dp_register_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
 				 int vector, int ring_type, int ring_num)
 {
-	int irq, ret = 0;
+	int irq = -1, ret = 0;
 	struct dp_soc_be *be_soc = dp_get_be_soc_from_dp_soc(soc);
 	int pci_slot = pld_get_pci_slot(soc->osdev->dev);
-	void *ctxt;
+
+	srng->irq = -1;
+	irq = pld_get_msi_irq(soc->osdev->dev, vector);
 
 	if (ring_type == WBM2SW_RELEASE &&
 	    ring_num == WBM2_SW_PPE_REL_RING_ID) {
-		irq = pld_get_msi_irq(soc->osdev->dev, vector);
 		snprintf(be_soc->irq_name[2], DP_PPE_INTR_STRNG_LEN,
 			 "pci%d_ppe_wbm_rel", pci_slot);
 
@@ -971,6 +975,29 @@ int dp_register_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
 
 		if (ret)
 			goto fail;
+	} else if (ring_type == REO2PPE && be_soc->ppeds_int_mode_enabled) {
+		snprintf(be_soc->irq_name[0], DP_PPE_INTR_STRNG_LEN,
+			 "pci%d_reo2ppe", pci_slot);
+		ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
+					   dp_ppe_ds_reo2ppe_irq_handler,
+					   IRQF_SHARED | IRQF_NO_SUSPEND,
+					   be_soc->irq_name[0],
+					   dp_get_ppe_ds_ctxt(soc));
+
+		if (ret)
+			goto fail;
+	} else if (ring_type == PPE2TCL && be_soc->ppeds_int_mode_enabled) {
+		snprintf(be_soc->irq_name[1], DP_PPE_INTR_STRNG_LEN,
+			 "pci%d_ppe2tcl", pci_slot);
+		ret = pld_pfrm_request_irq(soc->osdev->dev, irq,
+					   dp_ppe_ds_ppe2tcl_irq_handler,
+					   IRQF_SHARED | IRQF_NO_SUSPEND,
+					   be_soc->irq_name[1],
+					   dp_get_ppe_ds_ctxt(soc));
+		if (ret)
+			goto fail;
+
+		pld_pfrm_disable_irq_nosync(soc->osdev->dev, irq);
 	} else {
 		return 0;
 	}
@@ -982,8 +1009,8 @@ int dp_register_ppeds_interrupts(struct dp_soc *soc, struct dp_srng *srng,
 
 	return 0;
 fail:
-	dp_err("Unable to config irq : ring type %d irq %d vector %d ctxt %pK",
+	dp_err("Unable to config irq : ring type %d irq %d vector %d",
-	       ring_type, irq, vector, ctxt);
+	       ring_type, irq, vector);
 
 	return ret;
 }

dp/wifi3.0/be/dp_be.h

@@ -283,6 +283,7 @@ struct dp_ppeds_napi {
  * @mld_peer_hash: peer hash table for ML peers
  *           Associated peer with this MAC address)
  * @mld_peer_hash_lock: lock to protect mld_peer_hash
+ * @ppe_ds_int_mode_enabled: PPE DS interrupt mode enabled
  * @reo2ppe_ring: REO2PPE ring
  * @ppe2tcl_ring: PPE2TCL ring
  * @ppe_release_ring: PPE release ring
@@ -308,6 +309,7 @@ struct dp_soc_be {
 	struct dp_hw_cookie_conversion_t tx_cc_ctx[MAX_TXDESC_POOLS];
 	struct dp_hw_cookie_conversion_t rx_cc_ctx[MAX_RXDESC_POOLS];
 #ifdef WLAN_SUPPORT_PPEDS
+	bool ppeds_int_mode_enabled;
 	struct dp_srng reo2ppe_ring;
 	struct dp_srng ppe2tcl_ring;
 	struct dp_srng ppe_release_ring;

dp/wifi3.0/dp_main.c

@@ -1556,6 +1556,14 @@ static int dp_srng_calculate_msi_group(struct dp_soc *soc,
 		grp_mask = &soc->wlan_cfg_ctx->int_host2txmon_ring_mask[0];
 	break;
 
+	case REO2PPE:
+		grp_mask = &soc->wlan_cfg_ctx->int_reo2ppe_ring_mask[0];
+	break;
+
+	case PPE2TCL:
+		grp_mask = &soc->wlan_cfg_ctx->int_ppe2tcl_ring_mask[0];
+	break;
+
 	case TCL_DATA:
 	/* CMD_CREDIT_RING is used as command in 8074 and credit in 9000 */
 	case TCL_CMD_CREDIT:
@@ -1922,7 +1930,7 @@ dp_srng_configure_interrupt_thresholds(struct dp_soc *soc,
 
 	wbm2_sw_rx_rel_ring_id = wlan_cfg_get_rx_rel_ring_id(soc->wlan_cfg_ctx);
 
-	if (ring_type == REO_DST) {
+	if (ring_type == REO_DST || ring_type == REO2PPE) {
 		ring_params->intr_timer_thres_us =
 			wlan_cfg_get_int_timer_threshold_rx(soc->wlan_cfg_ctx);
 		ring_params->intr_batch_cntr_thres_entries =
@@ -1963,11 +1971,16 @@ dp_srng_configure_interrupt_thresholds(struct dp_soc *soc,
 	case TCL_STATUS:
 	case WBM_IDLE_LINK:
 	case SW2WBM_RELEASE:
-	case PPE2TCL:
 	case SW2RXDMA_NEW:
 		ring_params->intr_timer_thres_us = 0;
 		ring_params->intr_batch_cntr_thres_entries = 0;
 		break;
+	case PPE2TCL:
+		ring_params->intr_timer_thres_us =
+			wlan_cfg_get_int_timer_threshold_other(soc->wlan_cfg_ctx);
+		ring_params->intr_batch_cntr_thres_entries =
+			wlan_cfg_get_int_batch_threshold_ppe2tcl(soc->wlan_cfg_ctx);
+		break;
 	}
 
 	/* Enable low threshold interrupts for rx buffer rings (regular and

dp/wifi3.0/dp_stats.c

@@ -5618,6 +5618,11 @@ void dp_print_soc_cfg_params(struct dp_soc *soc)
 		       soc_cfg_ctx->int_batch_threshold_other);
 	DP_PRINT_STATS("Int timer threshold other: %u ",
 		       soc_cfg_ctx->int_timer_threshold_other);
+	DP_PRINT_STATS("Int batch threshold ppe2tcl: %u ",
+		       soc_cfg_ctx->int_batch_threshold_ppe2tcl);
+	DP_PRINT_STATS("Int timer threshold ppe2tcl: %u ",
+		       soc_cfg_ctx->int_timer_threshold_ppe2tcl);
+
 	DP_PRINT_STATS("DP NAPI scale factor: %u ",
 		       soc_cfg_ctx->napi_scale_factor);
 

wlan_cfg/cfg_dp.h

@@ -143,6 +143,9 @@
 #endif
 #endif /* WLAN_MAX_PDEVS */
 
+#define WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL 0
+#define WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL 30
+
 #ifdef NBUF_MEMORY_DEBUG
 #define WLAN_CFG_RX_PENDING_THRESHOLD_DEFAULT 0xFFFF
 #else
@@ -187,6 +190,9 @@
 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MIN 1
 #define WLAN_CFG_INT_BATCH_THRESHOLD_TX_MAX 256
 
+#define WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL_MIN 0
+#define WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL_MAX 1024
+
 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MIN 0
 #define WLAN_CFG_INT_BATCH_THRESHOLD_RX_MAX 128
 
@@ -202,6 +208,9 @@
 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MIN 8
 #define WLAN_CFG_INT_TIMER_THRESHOLD_TX_MAX 1000
 
+#define WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL_MIN 8
+#define WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL_MAX 1000
+
 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MIN 8
 #define WLAN_CFG_INT_TIMER_THRESHOLD_RX_MAX 500
 
@@ -540,6 +549,20 @@
 		WLAN_CFG_INT_BATCH_THRESHOLD_TX, \
 		CFG_VALUE_OR_DEFAULT, "DP INT threshold Tx")
 
+#define CFG_DP_INT_BATCH_THRESHOLD_PPE2TCL \
+		CFG_INI_UINT("dp_int_batch_threshold_ppe2tcl", \
+		WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL_MIN, \
+		WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL_MAX, \
+		WLAN_CFG_INT_BATCH_THRESHOLD_PPE2TCL, \
+		CFG_VALUE_OR_DEFAULT, "DP INT batch threshold ppe2tcl")
+
+#define CFG_DP_INT_TIMER_THRESHOLD_PPE2TCL \
+		CFG_INI_UINT("dp_int_timer_threshold_ppe2tcl", \
+		WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL_MIN, \
+		WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL_MAX, \
+		WLAN_CFG_INT_TIMER_THRESHOLD_PPE2TCL, \
+		CFG_VALUE_OR_DEFAULT, "DP INT timer threshold ppe2tcl")
+
 #define CFG_DP_INT_TIMER_THRESHOLD_OTHER \
 		CFG_INI_UINT("dp_int_timer_threshold_other", \
 		WLAN_CFG_INT_TIMER_THRESHOLD_OTHER_MIN, \
@@ -1779,8 +1802,10 @@
 #define CFG_DP \
 		CFG(CFG_DP_HTT_PACKET_TYPE) \
 		CFG(CFG_DP_INT_BATCH_THRESHOLD_OTHER) \
+		CFG(CFG_DP_INT_BATCH_THRESHOLD_PPE2TCL) \
 		CFG(CFG_DP_INT_BATCH_THRESHOLD_RX) \
 		CFG(CFG_DP_INT_BATCH_THRESHOLD_TX) \
+		CFG(CFG_DP_INT_TIMER_THRESHOLD_PPE2TCL) \
 		CFG(CFG_DP_INT_TIMER_THRESHOLD_OTHER) \
 		CFG(CFG_DP_INT_TIMER_THRESHOLD_RX) \
 		CFG(CFG_DP_INT_TIMER_THRESHOLD_TX) \

wlan_cfg/wlan_cfg.c

@@ -96,6 +96,8 @@
 #define WLAN_CFG_UMAC_RESET_INTR_MASK_0 0x1
 
 #define WLAN_CFG_PPEDS_WBM_RELEASE_RING_MASK_0 0x1
+#define WLAN_CFG_REO2PPE_RING_MASK_0 0x1
+#define WLAN_CFG_PPE2TCL_RING_MASK_0 0x1
 
 struct dp_int_mask_assignment {
 	uint8_t tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
@@ -114,6 +116,8 @@ struct dp_int_mask_assignment {
 	uint8_t host2txmon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
 	uint8_t tx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
 	uint8_t ppeds_wbm_release_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
+	uint8_t reo2ppe_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
+	uint8_t ppe2tcl_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
 	uint8_t umac_reset_intr_mask[WLAN_CFG_INT_NUM_CONTEXTS];
 };
 
@@ -789,6 +793,20 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		  WLAN_CFG_REO_STATUS_RING_MASK_2,
 		  WLAN_CFG_REO_STATUS_RING_MASK_3,
 		  0, 0, 0, 0},
+		/* ppe2tcl ring masks */
+		{ 0, 0, 0,
+		  WLAN_CFG_REO_STATUS_RING_MASK_0,
+		  WLAN_CFG_REO_STATUS_RING_MASK_1,
+		  WLAN_CFG_REO_STATUS_RING_MASK_2,
+		  WLAN_CFG_REO_STATUS_RING_MASK_3,
+		  0, 0, 0, 0},
+		/* reo2ppe ring masks */
+		{ 0, 0, 0,
+		  WLAN_CFG_REO_STATUS_RING_MASK_0,
+		  WLAN_CFG_REO_STATUS_RING_MASK_1,
+		  WLAN_CFG_REO_STATUS_RING_MASK_2,
+		  WLAN_CFG_REO_STATUS_RING_MASK_3,
+		  0, 0, 0, 0},
 	},
 };
 #else
@@ -944,6 +962,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		{ WLAN_CFG_TX_MON_RING_MASK_0 |
 		  WLAN_CFG_TX_MON_RING_MASK_1,
 		  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{WLAN_CFG_REO2PPE_RING_MASK_0, 0, 0, 0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, WLAN_CFG_PPE2TCL_RING_MASK_0, 0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
 		/* umac reset mask */
 		{WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0, 0, 0, 0,
 		 0, 0, 0, 0, 0, 0, 0, 0},
@@ -1020,6 +1044,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		{ WLAN_CFG_TX_MON_RING_MASK_0,
 		  WLAN_CFG_TX_MON_RING_MASK_1,
 		  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{WLAN_CFG_REO2PPE_RING_MASK_0, 0, 0, 0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, WLAN_CFG_PPE2TCL_RING_MASK_0, 0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
 		/* umac reset mask */
 		{0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0, 0, 0,
 		 0, 0, 0, 0, 0, 0, 0, 0},
@@ -1104,6 +1134,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		{ WLAN_CFG_TX_MON_RING_MASK_0,
 		  WLAN_CFG_TX_MON_RING_MASK_1,
 		  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{WLAN_CFG_REO2PPE_RING_MASK_0, 0, 0, 0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, WLAN_CFG_PPE2TCL_RING_MASK_0, 0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
 		/* umac reset mask */
 		{0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0, 0,
 		 0, 0, 0, 0, 0, 0, 0, 0},
@@ -1180,6 +1216,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		{ WLAN_CFG_TX_MON_RING_MASK_0,
 		  WLAN_CFG_TX_MON_RING_MASK_1,
 		  0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{0, WLAN_CFG_REO2PPE_RING_MASK_0, 0, 0, 0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, 0, WLAN_CFG_PPE2TCL_RING_MASK_0, 0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
 		/* umac reset mask */
 		{0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0,
 		 0, 0, 0, 0, 0, 0, 0, 0},
@@ -1267,6 +1309,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		/* ppe ds wbm release ring ring mask */
 		{ 0, WLAN_CFG_PPEDS_WBM_RELEASE_RING_MASK_0,
 		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{0, 0, WLAN_CFG_REO2PPE_RING_MASK_0, 0, 0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, 0, 0, WLAN_CFG_PPE2TCL_RING_MASK_0, 0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
 		/* umac reset mask */
 		{0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0,
 		 0, 0, 0, 0, 0, 0, 0, 0},
@@ -1347,6 +1395,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		/* ppe ds wbm release ring ring mask */
 		{ 0, 0, WLAN_CFG_PPEDS_WBM_RELEASE_RING_MASK_0,
 		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{0, 0, 0, WLAN_CFG_REO2PPE_RING_MASK_0, 0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, 0, 0, 0, WLAN_CFG_PPE2TCL_RING_MASK_0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
 		/* umac reset mask */
 		{0, 0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0,
 		 0, 0, 0, 0, 0, 0, 0, 0},
@@ -1435,6 +1489,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		/* ppe ds wbm release ring ring mask */
 		{ 0, 0, 0, WLAN_CFG_PPEDS_WBM_RELEASE_RING_MASK_0,
 		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{0, 0, 0, 0, WLAN_CFG_REO2PPE_RING_MASK_0, 0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, 0, 0, 0, 0, WLAN_CFG_PPE2TCL_RING_MASK_0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
 		/* umac reset mask */
 		{0, 0, 0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0,
 		 0, 0, 0, 0, 0, 0, 0, 0},
@@ -1523,6 +1583,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		/* ppe ds wbm release ring ring mask */
 		{ 0, 0, 0, 0, WLAN_CFG_PPEDS_WBM_RELEASE_RING_MASK_0,
 		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{0, 0, 0, 0, 0, WLAN_CFG_REO2PPE_RING_MASK_0, 0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, 0, 0, 0, 0, 0, WLAN_CFG_PPE2TCL_RING_MASK_0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0},
 		/* umac reset mask */
 		{0, 0, 0, 0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0,
 		 0, 0, 0, 0, 0, 0, 0, 0},
@@ -1611,6 +1677,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		/* ppe ds wbm release ring ring mask */
 		{ 0, 0, 0, 0, 0, WLAN_CFG_PPEDS_WBM_RELEASE_RING_MASK_0,
 		 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{0, 0, 0, 0, 0, 0, WLAN_CFG_REO2PPE_RING_MASK_0,
+		 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, 0, 0, 0, 0, 0, 0, WLAN_CFG_PPE2TCL_RING_MASK_0,
+		 0, 0, 0, 0, 0, 0, 0, 0},
 		/* umac reset mask */
 		{0, 0, 0, 0, 0, 0, 0, 0,
 		 WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0, 0, 0, 0},
@@ -1699,6 +1771,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		/* ppe ds wbm release ring ring mask */
 		{ 0, 0, 0, 0, 0, 0, WLAN_CFG_PPEDS_WBM_RELEASE_RING_MASK_0,
 		 0, 0, 0, 0, 0, 0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{0, 0, 0, 0, 0, 0, 0, WLAN_CFG_REO2PPE_RING_MASK_0,
+		 0, 0, 0, 0, 0, 0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, 0, 0, 0, 0, 0, 0, 0,
+		 WLAN_CFG_PPE2TCL_RING_MASK_0, 0, 0, 0, 0, 0, 0, 0},
 		/* umac reset mask */
 		{0, 0, 0, 0, 0, 0, 0, 0,
 		 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0, 0, 0},
@@ -1787,6 +1865,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		/* ppe wbm ds release ring ring mask */
 		{ 0, 0, 0, 0, 0, 0, 0, WLAN_CFG_PPEDS_WBM_RELEASE_RING_MASK_0,
 		 0, 0, 0, 0, 0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{0, 0, 0, 0, 0, 0, 0, 0, WLAN_CFG_REO2PPE_RING_MASK_0,
+		 0, 0, 0, 0, 0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, 0, 0, 0, 0, 0, 0, 0, 0,
+		 WLAN_CFG_PPE2TCL_RING_MASK_0, 0, 0, 0, 0, 0, 0},
 		/* umac reset mask */
 		{0, 0, 0, 0, 0, 0, 0, 0,
 		 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0, 0},
@@ -1866,6 +1950,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		/* ppe ds wbm release ring ring mask */
 		{ 0, 0, 0, 0, 0, 0, 0, 0,
 		  WLAN_CFG_PPEDS_WBM_RELEASE_RING_MASK_0, 0, 0, 0, 0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{0, 0, 0, 0, 0, 0, 0, 0, 0, WLAN_CFG_REO2PPE_RING_MASK_0,
+		 0, 0, 0, 0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+		 WLAN_CFG_PPE2TCL_RING_MASK_0, 0, 0, 0, 0, 0},
 		/* umac reset mask */
 		{0, 0, 0, 0, 0, 0, 0, 0,
 		 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0, 0},
@@ -1945,6 +2035,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		/* ppe ds wbm release ring ring mask */
 		{ 0, 0, 0, 0, 0, 0, 0, 0, 0,
 		  WLAN_CFG_PPEDS_WBM_RELEASE_RING_MASK_0, 0, 0, 0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, WLAN_CFG_REO2PPE_RING_MASK_0,
+		 0, 0, 0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+		 WLAN_CFG_PPE2TCL_RING_MASK_0, 0, 0, 0, 0},
 		/* umac reset mask */
 		{0, 0, 0, 0, 0, 0, 0, 0,
 		 0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0, 0},
@@ -2024,6 +2120,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		/* ppe ds wbm release ring ring mask */
 		{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 		  WLAN_CFG_PPEDS_WBM_RELEASE_RING_MASK_0, 0, 0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+		 WLAN_CFG_REO2PPE_RING_MASK_0, 0, 0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+		 0, WLAN_CFG_PPE2TCL_RING_MASK_0, 0, 0, 0},
 		/* umac reset mask */
 		{0, 0, 0, 0, 0, 0, 0, 0,
 		 0, 0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0, 0},
@@ -2103,6 +2205,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		/* ppe ds wbm release ring ring mask */
 		{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 		  WLAN_CFG_PPEDS_WBM_RELEASE_RING_MASK_0, 0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+		 0, WLAN_CFG_REO2PPE_RING_MASK_0, 0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+		 0, 0, WLAN_CFG_PPE2TCL_RING_MASK_0, 0, 0},
 		/* umac reset mask */
 		{0, 0, 0, 0, 0, 0, 0, 0,
 		 0, 0, 0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0, 0},
@@ -2182,6 +2290,12 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		/* ppe ds wbm release ring ring mask */
 		{ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
 		  0, WLAN_CFG_PPEDS_WBM_RELEASE_RING_MASK_0, 0, 0, 0},
+		/* Reo2ppe ring mask */
+		{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+		 0, 0, WLAN_CFG_REO2PPE_RING_MASK_0, 0, 0},
+		/* ppe2tcl ring mask */
+		{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+		 0, 0, 0, WLAN_CFG_PPE2TCL_RING_MASK_0, 0},
 		/* umac reset mask */
 		{0, 0, 0, 0, 0, 0, 0, 0,
 		 0, 0, 0, 0, 0, 0, 0, WLAN_CFG_UMAC_RESET_INTR_MASK_0},
@@ -2289,6 +2403,8 @@ void wlan_set_srng_cfg(struct wlan_srng_cfg **wlan_cfg)
 	g_wlan_srng_cfg[RXDMA_MONITOR_STATUS] =
 			wlan_srng_rxdma_monitor_status_cfg;
 	g_wlan_srng_cfg[RXDMA_MONITOR_DST] = wlan_srng_default_cfg;
+	g_wlan_srng_cfg[REO2PPE] = wlan_srng_default_cfg;
+	g_wlan_srng_cfg[PPE2TCL] = wlan_srng_default_cfg;
 	g_wlan_srng_cfg[RXDMA_MONITOR_DESC] = wlan_srng_default_cfg;
 	g_wlan_srng_cfg[DIR_BUF_RX_DMA_SRC] = wlan_srng_default_cfg;
 #ifdef WLAN_FEATURE_CIF_CFR
@@ -2392,6 +2508,10 @@ void wlan_cfg_fill_interrupt_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
 			dp_mask_assignment[interrupt_index].reo_status_ring_mask[i];
 		wlan_cfg_ctx->int_ppeds_wbm_release_ring_mask[i] =
 			dp_mask_assignment[interrupt_index].ppeds_wbm_release_ring_mask[i];
+		wlan_cfg_ctx->int_ppe2tcl_ring_mask[i] =
+			dp_mask_assignment[interrupt_index].ppe2tcl_ring_mask[i];
+		wlan_cfg_ctx->int_reo2ppe_ring_mask[i] =
+			dp_mask_assignment[interrupt_index].reo2ppe_ring_mask[i];
 		if (is_monitor_mode) {
 			wlan_cfg_ctx->int_rx_ring_mask[i] = 0;
 			wlan_cfg_ctx->int_rxdma2host_ring_mask[i] = 0;
@@ -2785,6 +2905,11 @@ wlan_cfg_soc_attach(struct cdp_ctrl_objmgr_psoc *psoc)
 		cfg_get(psoc, CFG_DP_INT_BATCH_THRESHOLD_OTHER);
 	wlan_cfg_ctx->int_timer_threshold_other =
 		cfg_get(psoc, CFG_DP_INT_TIMER_THRESHOLD_OTHER);
+	wlan_cfg_ctx->int_batch_threshold_ppe2tcl =
+			cfg_get(psoc, CFG_DP_INT_BATCH_THRESHOLD_PPE2TCL);
+	wlan_cfg_ctx->int_timer_threshold_ppe2tcl =
+			cfg_get(psoc, CFG_DP_INT_TIMER_THRESHOLD_PPE2TCL);
+
 	wlan_cfg_ctx->pktlog_buffer_size =
 		cfg_get(psoc, CFG_DP_PKTLOG_BUFFER_SIZE);
 
@@ -3539,6 +3664,16 @@ void wlan_cfg_set_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg, int nss_cfg)
 		cfg->tx_comp_ring_size = cfg->tx_comp_ring_size_nss;
 }
 
+int wlan_cfg_get_int_batch_threshold_ppe2tcl(struct wlan_cfg_dp_soc_ctxt *cfg)
+{
+	return cfg->int_batch_threshold_ppe2tcl;
+}
+
+int wlan_cfg_get_int_timer_threshold_ppe2tcl(struct wlan_cfg_dp_soc_ctxt *cfg)
+{
+	return cfg->int_timer_threshold_ppe2tcl;
+}
+
 int wlan_cfg_get_int_batch_threshold_tx(struct wlan_cfg_dp_soc_ctxt *cfg)
 {
 	return cfg->int_batch_threshold_tx;

wlan_cfg/wlan_cfg.h

@@ -291,6 +291,8 @@ struct wlan_cfg_dp_soc_ctxt {
 	int num_tx_ext_desc;
 	int max_peer_id;
 	int htt_packet_type;
+	int int_batch_threshold_ppe2tcl;
+	int int_timer_threshold_ppe2tcl;
 	int int_batch_threshold_tx;
 	int int_timer_threshold_tx;
 	int int_batch_threshold_rx;
@@ -319,6 +321,8 @@ struct wlan_cfg_dp_soc_ctxt {
 	uint8_t int_tx_ring_near_full_irq_mask[WLAN_CFG_INT_NUM_CONTEXTS];
 	uint8_t int_host2txmon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
 	uint8_t int_ppeds_wbm_release_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
+	uint8_t int_ppe2tcl_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
+	uint8_t int_reo2ppe_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
 	uint8_t int_umac_reset_intr_mask[WLAN_CFG_INT_NUM_CONTEXTS];
 	int hw_macid[MAX_PDEV_CNT];
 	int hw_macid_pdev_id_map[MAX_NUM_LMAC_HW];
@@ -1295,6 +1299,22 @@ int wlan_cfg_get_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg);
  */
 void wlan_cfg_set_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg, int nss_cfg);
 
+/*
+ * wlan_cfg_get_int_timer_threshold_ppe2tcl - Get intr mitigation for ppe2tcl
+ * @wlan_cfg_soc_ctx
+ *
+ * Return: Timer threshold
+ */
+int wlan_cfg_get_int_timer_threshold_ppe2tcl(struct wlan_cfg_dp_soc_ctxt *cfg);
+
+/*
+ * wlan_cfg_get_int_batch_threshold_ppe2tcl - Get intr mitigation for ppe2tcl
+ * @wlan_cfg_soc_ctx
+ *
+ * Return: Batch threshold
+ */
+int wlan_cfg_get_int_batch_threshold_ppe2tcl(struct wlan_cfg_dp_soc_ctxt *cfg);
+
 /*
  * wlan_cfg_get_int_batch_threshold_tx - Get interrupt mitigation cfg for Tx
  * @wlan_cfg_soc_ctx