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qcacmn: Register ppe2tcl and reo2ppe ring interrupts

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Enable and register PPE2TCL and REO2PPE ring interrupts
for direct switch
Set interrupt timer threshold for ppe2tcl ring as 30 us.

Change-Id: Ida1ff6c3c2000f16f07960f7eae0d10edc337dc0
CRs-Fixed: 3341790
This commit is contained in:
Pavankumar Nandeshwar
2022-07-22 01:53:03 -07:00
committed by Madan Koyyalamudi
parent 19a0237072
commit e5534b1953
7 changed files with 234 additions and 7 deletions
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20
wlan_cfg/wlan_cfg.h
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@@ -291,6 +291,8 @@ struct wlan_cfg_dp_soc_ctxt {
int num_tx_ext_desc;
int max_peer_id;
int htt_packet_type;
int int_batch_threshold_ppe2tcl;
int int_timer_threshold_ppe2tcl;
int int_batch_threshold_tx;
int int_timer_threshold_tx;
int int_batch_threshold_rx;
@@ -319,6 +321,8 @@ struct wlan_cfg_dp_soc_ctxt {
uint8_t int_tx_ring_near_full_irq_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t int_host2txmon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t int_ppeds_wbm_release_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t int_ppe2tcl_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t int_reo2ppe_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
uint8_t int_umac_reset_intr_mask[WLAN_CFG_INT_NUM_CONTEXTS];
int hw_macid[MAX_PDEV_CNT];
int hw_macid_pdev_id_map[MAX_NUM_LMAC_HW];
@@ -1295,6 +1299,22 @@ int wlan_cfg_get_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg);
*/
void wlan_cfg_set_dp_soc_nss_cfg(struct wlan_cfg_dp_soc_ctxt *cfg, int nss_cfg);
/*
* wlan_cfg_get_int_timer_threshold_ppe2tcl - Get intr mitigation for ppe2tcl
* @wlan_cfg_soc_ctx
*
* Return: Timer threshold
*/
int wlan_cfg_get_int_timer_threshold_ppe2tcl(struct wlan_cfg_dp_soc_ctxt *cfg);
/*
* wlan_cfg_get_int_batch_threshold_ppe2tcl - Get intr mitigation for ppe2tcl
* @wlan_cfg_soc_ctx
*
* Return: Batch threshold
*/
int wlan_cfg_get_int_batch_threshold_ppe2tcl(struct wlan_cfg_dp_soc_ctxt *cfg);
/*
* wlan_cfg_get_int_batch_threshold_tx - Get interrupt mitigation cfg for Tx
* @wlan_cfg_soc_ctx