video: driver: Align hfi buffer macro file with CL: 30790445
Remove SE stats Buffer calculation to align hfi buffer macro file with CL: 30790445. Change-Id: Ia5db786e5ba1fddafe6c25555b3f45ea915b389e Signed-off-by: Akshata Sahukar <asahukar@codeaurora.org>
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@@ -1056,18 +1056,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
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if ((size_aligned_width * size_aligned_height) > \
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(3840 * 2160)) \
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{ \
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if (num_vpp_pipes == 4) \
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{ \
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size_single_pipe_eval = bitbin_size / 4; \
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} \
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else if (num_vpp_pipes == 2) \
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{ \
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size_single_pipe_eval = bitbin_size / 2; \
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} \
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else if (num_vpp_pipes == 1) \
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{ \
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size_single_pipe_eval = bitbin_size; \
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} \
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size_single_pipe_eval = (bitbin_size / num_vpp_pipes); \
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} \
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else if (num_vpp_pipes > 2) \
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{ \
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@@ -1112,11 +1101,19 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
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total_bitbin_buffers = 1; \
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bitbin_size = bitstream_size; \
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} \
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SIZE_ENC_SINGLE_PIPE(size_single_pipe, rc_type, bitbin_size, \
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num_vpp_pipes, frame_width, frame_height, lcu_size); \
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bitbin_size = size_single_pipe * num_vpp_pipes; \
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_size = HFI_ALIGN(bitbin_size, VENUS_DMA_ALIGNMENT) * \
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total_bitbin_buffers + 512; \
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if (total_bitbin_buffers > 0) \
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{ \
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SIZE_ENC_SINGLE_PIPE(size_single_pipe, rc_type, bitbin_size, \
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num_vpp_pipes, frame_width, frame_height, lcu_size); \
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bitbin_size = size_single_pipe * num_vpp_pipes; \
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_size = HFI_ALIGN(bitbin_size, VENUS_DMA_ALIGNMENT) * \
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total_bitbin_buffers + 512; \
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} \
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else \
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/* Avoid 512 Bytes allocation in case of 1Pipe HEVC Direct Mode*/\
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{ \
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_size = 0; \
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} \
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} while (0)
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#define HFI_BUFFER_BIN_H264E(_size, rc_type, frame_width, frame_height, \
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@@ -1254,27 +1251,6 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
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#define SIZE_LINE_BUF_SDE(frame_width_coded) HFI_ALIGN((256 + \
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(16 * ((frame_width_coded) >> 4))), VENUS_DMA_ALIGNMENT)
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#define SIZE_SE_STATS_BUF(_size, frame_width_coded, frame_height_coded, \
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num_lcu_in_frame) \
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do \
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{ \
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if (((frame_width_coded) * (frame_height_coded)) > \
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(4096 * 2160)) \
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{ \
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_size = 0; \
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} \
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else if (((frame_width_coded) * (frame_height_coded)) > \
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(1920 * 1088)) \
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{ \
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_size = (40 * 4 * num_lcu_in_frame + 256 + 256); \
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} \
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else \
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{ \
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_size = (1024 * num_lcu_in_frame + 256 + 256); \
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} \
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_size = HFI_ALIGN(se_stats_buf_size, VENUS_DMA_ALIGNMENT) * 2; \
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} while (0)
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#define SIZE_BSE_SLICE_CMD_BUF ((((8192 << 2) + 7) & (~7)) * 6)
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#define SIZE_BSE_REG_BUF ((((512 << 3) + 7) & (~7)) * 4)
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#define SIZE_VPP_REG_BUF ((((HFI_VENUS_VPPSG_MAX_REGISTERS << 3) +\
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@@ -1403,8 +1379,7 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
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HFI_U32 width_in_lcus = 0, height_in_lcus = 0, \
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frame_width_coded = 0, frame_height_coded = 0, \
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num_lcu_in_frame = 0, num_lcumb = 0; \
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HFI_U32 frame_rc_buf_size = 0, \
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se_stats_buf_size = 0; \
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HFI_U32 frame_rc_buf_size = 0; \
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width_in_lcus = ((frame_width) + (lcu_size)-1) / (lcu_size); \
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height_in_lcus = ((frame_height) + (lcu_size)-1) / (lcu_size); \
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num_lcu_in_frame = width_in_lcus * height_in_lcus; \
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@@ -1414,15 +1389,12 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
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((frame_width_coded + lcu_size * 8) / lcu_size); \
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SIZE_FRAME_RC_BUF_SIZE(frame_rc_buf_size, standard, \
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frame_height_coded, num_vpp_pipes_enc); \
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SIZE_SE_STATS_BUF(se_stats_buf_size, frame_width_coded, \
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frame_height_coded, num_lcu_in_frame); \
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_size = SIZE_ENC_SLICE_INFO_BUF(num_lcu_in_frame) + \
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SIZE_SLICE_CMD_BUFFER + \
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SIZE_SPS_PPS_SLICE_HDR + \
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frame_rc_buf_size + \
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ENC_BITCNT_BUF_SIZE(num_lcu_in_frame) + \
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ENC_BITMAP_BUF_SIZE(num_lcu_in_frame) + \
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se_stats_buf_size + \
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SIZE_BSE_SLICE_CMD_BUF + \
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SIZE_BSE_REG_BUF + \
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SIZE_VPP_REG_BUF + \
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