Add 'qcom/opensource/touch-drivers/' from commit '0abb70a15bd5d3469505bb0249d49266a4a5595e'
git-subtree-dir: qcom/opensource/touch-drivers git-subtree-mainline:51ff30338bgit-subtree-split:0abb70a15bChange-Id: repo: https://git.codelinaro.org/clo/la/platform/vendor/opensource/touch-drivers tag: LA.VENDOR.14.3.0.r1-17300-lanai.QSSI15.0
This commit is contained in:
David Wronek
4608
qcom/opensource/touch-drivers/nt36xxx/nt36xxx.c
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4608
qcom/opensource/touch-drivers/nt36xxx/nt36xxx.c
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Load Diff
386
qcom/opensource/touch-drivers/nt36xxx/nt36xxx.h
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386
qcom/opensource/touch-drivers/nt36xxx/nt36xxx.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2010 - 2018 Novatek, Inc.
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*
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* $Revision: 47247 $
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* $Date: 2019-07-10 10:41:36 +0800 (Wed, 10 Jul 2019) $
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*/
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#ifndef _LINUX_NVT_TOUCH_H
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#define _LINUX_NVT_TOUCH_H
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#if !defined(NVT_NT36XXX_SPI) /* NT36XXX I2C */
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/input.h>
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#include <linux/uaccess.h>
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#ifdef CONFIG_HAS_EARLYSUSPEND
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#include <linux/earlysuspend.h>
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#endif
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#include "nt36xxx_mem_map.h"
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#define NVT_DEBUG 1
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//---GPIO number---
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#define NVTTOUCH_RST_PIN 980
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#define NVTTOUCH_INT_PIN 943
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//---INT trigger mode---
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//#define IRQ_TYPE_EDGE_RISING 1
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//#define IRQ_TYPE_EDGE_FALLING 2
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#define INT_TRIGGER_TYPE IRQ_TYPE_EDGE_RISING
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//---I2C driver info.---
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#define NVT_I2C_NAME "NVT-ts"
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#define I2C_BLDR_Address 0x01
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#define I2C_FW_Address 0x01
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#define I2C_HW_Address 0x62
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#if NVT_DEBUG
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#define NVT_LOG(fmt, args...) pr_err("[%s] %s %d: " fmt, NVT_I2C_NAME, __func__, __LINE__, ##args)
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#else
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#define NVT_LOG(fmt, args...) pr_info("[%s] %s %d: " fmt, NVT_I2C_NAME, __func__, __LINE__, ##args)
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#endif
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#define NVT_ERR(fmt, args...) pr_err("[%s] %s %d: " fmt, NVT_I2C_NAME, __func__, __LINE__, ##args)
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//---Input device info.---
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#define NVT_TS_NAME "NVTCapacitiveTouchScreen"
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//---Touch info.---
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#define TOUCH_DEFAULT_MAX_WIDTH 1080
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#define TOUCH_DEFAULT_MAX_HEIGHT 2408
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#define TOUCH_MAX_FINGER_NUM 10
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#define TOUCH_KEY_NUM 0
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#if TOUCH_KEY_NUM > 0
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extern const uint16_t touch_key_array[TOUCH_KEY_NUM];
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#endif
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#define TOUCH_FORCE_NUM 1000
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/* Enable only when module have tp reset pin and connected to host */
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#define NVT_TOUCH_SUPPORT_HW_RST 1
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//---Customerized func.---
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#define NVT_TOUCH_PROC 1
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#define NVT_TOUCH_EXT_PROC 1
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#define NVT_TOUCH_MP 1
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#define MT_PROTOCOL_B 1
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#define WAKEUP_GESTURE 0
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#if WAKEUP_GESTURE
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extern const uint16_t gesture_key_array[];
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#endif
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#define BOOT_UPDATE_FIRMWARE 1
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#define BOOT_UPDATE_FIRMWARE_NAME "novatek_ts_fw.bin"
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//---ESD Protect.---
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#define NVT_TOUCH_ESD_PROTECT 0
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#define NVT_TOUCH_ESD_CHECK_PERIOD 1500 /* ms */
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struct nvt_ts_data {
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struct i2c_client *client;
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struct input_dev *input_dev;
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struct delayed_work nvt_fwu_work;
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uint16_t addr;
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int8_t phys[32];
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const struct i2c_device_id *id;
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#if defined(CONFIG_DRM)
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struct notifier_block drm_panel_notif;
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#elif defined(_MSM_DRM_NOTIFY_H_)
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struct notifier_block drm_notif;
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#else
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struct notifier_block fb_notif;
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#endif
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uint8_t fw_ver;
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uint8_t x_num;
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uint8_t y_num;
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uint16_t abs_x_max;
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uint16_t abs_y_max;
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uint8_t max_touch_num;
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uint8_t max_button_num;
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uint32_t int_trigger_type;
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int32_t irq_gpio;
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uint32_t irq_flags;
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int32_t reset_gpio;
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uint32_t reset_flags;
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struct mutex lock;
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const struct nvt_ts_mem_map *mmap;
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uint8_t carrier_system;
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uint16_t nvt_pid;
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uint8_t xbuf[1025];
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struct mutex xbuf_lock;
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bool irq_enabled;
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void *notifier_cookie;
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};
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#if NVT_TOUCH_PROC
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struct nvt_flash_data{
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rwlock_t lock;
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struct i2c_client *client;
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};
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#endif
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typedef enum {
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RESET_STATE_INIT = 0xA0,// IC reset
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RESET_STATE_REK, // ReK baseline
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RESET_STATE_REK_FINISH, // baseline is ready
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RESET_STATE_NORMAL_RUN, // normal run
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RESET_STATE_MAX = 0xAF
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} RST_COMPLETE_STATE;
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typedef enum {
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EVENT_MAP_HOST_CMD = 0x50,
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EVENT_MAP_HANDSHAKING_or_SUB_CMD_BYTE = 0x51,
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EVENT_MAP_RESET_COMPLETE = 0x60,
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EVENT_MAP_FWINFO = 0x78,
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EVENT_MAP_PROJECTID = 0x9A,
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} I2C_EVENT_MAP;
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//---extern structures---
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extern struct nvt_ts_data *ts;
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//---extern functions---
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extern int32_t CTP_I2C_READ(struct i2c_client *client, uint16_t address, uint8_t *buf, uint16_t len);
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extern int32_t CTP_I2C_WRITE(struct i2c_client *client, uint16_t address, uint8_t *buf, uint16_t len);
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extern void nvt_bootloader_reset(void);
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extern void nvt_sw_reset_idle(void);
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extern int32_t nvt_check_fw_reset_state(RST_COMPLETE_STATE check_reset_state);
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extern int32_t nvt_get_fw_info(void);
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extern int32_t nvt_clear_fw_status(void);
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extern int32_t nvt_check_fw_status(void);
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extern int32_t nvt_set_page(uint16_t i2c_addr, uint32_t addr);
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#if NVT_TOUCH_ESD_PROTECT
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extern void nvt_esd_check_enable(uint8_t enable);
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#endif /* #if NVT_TOUCH_ESD_PROTECT */
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extern void nvt_stop_crc_reboot(void);
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#else /* NT36XXX_SPI */
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#include <linux/delay.h>
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#include <linux/input.h>
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#include <linux/of.h>
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#include <linux/spi/spi.h>
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#include <linux/uaccess.h>
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#include "nt36xxx_mem_map.h"
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#define NVT_SPI_DEBUG 0
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//---GPIO number---
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#define NVTTOUCH_RST_PIN 980
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#define NVTTOUCH_INT_PIN 943
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//---INT trigger mode---
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//#define NVT_SPI_IRQ_TYPE_EDGE_RISING 1
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//#define NVT_SPI_IRQ_TYPE_EDGE_FALLING 2
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#define NVT_SPI_INT_TRIGGER_TYPE IRQ_TYPE_EDGE_RISING
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//---SPI driver info.---
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#define NVT_SPI_NAME "NVT-SPI"
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#if NVT_SPI_DEBUG
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#define NVT_LOG(fmt, args...) pr_err("[%s] %s %d: " fmt, "NVT-SPI", __func__, __LINE__, ##args)
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#else
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#define NVT_LOG(fmt, args...) pr_debug("[%s] %s %d: " fmt, "NVT-SPI", __func__, __LINE__, ##args)
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#endif
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#define NVT_ERR(fmt, args...) pr_err("[%s] %s %d: " fmt, "NVT-SPI", __func__, __LINE__, ##args)
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//---Input device info.---
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#define NVT_SPI_TS_NAME "NVTCapacitiveTouchScreen"
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#define NVT_SPI_PEN_NAME "NVTCapacitivePen"
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//---Touch info.---
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#define NVT_SPI_TOUCH_DEFAULT_MAX_WIDTH 1080
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#define NVT_SPI_TOUCH_DEFAULT_MAX_HEIGHT 2400
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#define NVT_SPI_TOUCH_MAX_FINGER_NUM 10
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#define NVT_SPI_TOUCH_KEY_NUM 0
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#if NVT_SPI_TOUCH_KEY_NUM > 0
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extern const uint16_t nvt_spi_touch_key_array[NVT_SPI_TOUCH_KEY_NUM];
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#endif
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#define NVT_SPI_TOUCH_FORCE_NUM 1000
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//---for Pen---
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#define NVT_SPI_PEN_PRESSURE_MAX (4095)
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#define NVT_SPI_PEN_DISTANCE_MAX (1)
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#define NVT_SPI_PEN_TILT_MIN (-60)
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#define NVT_SPI_PEN_TILT_MAX (60)
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/* Enable only when module have tp reset pin and connected to host */
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#define NVT_SPI_TOUCH_SUPPORT_HW_RST 0
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//---Customerized func.---
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#define NVT_SPI_TOUCH_PROC 1
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#define NVT_SPI_TOUCH_EXT_PROC 1
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#define NVT_SPI_TOUCH_MP 0
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#define NVT_SPI_MT_PROTOCOL_B 1
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#define NVT_SPI_WAKEUP_GESTURE 0
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#if NVT_SPI_WAKEUP_GESTURE
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extern const uint16_t nvt_spi_gesture_key_array[];
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#endif
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#define NVT_SPI_BOOT_UPDATE_FIRMWARE 1
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#define NVT_SPI_BOOT_UPDATE_FIRMWARE_NAME "novatek_spi_fw.bin"
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#define NVT_SPI_MP_UPDATE_FIRMWARE_NAME "novatek_ts_mp.bin"
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#define NVT_SPI_POINT_DATA_CHECKSUM 1
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#define NVT_SPI_POINT_DATA_CHECKSUM_LEN 65
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//---ESD Protect.---
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#define NVT_SPI_TOUCH_ESD_PROTECT 0
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#define NVT_SPI_TOUCH_ESD_CHECK_PERIOD 1500 /* ms */
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#define NVT_SPI_TOUCH_WDT_RECOVERY 1
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#define NVT_SPI_CHECK_PEN_DATA_CHECKSUM 0
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struct nvt_spi_data_t {
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struct spi_device *client;
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struct input_dev *input_dev;
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struct delayed_work nvt_fwu_work;
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uint16_t addr;
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int8_t phys[32];
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#if defined(CONFIG_DRM)
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struct notifier_block drm_panel_notif;
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#elif defined(_MSM_DRM_NOTIFY_H_)
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struct notifier_block drm_notif;
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#else
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struct notifier_block fb_notif;
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#endif
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uint8_t fw_ver;
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uint8_t x_num;
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uint8_t y_num;
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uint16_t abs_x_max;
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uint16_t abs_y_max;
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uint8_t max_touch_num;
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uint8_t max_button_num;
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uint32_t int_trigger_type;
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int32_t irq_gpio;
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uint32_t irq_flags;
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int32_t reset_gpio;
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uint32_t reset_flags;
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struct mutex lock;
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const struct nvt_spi_mem_map *mmap;
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uint8_t hw_crc;
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uint16_t nvt_pid;
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uint8_t *rbuf;
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uint8_t *xbuf;
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struct mutex xbuf_lock;
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bool irq_enabled;
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bool pen_support;
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bool wgp_stylus;
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uint8_t x_gang_num;
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uint8_t y_gang_num;
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struct input_dev *pen_input_dev;
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int8_t pen_phys[32];
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void *notifier_cookie;
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const char *touch_environment;
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#ifdef CONFIG_NOVATEK_SPI_TRUSTED_TOUCH
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struct trusted_touch_vm_info *vm_info;
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struct mutex fts_clk_io_ctrl_mutex;
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struct completion trusted_touch_powerdown;
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struct clk *core_clk;
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struct clk *iface_clk;
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atomic_t trusted_touch_initialized;
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atomic_t trusted_touch_enabled;
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atomic_t trusted_touch_underway;
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atomic_t trusted_touch_event;
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atomic_t trusted_touch_abort_status;
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atomic_t delayed_vm_probe_pending;
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atomic_t trusted_touch_mode;
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#endif
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};
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#if NVT_SPI_TOUCH_PROC
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struct nvt_spi_flash_data {
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rwlock_t lock;
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};
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#endif
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enum NVT_SPI_RST_COMPLETE_STATE {
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NVT_SPI_RESET_STATE_INIT = 0xA0,// IC reset
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NVT_SPI_RESET_STATE_REK, // ReK baseline
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NVT_SPI_RESET_STATE_REK_FINISH, // baseline is ready
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NVT_SPI_RESET_STATE_NORMAL_RUN, // normal run
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NVT_SPI_RESET_STATE_MAX = 0xAF
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};
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enum NVT_SPI_EVENT_MAP {
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NVT_SPI_EVENT_MAP_HOST_CMD = 0x50,
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NVT_SPI_EVENT_MAP_HANDSHAKING_or_SUB_CMD_BYTE = 0x51,
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NVT_SPI_EVENT_MAP_RESET_COMPLETE = 0x60,
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NVT_SPI_EVENT_MAP_FWINFO = 0x78,
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NVT_SPI_EVENT_MAP_PROJECTID = 0x9A,
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};
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//---SPI READ/WRITE---
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#define NVT_SPI_WRITE_MASK(a) (a | 0x80)
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#define NVT_SPI_READ_MASK(a) (a & 0x7F)
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#define NVT_SPI_DUMMY_BYTES (1)
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#define NVT_SPI_TRANSFER_LEN (63*1024)
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#define NVT_SPI_READ_LEN (2*1024)
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#define NVT_SPI_XBUF_LEN (NVT_SPI_TRANSFER_LEN+1+NVT_SPI_DUMMY_BYTES)
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|
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enum NVT_SPI_RW {
|
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NVT_SPI_WRITE = 0,
|
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NVT_SPI_READ = 1
|
||||
};
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//---extern structures---
|
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extern struct nvt_spi_data_t *nvt_spi_data;
|
||||
|
||||
//---extern functions---
|
||||
int32_t nvt_spi_read(uint8_t *buf, uint16_t len);
|
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int32_t nvt_spi_write(uint8_t *buf, uint16_t len);
|
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void nvt_spi_bootloader_reset(void);
|
||||
void nvt_spi_eng_reset(void);
|
||||
void nvt_spi_sw_reset(void);
|
||||
void nvt_spi_sw_reset_idle(void);
|
||||
void nvt_spi_boot_ready(void);
|
||||
void nvt_spi_bld_crc_enable(void);
|
||||
void nvt_spi_fw_crc_enable(void);
|
||||
void nvt_spi_tx_auto_copy_mode(void);
|
||||
int32_t nvt_spi_update_firmware(char *firmware_name);
|
||||
void nvt_spi_update_firmware_work(struct work_struct *work);
|
||||
int32_t nvt_spi_check_fw_reset_state(enum NVT_SPI_RST_COMPLETE_STATE reset_state);
|
||||
int32_t nvt_spi_get_fw_info(void);
|
||||
int32_t nvt_spi_clear_fw_status(void);
|
||||
int32_t nvt_spi_check_fw_status(void);
|
||||
int32_t nvt_spi_check_spi_dma_tx_info(void);
|
||||
int32_t nvt_spi_set_page(uint32_t addr);
|
||||
int32_t nvt_spi_write_addr(uint32_t addr, uint8_t data);
|
||||
|
||||
#if NVT_SPI_TOUCH_EXT_PROC
|
||||
int32_t nvt_spi_extra_proc_init(void);
|
||||
void nvt_spi_extra_proc_deinit(void);
|
||||
#endif
|
||||
|
||||
#if NVT_SPI_TOUCH_MP
|
||||
extern int32_t nvt_spi_mp_proc_init(void);
|
||||
extern void nvt_spi_mp_proc_deinit(void);
|
||||
#endif
|
||||
|
||||
#if NVT_SPI_TOUCH_ESD_PROTECT
|
||||
extern void nvt_spi_esd_check_enable(uint8_t enable);
|
||||
#endif /* #if NVT_SPI_TOUCH_ESD_PROTECT */
|
||||
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* _LINUX_NVT_TOUCH_H */
|
||||
1537
qcom/opensource/touch-drivers/nt36xxx/nt36xxx_ext_proc.c
Normal file
1537
qcom/opensource/touch-drivers/nt36xxx/nt36xxx_ext_proc.c
Normal file
File diff suppressed because it is too large
Load Diff
2002
qcom/opensource/touch-drivers/nt36xxx/nt36xxx_fw_update.c
Normal file
2002
qcom/opensource/touch-drivers/nt36xxx/nt36xxx_fw_update.c
Normal file
File diff suppressed because it is too large
Load Diff
607
qcom/opensource/touch-drivers/nt36xxx/nt36xxx_mem_map.h
Normal file
607
qcom/opensource/touch-drivers/nt36xxx/nt36xxx_mem_map.h
Normal file
@@ -0,0 +1,607 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (C) 2010 - 2018 Novatek, Inc.
|
||||
*
|
||||
* $Revision: 48764 $
|
||||
* $Date: 2019-08-08 14:52:12 +0800 (Thu, 08 Aug 2019) $
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*/
|
||||
#define CHIP_VER_TRIM_ADDR 0x3F004
|
||||
#define CHIP_VER_TRIM_OLD_ADDR 0x1F64E
|
||||
|
||||
#if !defined(NVT_NT36XXX_SPI) /* NT36XXX I2C */
|
||||
|
||||
struct nvt_ts_mem_map {
|
||||
uint32_t EVENT_BUF_ADDR;
|
||||
uint32_t RAW_PIPE0_ADDR;
|
||||
uint32_t RAW_PIPE1_ADDR;
|
||||
uint32_t BASELINE_ADDR;
|
||||
uint32_t BASELINE_BTN_ADDR;
|
||||
uint32_t DIFF_PIPE0_ADDR;
|
||||
uint32_t DIFF_PIPE1_ADDR;
|
||||
uint32_t RAW_BTN_PIPE0_ADDR;
|
||||
uint32_t RAW_BTN_PIPE1_ADDR;
|
||||
uint32_t DIFF_BTN_PIPE0_ADDR;
|
||||
uint32_t DIFF_BTN_PIPE1_ADDR;
|
||||
uint32_t READ_FLASH_CHECKSUM_ADDR;
|
||||
uint32_t RW_FLASH_DATA_ADDR;
|
||||
};
|
||||
|
||||
struct nvt_ts_hw_info {
|
||||
uint8_t carrier_system;
|
||||
uint8_t hw_crc;
|
||||
};
|
||||
|
||||
static const struct nvt_ts_mem_map NT36526_memory_map = {
|
||||
.EVENT_BUF_ADDR = 0x22D00,
|
||||
.RAW_PIPE0_ADDR = 0x24000,
|
||||
.RAW_PIPE1_ADDR = 0x24000,
|
||||
.BASELINE_ADDR = 0x21758,
|
||||
.BASELINE_BTN_ADDR = 0,
|
||||
.DIFF_PIPE0_ADDR = 0x20AB0,
|
||||
.DIFF_PIPE1_ADDR = 0x24AB0,
|
||||
.RAW_BTN_PIPE0_ADDR = 0,
|
||||
.RAW_BTN_PIPE1_ADDR = 0,
|
||||
.DIFF_BTN_PIPE0_ADDR = 0,
|
||||
.DIFF_BTN_PIPE1_ADDR = 0,
|
||||
.READ_FLASH_CHECKSUM_ADDR = 0x24000,
|
||||
.RW_FLASH_DATA_ADDR = 0x24002,
|
||||
};
|
||||
|
||||
static const struct nvt_ts_mem_map NT36675_memory_map = {
|
||||
.EVENT_BUF_ADDR = 0x22D00,
|
||||
.RAW_PIPE0_ADDR = 0x24000,
|
||||
.RAW_PIPE1_ADDR = 0x24000,
|
||||
.BASELINE_ADDR = 0x21B90,
|
||||
.BASELINE_BTN_ADDR = 0,
|
||||
.DIFF_PIPE0_ADDR = 0x20C60,
|
||||
.DIFF_PIPE1_ADDR = 0x24C60,
|
||||
.RAW_BTN_PIPE0_ADDR = 0,
|
||||
.RAW_BTN_PIPE1_ADDR = 0,
|
||||
.DIFF_BTN_PIPE0_ADDR = 0,
|
||||
.DIFF_BTN_PIPE1_ADDR = 0,
|
||||
.READ_FLASH_CHECKSUM_ADDR = 0x24000,
|
||||
.RW_FLASH_DATA_ADDR = 0x24002,
|
||||
};
|
||||
|
||||
static const struct nvt_ts_mem_map NT36672A_memory_map = {
|
||||
.EVENT_BUF_ADDR = 0x21C00,
|
||||
.RAW_PIPE0_ADDR = 0x20000,
|
||||
.RAW_PIPE1_ADDR = 0x23000,
|
||||
.BASELINE_ADDR = 0x20BFC,
|
||||
.BASELINE_BTN_ADDR = 0x23BFC,
|
||||
.DIFF_PIPE0_ADDR = 0x206DC,
|
||||
.DIFF_PIPE1_ADDR = 0x236DC,
|
||||
.RAW_BTN_PIPE0_ADDR = 0x20510,
|
||||
.RAW_BTN_PIPE1_ADDR = 0x23510,
|
||||
.DIFF_BTN_PIPE0_ADDR = 0x20BF0,
|
||||
.DIFF_BTN_PIPE1_ADDR = 0x23BF0,
|
||||
.READ_FLASH_CHECKSUM_ADDR = 0x24000,
|
||||
.RW_FLASH_DATA_ADDR = 0x24002,
|
||||
};
|
||||
|
||||
static const struct nvt_ts_mem_map NT36772_memory_map = {
|
||||
.EVENT_BUF_ADDR = 0x11E00,
|
||||
.RAW_PIPE0_ADDR = 0x10000,
|
||||
.RAW_PIPE1_ADDR = 0x12000,
|
||||
.BASELINE_ADDR = 0x10E70,
|
||||
.BASELINE_BTN_ADDR = 0x12E70,
|
||||
.DIFF_PIPE0_ADDR = 0x10830,
|
||||
.DIFF_PIPE1_ADDR = 0x12830,
|
||||
.RAW_BTN_PIPE0_ADDR = 0x10E60,
|
||||
.RAW_BTN_PIPE1_ADDR = 0x12E60,
|
||||
.DIFF_BTN_PIPE0_ADDR = 0x10E68,
|
||||
.DIFF_BTN_PIPE1_ADDR = 0x12E68,
|
||||
.READ_FLASH_CHECKSUM_ADDR = 0x14000,
|
||||
.RW_FLASH_DATA_ADDR = 0x14002,
|
||||
};
|
||||
|
||||
static const struct nvt_ts_mem_map NT36525_memory_map = {
|
||||
.EVENT_BUF_ADDR = 0x11A00,
|
||||
.RAW_PIPE0_ADDR = 0x10000,
|
||||
.RAW_PIPE1_ADDR = 0x12000,
|
||||
.BASELINE_ADDR = 0x10B08,
|
||||
.BASELINE_BTN_ADDR = 0x12B08,
|
||||
.DIFF_PIPE0_ADDR = 0x1064C,
|
||||
.DIFF_PIPE1_ADDR = 0x1264C,
|
||||
.RAW_BTN_PIPE0_ADDR = 0x10634,
|
||||
.RAW_BTN_PIPE1_ADDR = 0x12634,
|
||||
.DIFF_BTN_PIPE0_ADDR = 0x10AFC,
|
||||
.DIFF_BTN_PIPE1_ADDR = 0x12AFC,
|
||||
.READ_FLASH_CHECKSUM_ADDR = 0x14000,
|
||||
.RW_FLASH_DATA_ADDR = 0x14002,
|
||||
};
|
||||
|
||||
static const struct nvt_ts_mem_map NT36676F_memory_map = {
|
||||
.EVENT_BUF_ADDR = 0x11A00,
|
||||
.RAW_PIPE0_ADDR = 0x10000,
|
||||
.RAW_PIPE1_ADDR = 0x12000,
|
||||
.BASELINE_ADDR = 0x10B08,
|
||||
.BASELINE_BTN_ADDR = 0x12B08,
|
||||
.DIFF_PIPE0_ADDR = 0x1064C,
|
||||
.DIFF_PIPE1_ADDR = 0x1264C,
|
||||
.RAW_BTN_PIPE0_ADDR = 0x10634,
|
||||
.RAW_BTN_PIPE1_ADDR = 0x12634,
|
||||
.DIFF_BTN_PIPE0_ADDR = 0x10AFC,
|
||||
.DIFF_BTN_PIPE1_ADDR = 0x12AFC,
|
||||
.READ_FLASH_CHECKSUM_ADDR = 0x14000,
|
||||
.RW_FLASH_DATA_ADDR = 0x14002,
|
||||
};
|
||||
|
||||
static struct nvt_ts_hw_info NT36526_hw_info = {
|
||||
.carrier_system = 2,
|
||||
.hw_crc = 2,
|
||||
};
|
||||
|
||||
static struct nvt_ts_hw_info NT36675_hw_info = {
|
||||
.carrier_system = 2,
|
||||
.hw_crc = 2,
|
||||
};
|
||||
|
||||
static struct nvt_ts_hw_info NT36672A_hw_info = {
|
||||
.carrier_system = 0,
|
||||
.hw_crc = 1,
|
||||
};
|
||||
|
||||
static struct nvt_ts_hw_info NT36772_hw_info = {
|
||||
.carrier_system = 0,
|
||||
.hw_crc = 0,
|
||||
};
|
||||
|
||||
static struct nvt_ts_hw_info NT36525_hw_info = {
|
||||
.carrier_system = 0,
|
||||
.hw_crc = 0,
|
||||
};
|
||||
|
||||
static struct nvt_ts_hw_info NT36676F_hw_info = {
|
||||
.carrier_system = 0,
|
||||
.hw_crc = 0,
|
||||
};
|
||||
|
||||
#define NVT_ID_BYTE_MAX 6
|
||||
struct nvt_ts_trim_id_table {
|
||||
uint8_t id[NVT_ID_BYTE_MAX];
|
||||
uint8_t mask[NVT_ID_BYTE_MAX];
|
||||
const struct nvt_ts_mem_map *mmap;
|
||||
const struct nvt_ts_hw_info *hwinfo;
|
||||
};
|
||||
|
||||
static const struct nvt_ts_trim_id_table trim_id_table[] = {
|
||||
{.id = {0x20, 0xFF, 0xFF, 0x72, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36675_memory_map, .hwinfo = &NT36675_hw_info},
|
||||
{.id = {0x00, 0xFF, 0xFF, 0x80, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36675_memory_map, .hwinfo = &NT36675_hw_info},
|
||||
{.id = {0x0C, 0xFF, 0xFF, 0x25, 0x65, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0E, 0xFF, 0xFF, 0x72, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36675_memory_map, .hwinfo = &NT36675_hw_info},
|
||||
{.id = {0x0C, 0xFF, 0xFF, 0x72, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36675_memory_map, .hwinfo = &NT36675_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x26, 0x65, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36526_memory_map, .hwinfo = &NT36526_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x75, 0x66, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36675_memory_map, .hwinfo = &NT36675_hw_info},
|
||||
{.id = {0x0B, 0xFF, 0xFF, 0x72, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0B, 0xFF, 0xFF, 0x82, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0B, 0xFF, 0xFF, 0x25, 0x65, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0A, 0xFF, 0xFF, 0x72, 0x65, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0A, 0xFF, 0xFF, 0x72, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0A, 0xFF, 0xFF, 0x82, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0A, 0xFF, 0xFF, 0x70, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0B, 0xFF, 0xFF, 0x70, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0A, 0xFF, 0xFF, 0x72, 0x67, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x55, 0x00, 0xFF, 0x00, 0x00, 0x00}, .mask = {1, 1, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0x55, 0x72, 0xFF, 0x00, 0x00, 0x00}, .mask = {1, 1, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0xAA, 0x00, 0xFF, 0x00, 0x00, 0x00}, .mask = {1, 1, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0xAA, 0x72, 0xFF, 0x00, 0x00, 0x00}, .mask = {1, 1, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x72, 0x67, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x70, 0x66, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x70, 0x67, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x72, 0x66, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x25, 0x65, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36525_memory_map, .hwinfo = &NT36525_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x76, 0x66, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36676F_memory_map, .hwinfo = &NT36676F_hw_info}
|
||||
};
|
||||
|
||||
#else /* NT36XXX_SPI */
|
||||
|
||||
#define NVT_SPI_CHIP_VER_TRIM_ADDR 0x3F004
|
||||
#define NVT_SPI_CHIP_VER_TRIM_OLD_ADDR 0x1F64E
|
||||
|
||||
struct nvt_spi_mem_map {
|
||||
uint32_t EVENT_BUF_ADDR;
|
||||
uint32_t RAW_PIPE0_ADDR;
|
||||
uint32_t RAW_PIPE1_ADDR;
|
||||
uint32_t BASELINE_ADDR;
|
||||
uint32_t BASELINE_BTN_ADDR;
|
||||
uint32_t DIFF_PIPE0_ADDR;
|
||||
uint32_t DIFF_PIPE1_ADDR;
|
||||
uint32_t RAW_BTN_PIPE0_ADDR;
|
||||
uint32_t RAW_BTN_PIPE1_ADDR;
|
||||
uint32_t DIFF_BTN_PIPE0_ADDR;
|
||||
uint32_t DIFF_BTN_PIPE1_ADDR;
|
||||
uint32_t PEN_2D_BL_TIP_X_ADDR;
|
||||
uint32_t PEN_2D_BL_TIP_Y_ADDR;
|
||||
uint32_t PEN_2D_BL_RING_X_ADDR;
|
||||
uint32_t PEN_2D_BL_RING_Y_ADDR;
|
||||
uint32_t PEN_2D_DIFF_TIP_X_ADDR;
|
||||
uint32_t PEN_2D_DIFF_TIP_Y_ADDR;
|
||||
uint32_t PEN_2D_DIFF_RING_X_ADDR;
|
||||
uint32_t PEN_2D_DIFF_RING_Y_ADDR;
|
||||
uint32_t PEN_2D_RAW_TIP_X_ADDR;
|
||||
uint32_t PEN_2D_RAW_TIP_Y_ADDR;
|
||||
uint32_t PEN_2D_RAW_RING_X_ADDR;
|
||||
uint32_t PEN_2D_RAW_RING_Y_ADDR;
|
||||
uint32_t PEN_1D_DIFF_TIP_X_ADDR;
|
||||
uint32_t PEN_1D_DIFF_TIP_Y_ADDR;
|
||||
uint32_t PEN_1D_DIFF_RING_X_ADDR;
|
||||
uint32_t PEN_1D_DIFF_RING_Y_ADDR;
|
||||
uint32_t READ_FLASH_CHECKSUM_ADDR;
|
||||
uint32_t RW_FLASH_DATA_ADDR;
|
||||
/* Phase 2 Host Download */
|
||||
uint32_t BOOT_RDY_ADDR;
|
||||
uint32_t POR_CD_ADDR;
|
||||
uint32_t TX_AUTO_COPY_EN;
|
||||
uint32_t SPI_DMA_TX_INFO;
|
||||
/* BLD CRC */
|
||||
uint32_t BLD_LENGTH_ADDR;
|
||||
uint32_t ILM_LENGTH_ADDR;
|
||||
uint32_t DLM_LENGTH_ADDR;
|
||||
uint32_t BLD_DES_ADDR;
|
||||
uint32_t ILM_DES_ADDR;
|
||||
uint32_t DLM_DES_ADDR;
|
||||
uint32_t G_ILM_CHECKSUM_ADDR;
|
||||
uint32_t G_DLM_CHECKSUM_ADDR;
|
||||
uint32_t R_ILM_CHECKSUM_ADDR;
|
||||
uint32_t R_DLM_CHECKSUM_ADDR;
|
||||
uint32_t BLD_CRC_EN_ADDR;
|
||||
uint32_t DMA_CRC_EN_ADDR;
|
||||
uint32_t BLD_ILM_DLM_CRC_ADDR;
|
||||
uint32_t DMA_CRC_FLAG_ADDR;
|
||||
};
|
||||
|
||||
struct nvt_spi_hw_info {
|
||||
uint8_t hw_crc;
|
||||
};
|
||||
|
||||
static const struct nvt_spi_mem_map NT36523_memory_map = {
|
||||
.EVENT_BUF_ADDR = 0x2FE00,
|
||||
.RAW_PIPE0_ADDR = 0x30FA0,
|
||||
.RAW_PIPE1_ADDR = 0x30FA0,
|
||||
.BASELINE_ADDR = 0x36510,
|
||||
.BASELINE_BTN_ADDR = 0,
|
||||
.DIFF_PIPE0_ADDR = 0x373E8,
|
||||
.DIFF_PIPE1_ADDR = 0x38068,
|
||||
.RAW_BTN_PIPE0_ADDR = 0,
|
||||
.RAW_BTN_PIPE1_ADDR = 0,
|
||||
.DIFF_BTN_PIPE0_ADDR = 0,
|
||||
.DIFF_BTN_PIPE1_ADDR = 0,
|
||||
.PEN_2D_BL_TIP_X_ADDR = 0x2988A,
|
||||
.PEN_2D_BL_TIP_Y_ADDR = 0x29A1A,
|
||||
.PEN_2D_BL_RING_X_ADDR = 0x29BAA,
|
||||
.PEN_2D_BL_RING_Y_ADDR = 0x29D3A,
|
||||
.PEN_2D_DIFF_TIP_X_ADDR = 0x29ECA,
|
||||
.PEN_2D_DIFF_TIP_Y_ADDR = 0x2A05A,
|
||||
.PEN_2D_DIFF_RING_X_ADDR = 0x2A1EA,
|
||||
.PEN_2D_DIFF_RING_Y_ADDR = 0x2A37A,
|
||||
.PEN_2D_RAW_TIP_X_ADDR = 0x2A50A,
|
||||
.PEN_2D_RAW_TIP_Y_ADDR = 0x2A69A,
|
||||
.PEN_2D_RAW_RING_X_ADDR = 0x2A82A,
|
||||
.PEN_2D_RAW_RING_Y_ADDR = 0x2A9BA,
|
||||
.PEN_1D_DIFF_TIP_X_ADDR = 0x2AB4A,
|
||||
.PEN_1D_DIFF_TIP_Y_ADDR = 0x2ABAE,
|
||||
.PEN_1D_DIFF_RING_X_ADDR = 0x2AC12,
|
||||
.PEN_1D_DIFF_RING_Y_ADDR = 0x2AC76,
|
||||
.READ_FLASH_CHECKSUM_ADDR = 0x24000,
|
||||
.RW_FLASH_DATA_ADDR = 0x24002,
|
||||
/* Phase 2 Host Download */
|
||||
.BOOT_RDY_ADDR = 0x3F10D,
|
||||
.TX_AUTO_COPY_EN = 0x3F7E8,
|
||||
.SPI_DMA_TX_INFO = 0x3F7F1,
|
||||
/* BLD CRC */
|
||||
.BLD_LENGTH_ADDR = 0x3F138, //0x3F138 ~ 0x3F13A (3 bytes)
|
||||
.ILM_LENGTH_ADDR = 0x3F118, //0x3F118 ~ 0x3F11A (3 bytes)
|
||||
.DLM_LENGTH_ADDR = 0x3F130, //0x3F130 ~ 0x3F132 (3 bytes)
|
||||
.BLD_DES_ADDR = 0x3F114, //0x3F114 ~ 0x3F116 (3 bytes)
|
||||
.ILM_DES_ADDR = 0x3F128, //0x3F128 ~ 0x3F12A (3 bytes)
|
||||
.DLM_DES_ADDR = 0x3F12C, //0x3F12C ~ 0x3F12E (3 bytes)
|
||||
.G_ILM_CHECKSUM_ADDR = 0x3F100, //0x3F100 ~ 0x3F103 (4 bytes)
|
||||
.G_DLM_CHECKSUM_ADDR = 0x3F104, //0x3F104 ~ 0x3F107 (4 bytes)
|
||||
.R_ILM_CHECKSUM_ADDR = 0x3F120, //0x3F120 ~ 0x3F123 (4 bytes)
|
||||
.R_DLM_CHECKSUM_ADDR = 0x3F124, //0x3F124 ~ 0x3F127 (4 bytes)
|
||||
.BLD_CRC_EN_ADDR = 0x3F30E,
|
||||
.DMA_CRC_EN_ADDR = 0x3F136,
|
||||
.BLD_ILM_DLM_CRC_ADDR = 0x3F133,
|
||||
.DMA_CRC_FLAG_ADDR = 0x3F134,
|
||||
};
|
||||
|
||||
static const struct nvt_spi_mem_map NT36526_memory_map = {
|
||||
.EVENT_BUF_ADDR = 0x22D00,
|
||||
.RAW_PIPE0_ADDR = 0x24000,
|
||||
.RAW_PIPE1_ADDR = 0x24000,
|
||||
.BASELINE_ADDR = 0x21758,
|
||||
.BASELINE_BTN_ADDR = 0,
|
||||
.DIFF_PIPE0_ADDR = 0x20AB0,
|
||||
.DIFF_PIPE1_ADDR = 0x24AB0,
|
||||
.RAW_BTN_PIPE0_ADDR = 0,
|
||||
.RAW_BTN_PIPE1_ADDR = 0,
|
||||
.DIFF_BTN_PIPE0_ADDR = 0,
|
||||
.DIFF_BTN_PIPE1_ADDR = 0,
|
||||
.READ_FLASH_CHECKSUM_ADDR = 0x24000,
|
||||
.RW_FLASH_DATA_ADDR = 0x24002,
|
||||
/* Phase 2 Host Download */
|
||||
.BOOT_RDY_ADDR = 0x3F10D,
|
||||
/* BLD CRC */
|
||||
.BLD_LENGTH_ADDR = 0x3F138, //0x3F138 ~ 0x3F13A (3 bytes)
|
||||
.ILM_LENGTH_ADDR = 0x3F118, //0x3F118 ~ 0x3F11A (3 bytes)
|
||||
.DLM_LENGTH_ADDR = 0x3F130, //0x3F130 ~ 0x3F132 (3 bytes)
|
||||
.BLD_DES_ADDR = 0x3F114, //0x3F114 ~ 0x3F116 (3 bytes)
|
||||
.ILM_DES_ADDR = 0x3F128, //0x3F128 ~ 0x3F12A (3 bytes)
|
||||
.DLM_DES_ADDR = 0x3F12C, //0x3F12C ~ 0x3F12E (3 bytes)
|
||||
.G_ILM_CHECKSUM_ADDR = 0x3F100, //0x3F100 ~ 0x3F103 (4 bytes)
|
||||
.G_DLM_CHECKSUM_ADDR = 0x3F104, //0x3F104 ~ 0x3F107 (4 bytes)
|
||||
.R_ILM_CHECKSUM_ADDR = 0x3F120, //0x3F120 ~ 0x3F123 (4 bytes)
|
||||
.R_DLM_CHECKSUM_ADDR = 0x3F124, //0x3F124 ~ 0x3F127 (4 bytes)
|
||||
.BLD_CRC_EN_ADDR = 0x3F30E,
|
||||
.DMA_CRC_EN_ADDR = 0x3F136,
|
||||
.BLD_ILM_DLM_CRC_ADDR = 0x3F133,
|
||||
.DMA_CRC_FLAG_ADDR = 0x3F134,
|
||||
};
|
||||
|
||||
|
||||
static const struct nvt_spi_mem_map NT36675_memory_map = {
|
||||
.EVENT_BUF_ADDR = 0x22D00,
|
||||
.RAW_PIPE0_ADDR = 0x24000,
|
||||
.RAW_PIPE1_ADDR = 0x24000,
|
||||
.BASELINE_ADDR = 0x21B90,
|
||||
.BASELINE_BTN_ADDR = 0,
|
||||
.DIFF_PIPE0_ADDR = 0x20C60,
|
||||
.DIFF_PIPE1_ADDR = 0x24C60,
|
||||
.RAW_BTN_PIPE0_ADDR = 0,
|
||||
.RAW_BTN_PIPE1_ADDR = 0,
|
||||
.DIFF_BTN_PIPE0_ADDR = 0,
|
||||
.DIFF_BTN_PIPE1_ADDR = 0,
|
||||
.READ_FLASH_CHECKSUM_ADDR = 0x24000,
|
||||
.RW_FLASH_DATA_ADDR = 0x24002,
|
||||
/* Phase 2 Host Download */
|
||||
.BOOT_RDY_ADDR = 0x3F10D,
|
||||
/* BLD CRC */
|
||||
.BLD_LENGTH_ADDR = 0x3F138, //0x3F138 ~ 0x3F13A (3 bytes)
|
||||
.ILM_LENGTH_ADDR = 0x3F118, //0x3F118 ~ 0x3F11A (3 bytes)
|
||||
.DLM_LENGTH_ADDR = 0x3F130, //0x3F130 ~ 0x3F132 (3 bytes)
|
||||
.BLD_DES_ADDR = 0x3F114, //0x3F114 ~ 0x3F116 (3 bytes)
|
||||
.ILM_DES_ADDR = 0x3F128, //0x3F128 ~ 0x3F12A (3 bytes)
|
||||
.DLM_DES_ADDR = 0x3F12C, //0x3F12C ~ 0x3F12E (3 bytes)
|
||||
.G_ILM_CHECKSUM_ADDR = 0x3F100, //0x3F100 ~ 0x3F103 (4 bytes)
|
||||
.G_DLM_CHECKSUM_ADDR = 0x3F104, //0x3F104 ~ 0x3F107 (4 bytes)
|
||||
.R_ILM_CHECKSUM_ADDR = 0x3F120, //0x3F120 ~ 0x3F123 (4 bytes)
|
||||
.R_DLM_CHECKSUM_ADDR = 0x3F124, //0x3F124 ~ 0x3F127 (4 bytes)
|
||||
.BLD_CRC_EN_ADDR = 0x3F30E,
|
||||
.DMA_CRC_EN_ADDR = 0x3F136,
|
||||
.BLD_ILM_DLM_CRC_ADDR = 0x3F133,
|
||||
.DMA_CRC_FLAG_ADDR = 0x3F134,
|
||||
};
|
||||
|
||||
static const struct nvt_spi_mem_map NT36672A_memory_map = {
|
||||
.EVENT_BUF_ADDR = 0x21C00,
|
||||
.RAW_PIPE0_ADDR = 0x20000,
|
||||
.RAW_PIPE1_ADDR = 0x23000,
|
||||
.BASELINE_ADDR = 0x20BFC,
|
||||
.BASELINE_BTN_ADDR = 0x23BFC,
|
||||
.DIFF_PIPE0_ADDR = 0x206DC,
|
||||
.DIFF_PIPE1_ADDR = 0x236DC,
|
||||
.RAW_BTN_PIPE0_ADDR = 0x20510,
|
||||
.RAW_BTN_PIPE1_ADDR = 0x23510,
|
||||
.DIFF_BTN_PIPE0_ADDR = 0x20BF0,
|
||||
.DIFF_BTN_PIPE1_ADDR = 0x23BF0,
|
||||
.READ_FLASH_CHECKSUM_ADDR = 0x24000,
|
||||
.RW_FLASH_DATA_ADDR = 0x24002,
|
||||
/* Phase 2 Host Download */
|
||||
.BOOT_RDY_ADDR = 0x3F10D,
|
||||
/* BLD CRC */
|
||||
.BLD_LENGTH_ADDR = 0x3F10E, //0x3F10E ~ 0x3F10F (2 bytes)
|
||||
.ILM_LENGTH_ADDR = 0x3F118, //0x3F118 ~ 0x3F119 (2 bytes)
|
||||
.DLM_LENGTH_ADDR = 0x3F130, //0x3F130 ~ 0x3F131 (2 bytes)
|
||||
.BLD_DES_ADDR = 0x3F114, //0x3F114 ~ 0x3F116 (3 bytes)
|
||||
.ILM_DES_ADDR = 0x3F128, //0x3F128 ~ 0x3F12A (3 bytes)
|
||||
.DLM_DES_ADDR = 0x3F12C, //0x3F12C ~ 0x3F12E (3 bytes)
|
||||
.G_ILM_CHECKSUM_ADDR = 0x3F100, //0x3F100 ~ 0x3F103 (4 bytes)
|
||||
.G_DLM_CHECKSUM_ADDR = 0x3F104, //0x3F104 ~ 0x3F107 (4 bytes)
|
||||
.R_ILM_CHECKSUM_ADDR = 0x3F120, //0x3F120 ~ 0x3F123 (4 bytes)
|
||||
.R_DLM_CHECKSUM_ADDR = 0x3F124, //0x3F124 ~ 0x3F127 (4 bytes)
|
||||
.BLD_CRC_EN_ADDR = 0x3F30E,
|
||||
.DMA_CRC_EN_ADDR = 0x3F132,
|
||||
.BLD_ILM_DLM_CRC_ADDR = 0x3F133,
|
||||
.DMA_CRC_FLAG_ADDR = 0x3F134,
|
||||
};
|
||||
|
||||
static const struct nvt_spi_mem_map NT36772_memory_map = {
|
||||
.EVENT_BUF_ADDR = 0x11E00,
|
||||
.RAW_PIPE0_ADDR = 0x10000,
|
||||
.RAW_PIPE1_ADDR = 0x12000,
|
||||
.BASELINE_ADDR = 0x10E70,
|
||||
.BASELINE_BTN_ADDR = 0x12E70,
|
||||
.DIFF_PIPE0_ADDR = 0x10830,
|
||||
.DIFF_PIPE1_ADDR = 0x12830,
|
||||
.RAW_BTN_PIPE0_ADDR = 0x10E60,
|
||||
.RAW_BTN_PIPE1_ADDR = 0x12E60,
|
||||
.DIFF_BTN_PIPE0_ADDR = 0x10E68,
|
||||
.DIFF_BTN_PIPE1_ADDR = 0x12E68,
|
||||
.READ_FLASH_CHECKSUM_ADDR = 0x14000,
|
||||
.RW_FLASH_DATA_ADDR = 0x14002,
|
||||
/* Phase 2 Host Download */
|
||||
.BOOT_RDY_ADDR = 0x1F141,
|
||||
.POR_CD_ADDR = 0x1F61C,
|
||||
/* BLD CRC */
|
||||
.R_ILM_CHECKSUM_ADDR = 0x1BF00,
|
||||
};
|
||||
|
||||
static const struct nvt_spi_mem_map NT36525_memory_map = {
|
||||
.EVENT_BUF_ADDR = 0x11A00,
|
||||
.RAW_PIPE0_ADDR = 0x10000,
|
||||
.RAW_PIPE1_ADDR = 0x12000,
|
||||
.BASELINE_ADDR = 0x10B08,
|
||||
.BASELINE_BTN_ADDR = 0x12B08,
|
||||
.DIFF_PIPE0_ADDR = 0x1064C,
|
||||
.DIFF_PIPE1_ADDR = 0x1264C,
|
||||
.RAW_BTN_PIPE0_ADDR = 0x10634,
|
||||
.RAW_BTN_PIPE1_ADDR = 0x12634,
|
||||
.DIFF_BTN_PIPE0_ADDR = 0x10AFC,
|
||||
.DIFF_BTN_PIPE1_ADDR = 0x12AFC,
|
||||
.READ_FLASH_CHECKSUM_ADDR = 0x14000,
|
||||
.RW_FLASH_DATA_ADDR = 0x14002,
|
||||
/* Phase 2 Host Download */
|
||||
.BOOT_RDY_ADDR = 0x1F141,
|
||||
.POR_CD_ADDR = 0x1F61C,
|
||||
/* BLD CRC */
|
||||
.R_ILM_CHECKSUM_ADDR = 0x1BF00,
|
||||
};
|
||||
|
||||
static const struct nvt_spi_mem_map NT36676F_memory_map = {
|
||||
.EVENT_BUF_ADDR = 0x11A00,
|
||||
.RAW_PIPE0_ADDR = 0x10000,
|
||||
.RAW_PIPE1_ADDR = 0x12000,
|
||||
.BASELINE_ADDR = 0x10B08,
|
||||
.BASELINE_BTN_ADDR = 0x12B08,
|
||||
.DIFF_PIPE0_ADDR = 0x1064C,
|
||||
.DIFF_PIPE1_ADDR = 0x1264C,
|
||||
.RAW_BTN_PIPE0_ADDR = 0x10634,
|
||||
.RAW_BTN_PIPE1_ADDR = 0x12634,
|
||||
.DIFF_BTN_PIPE0_ADDR = 0x10AFC,
|
||||
.DIFF_BTN_PIPE1_ADDR = 0x12AFC,
|
||||
.READ_FLASH_CHECKSUM_ADDR = 0x14000,
|
||||
.RW_FLASH_DATA_ADDR = 0x14002,
|
||||
};
|
||||
|
||||
static struct nvt_spi_hw_info NT36523_hw_info = {
|
||||
.hw_crc = 2,
|
||||
};
|
||||
|
||||
static struct nvt_spi_hw_info NT36526_hw_info = {
|
||||
.hw_crc = 2,
|
||||
};
|
||||
|
||||
static struct nvt_spi_hw_info NT36675_hw_info = {
|
||||
.hw_crc = 2,
|
||||
};
|
||||
|
||||
static struct nvt_spi_hw_info NT36672A_hw_info = {
|
||||
.hw_crc = 1,
|
||||
};
|
||||
|
||||
static struct nvt_spi_hw_info NT36772_hw_info = {
|
||||
.hw_crc = 0,
|
||||
};
|
||||
|
||||
static struct nvt_spi_hw_info NT36525_hw_info = {
|
||||
.hw_crc = 0,
|
||||
};
|
||||
|
||||
static struct nvt_spi_hw_info NT36676F_hw_info = {
|
||||
.hw_crc = 0,
|
||||
};
|
||||
|
||||
#define NVT_SPI_ID_BYTE_MAX 6
|
||||
struct nvt_spi_trim_id_table_t {
|
||||
uint8_t id[NVT_SPI_ID_BYTE_MAX];
|
||||
uint8_t mask[NVT_SPI_ID_BYTE_MAX];
|
||||
const struct nvt_spi_mem_map *mmap;
|
||||
const struct nvt_spi_hw_info *hwinfo;
|
||||
};
|
||||
|
||||
static const struct nvt_spi_trim_id_table_t nvt_spi_trim_id_table[] = {
|
||||
{.id = {0x0D, 0xFF, 0xFF, 0x72, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36675_memory_map, .hwinfo = &NT36675_hw_info},
|
||||
{.id = {0x20, 0xFF, 0xFF, 0x72, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36675_memory_map, .hwinfo = &NT36675_hw_info},
|
||||
{.id = {0x00, 0xFF, 0xFF, 0x80, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36675_memory_map, .hwinfo = &NT36675_hw_info},
|
||||
{.id = {0x0C, 0xFF, 0xFF, 0x25, 0x65, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0E, 0xFF, 0xFF, 0x72, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36675_memory_map, .hwinfo = &NT36675_hw_info},
|
||||
{.id = {0x20, 0xFF, 0xFF, 0x23, 0x65, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36523_memory_map, .hwinfo = &NT36523_hw_info},
|
||||
{.id = {0x0C, 0xFF, 0xFF, 0x23, 0x65, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36523_memory_map, .hwinfo = &NT36523_hw_info},
|
||||
{.id = {0x0B, 0xFF, 0xFF, 0x23, 0x65, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36523_memory_map, .hwinfo = &NT36523_hw_info},
|
||||
{.id = {0x0A, 0xFF, 0xFF, 0x23, 0x65, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36523_memory_map, .hwinfo = &NT36523_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x23, 0x65, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36523_memory_map, .hwinfo = &NT36523_hw_info},
|
||||
{.id = {0x0C, 0xFF, 0xFF, 0x72, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36675_memory_map, .hwinfo = &NT36675_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x26, 0x65, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36526_memory_map, .hwinfo = &NT36526_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x75, 0x66, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36675_memory_map, .hwinfo = &NT36675_hw_info},
|
||||
{.id = {0x0B, 0xFF, 0xFF, 0x72, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0B, 0xFF, 0xFF, 0x82, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0B, 0xFF, 0xFF, 0x25, 0x65, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0A, 0xFF, 0xFF, 0x72, 0x65, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0A, 0xFF, 0xFF, 0x72, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0A, 0xFF, 0xFF, 0x82, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0A, 0xFF, 0xFF, 0x70, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0B, 0xFF, 0xFF, 0x70, 0x66, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x0A, 0xFF, 0xFF, 0x72, 0x67, 0x03}, .mask = {1, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36672A_memory_map, .hwinfo = &NT36672A_hw_info},
|
||||
{.id = {0x55, 0x00, 0xFF, 0x00, 0x00, 0x00}, .mask = {1, 1, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0x55, 0x72, 0xFF, 0x00, 0x00, 0x00}, .mask = {1, 1, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0xAA, 0x00, 0xFF, 0x00, 0x00, 0x00}, .mask = {1, 1, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0xAA, 0x72, 0xFF, 0x00, 0x00, 0x00}, .mask = {1, 1, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x72, 0x67, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x70, 0x66, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x70, 0x67, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x72, 0x66, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36772_memory_map, .hwinfo = &NT36772_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x25, 0x65, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36525_memory_map, .hwinfo = &NT36525_hw_info},
|
||||
{.id = {0xFF, 0xFF, 0xFF, 0x76, 0x66, 0x03}, .mask = {0, 0, 0, 1, 1, 1},
|
||||
.mmap = &NT36676F_memory_map, .hwinfo = &NT36676F_hw_info}
|
||||
};
|
||||
|
||||
#endif
|
||||
1481
qcom/opensource/touch-drivers/nt36xxx/nt36xxx_mp_ctrlram.c
Normal file
1481
qcom/opensource/touch-drivers/nt36xxx/nt36xxx_mp_ctrlram.c
Normal file
File diff suppressed because it is too large
Load Diff
460
qcom/opensource/touch-drivers/nt36xxx/nt36xxx_mp_ctrlram.h
Normal file
460
qcom/opensource/touch-drivers/nt36xxx/nt36xxx_mp_ctrlram.h
Normal file
@@ -0,0 +1,460 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* Copyright (C) 2010 - 2018 Novatek, Inc.
|
||||
*
|
||||
* $Revision: 46179 $
|
||||
* $Date: 2019-06-14 13:47:17 +0800 (Fri, 14 Jun 2019) $
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*/
|
||||
|
||||
#if NVT_TOUCH_MP
|
||||
|
||||
static uint32_t IC_X_CFG_SIZE = 18;
|
||||
static uint32_t IC_Y_CFG_SIZE = 36;
|
||||
static uint32_t IC_KEY_CFG_SIZE = 4;
|
||||
static uint32_t X_Channel = 18;
|
||||
static uint32_t Y_Channel = 36;
|
||||
static uint32_t Key_Channel = TOUCH_KEY_NUM;
|
||||
static uint8_t AIN_X[40] =
|
||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17};
|
||||
static uint8_t AIN_Y[40] =
|
||||
{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
|
||||
18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35};
|
||||
|
||||
#if TOUCH_KEY_NUM > 0
|
||||
static uint8_t AIN_KEY[8] = {0, 1, 2, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
|
||||
#endif /* #if TOUCH_KEY_NUM > 0 */
|
||||
|
||||
static int32_t PS_Config_Lmt_Short_Rawdata_P[40 * 40] = {
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,14008,
|
||||
#if TOUCH_KEY_NUM > 0
|
||||
14008,14008,14008,
|
||||
#endif /* #if TOUCH_KEY_NUM > 0 */
|
||||
};
|
||||
|
||||
static int32_t PS_Config_Lmt_Short_Rawdata_N[40 * 40] = {
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,10000,
|
||||
#if TOUCH_KEY_NUM > 0
|
||||
10000,10000,10000,
|
||||
#endif /* #if TOUCH_KEY_NUM > 0 */
|
||||
};
|
||||
|
||||
static int32_t PS_Config_Lmt_Open_Rawdata_P[40 * 40] = {
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,5120,
|
||||
#if TOUCH_KEY_NUM > 0
|
||||
5120,5120,5120,
|
||||
#endif /* #if TOUCH_KEY_NUM > 0 */
|
||||
};
|
||||
|
||||
static int32_t PS_Config_Lmt_Open_Rawdata_N[40 * 40] = {
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,50,
|
||||
#if TOUCH_KEY_NUM > 0
|
||||
50,50,50,
|
||||
#endif /* #if TOUCH_KEY_NUM > 0 */
|
||||
};
|
||||
|
||||
static int32_t PS_Config_Lmt_FW_Rawdata_P[40 * 40] = {
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,2560,
|
||||
#if TOUCH_KEY_NUM > 0
|
||||
2560,2560,2560,
|
||||
#endif /* #if TOUCH_KEY_NUM > 0 */
|
||||
};
|
||||
|
||||
static int32_t PS_Config_Lmt_FW_Rawdata_N[40 * 40] = {
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,240,
|
||||
#if TOUCH_KEY_NUM > 0
|
||||
240,240,240,
|
||||
#endif /* #if TOUCH_KEY_NUM > 0 */
|
||||
};
|
||||
|
||||
static int32_t PS_Config_Lmt_FW_CC_P[40 * 40] = {
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,314,
|
||||
#if TOUCH_KEY_NUM > 0
|
||||
314,314,314,
|
||||
#endif /* #if TOUCH_KEY_NUM > 0 */
|
||||
};
|
||||
|
||||
static int32_t PS_Config_Lmt_FW_CC_N[40 * 40] = {
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
|
||||
#if TOUCH_KEY_NUM > 0
|
||||
0,0,0,
|
||||
#endif /* #if TOUCH_KEY_NUM > 0 */
|
||||
};
|
||||
|
||||
static int32_t PS_Config_Lmt_FW_Diff_P[40 * 40] = {
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,75,
|
||||
#if TOUCH_KEY_NUM > 0
|
||||
75,75,75,
|
||||
#endif /* #if TOUCH_KEY_NUM > 0 */
|
||||
};
|
||||
|
||||
static int32_t PS_Config_Lmt_FW_Diff_N[40 *40] = {
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,-75,
|
||||
#if TOUCH_KEY_NUM > 0
|
||||
-75,-75,-75,
|
||||
#endif /* #if TOUCH_KEY_NUM > 0 */
|
||||
};
|
||||
|
||||
static int32_t PS_Config_Diff_Test_Frame = 50;
|
||||
|
||||
#endif /* #if NVT_TOUCH_MP */
|
||||
8
qcom/opensource/touch-drivers/nt36xxx/nt36xxx_spi.c
Normal file
8
qcom/opensource/touch-drivers/nt36xxx/nt36xxx_spi.c
Normal file
@@ -0,0 +1,8 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
#define NVT_NT36XXX_SPI
|
||||
|
||||
#include "nt36xxx.c"
|
||||
@@ -0,0 +1,8 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
#define NVT_NT36XXX_SPI
|
||||
|
||||
#include "nt36xxx_ext_proc.c"
|
||||
@@ -0,0 +1,8 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
#define NVT_NT36XXX_SPI
|
||||
|
||||
#include "nt36xxx_fw_update.c"
|
||||
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