msm: camera: isp: Skip writing reset values to drop registers

Currently, we are writing reset values to frame/line/pxl drop
pattern and period registers at stream on, which is not required.
Also, this can overwrite any init config that user space might be
programming. Skip writing these registers in csid.

CRs-Fixed: 3144774
Change-Id: Iea253345467e12c068ab2c938ca8aadc591997ce
Signed-off-by: Mukund Madhusudan Atre <[email protected]>

drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_hw_ver2.c

@@ -2958,19 +2958,6 @@ static int cam_ife_csid_ver2_init_config_rdi_path(
 	CAM_DBG(CAM_ISP, "CSID:%u RDI:%u cfg1:0x%x",
 		csid_hw->hw_intf->hw_idx, res->res_id, cfg1);
 
-	/* set frame drop pattern to 0 and period to 1 */
-	cam_io_w_mb(1, mem_base + path_reg->frm_drop_period_addr);
-	cam_io_w_mb(0, mem_base + path_reg->frm_drop_pattern_addr);
-
-	/*TODO Need to check for any hw errata like 480 and 580*/
-	/* set pxl drop pattern to 0 and period to 1 */
-	cam_io_w_mb(0, mem_base + path_reg->pix_drop_pattern_addr);
-	cam_io_w_mb(1, mem_base + path_reg->pix_drop_period_addr);
-
-	/* set line drop pattern to 0 and period to 1 */
-	cam_io_w_mb(0, mem_base + path_reg->line_drop_pattern_addr);
-	cam_io_w_mb(1, mem_base + path_reg->line_drop_period_addr);
-
 	/* Enable the RDI path */
 	val = cam_io_r_mb(mem_base + path_reg->cfg0_addr);
 	val |= (1 << cmn_reg->path_en_shift_val);
@@ -3145,16 +3132,6 @@ static int cam_ife_csid_ver2_init_config_pxl_path(
 
 	cam_io_w_mb(cfg1, mem_base + path_reg->cfg1_addr);
 
-	/* set frame drop pattern to 0 and period to 1 */
-	cam_io_w_mb(1, mem_base + path_reg->frm_drop_period_addr);
-	cam_io_w_mb(0, mem_base + path_reg->frm_drop_pattern_addr);
-	/* set pxl drop pattern to 0 and period to 1 */
-	cam_io_w_mb(0, mem_base + path_reg->pix_drop_pattern_addr);
-	cam_io_w_mb(1, mem_base + path_reg->pix_drop_period_addr);
-	/* set line drop pattern to 0 and period to 1 */
-	cam_io_w_mb(0, mem_base + path_reg->line_drop_pattern_addr);
-	cam_io_w_mb(1, mem_base + path_reg->line_drop_period_addr);
-
 	/* Enable the Pxl path */
 	val = cam_io_r_mb(mem_base + path_reg->cfg0_addr);
 	val |= (1 << cmn_reg->path_en_shift_val);