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qcacmn: Add hal_rx_mpdu_get_addr1 API

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Implement hal_rx_mpdu_get_addr1 API
based on the chipset as the macro to
retrieve addr1 value is
chipset dependent.

Change-Id: I7ed88f2243d397c9d605a08d3b93e17f0004c63d
CRs-Fixed: 2522133
This commit is contained in:
Venkata Sharath Chandra Manchala
2019-09-21 13:59:46 -07:00
committed by nshrivas
parent 25ba7b8c4f
commit e3ae3193f9
15 changed files with 310 additions and 44 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
dp/wifi3.0/dp_rx.c
View File

@@ -629,7 +629,8 @@ QDF_STATUS dp_rx_filter_mesh_packets(struct dp_vdev *vdev, qdf_nbuf_t nbuf,
return QDF_STATUS_SUCCESS; return QDF_STATUS_SUCCESS;
if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) { if (vdev->mesh_rx_filter & MESH_FILTER_OUT_RA) {
if (hal_rx_mpdu_get_addr1(rx_tlv_hdr, if (hal_rx_mpdu_get_addr1(soc->hal_soc,
rx_tlv_hdr,
&mac_addr.raw[0])) &mac_addr.raw[0]))
return QDF_STATUS_E_FAILURE; return QDF_STATUS_E_FAILURE;

8
dp/wifi3.0/dp_rx_defrag.c
View File

@@ -942,8 +942,8 @@ dp_rx_defrag_nwifi_to_8023(struct dp_soc *soc,
switch (((fc & 0xff00) >> 8) & IEEE80211_FC1_DIR_MASK) { switch (((fc & 0xff00) >> 8) & IEEE80211_FC1_DIR_MASK) {
case IEEE80211_FC1_DIR_NODS: case IEEE80211_FC1_DIR_NODS:
hal_rx_mpdu_get_addr1(rx_desc_info, hal_rx_mpdu_get_addr1(soc->hal_soc, rx_desc_info,
&mac_addr.raw[0]); &mac_addr.raw[0]);
qdf_mem_copy(eth_hdr->dest_addr, &mac_addr.raw[0], qdf_mem_copy(eth_hdr->dest_addr, &mac_addr.raw[0],
QDF_MAC_ADDR_SIZE); QDF_MAC_ADDR_SIZE);
hal_rx_mpdu_get_addr2(rx_desc_info, hal_rx_mpdu_get_addr2(rx_desc_info,
@@ -962,8 +962,8 @@ dp_rx_defrag_nwifi_to_8023(struct dp_soc *soc,
QDF_MAC_ADDR_SIZE); QDF_MAC_ADDR_SIZE);
break; break;
case IEEE80211_FC1_DIR_FROMDS: case IEEE80211_FC1_DIR_FROMDS:
hal_rx_mpdu_get_addr1(rx_desc_info, hal_rx_mpdu_get_addr1(soc->hal_soc, rx_desc_info,
&mac_addr.raw[0]); &mac_addr.raw[0]);
qdf_mem_copy(eth_hdr->dest_addr, &mac_addr.raw[0], qdf_mem_copy(eth_hdr->dest_addr, &mac_addr.raw[0],
QDF_MAC_ADDR_SIZE); QDF_MAC_ADDR_SIZE);
hal_rx_mpdu_get_addr3(rx_desc_info, hal_rx_mpdu_get_addr3(rx_desc_info,

2
hal/wifi3.0/hal_internal.h
View File

@@ -396,6 +396,8 @@ struct hal_hw_txrx_ops {
uint32_t (*hal_rx_mpdu_get_to_ds)(uint8_t *buf); uint32_t (*hal_rx_mpdu_get_to_ds)(uint8_t *buf);
uint32_t (*hal_rx_mpdu_get_fr_ds)(uint8_t *buf); uint32_t (*hal_rx_mpdu_get_fr_ds)(uint8_t *buf);
uint8_t (*hal_rx_get_mpdu_frame_control_valid)(uint8_t *buf); uint8_t (*hal_rx_get_mpdu_frame_control_valid)(uint8_t *buf);
QDF_STATUS
(*hal_rx_mpdu_get_addr1)(uint8_t *buf, uint8_t *mac_addr);
}; };
/** /**

45
hal/wifi3.0/hal_rx.h
View File

@@ -1508,11 +1508,6 @@ hal_rx_mpdu_get_fr_ds(hal_soc_handle_t hal_soc_hdl, uint8_t *buf)
return hal_soc->ops->hal_rx_mpdu_get_fr_ds(buf); return hal_soc->ops->hal_rx_mpdu_get_fr_ds(buf);
} }
#define HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_OFFSET)), \
RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_MASK, \
RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_LSB))
#define HAL_RX_MPDU_MAC_ADDR_AD2_VALID_GET(_rx_mpdu_info) \ #define HAL_RX_MPDU_MAC_ADDR_AD2_VALID_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
@@ -1532,17 +1527,6 @@ hal_rx_mpdu_get_fr_ds(hal_soc_handle_t hal_soc_hdl, uint8_t *buf)
RX_MPDU_INFO_2_MAC_ADDR_AD4_VALID_MASK, \ RX_MPDU_INFO_2_MAC_ADDR_AD4_VALID_MASK, \
RX_MPDU_INFO_2_MAC_ADDR_AD4_VALID_LSB)) RX_MPDU_INFO_2_MAC_ADDR_AD4_VALID_LSB))
#define HAL_RX_MPDU_AD1_31_0_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_OFFSET)), \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_MASK, \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_LSB))
#define HAL_RX_MPDU_AD1_47_32_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_OFFSET)), \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_MASK, \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_LSB))
#define HAL_RX_MPDU_AD2_15_0_GET(_rx_mpdu_info) \ #define HAL_RX_MPDU_AD2_15_0_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
@@ -1582,36 +1566,19 @@ hal_rx_mpdu_get_fr_ds(hal_soc_handle_t hal_soc_hdl, uint8_t *buf)
/* /*
* hal_rx_mpdu_get_addr1(): API to check get address1 of the mpdu * hal_rx_mpdu_get_addr1(): API to check get address1 of the mpdu
* * @hal_soc_hdl: hal soc handle
* @buf: pointer to the start of RX PKT TLV headera * @buf: pointer to the start of RX PKT TLV headera
* @mac_addr: pointer to mac address * @mac_addr: pointer to mac address
*
* Return: success/failure * Return: success/failure
*/ */
static inline static inline
QDF_STATUS hal_rx_mpdu_get_addr1(uint8_t *buf, uint8_t *mac_addr) QDF_STATUS hal_rx_mpdu_get_addr1(hal_soc_handle_t hal_soc_hdl,
uint8_t *buf, uint8_t *mac_addr)
{ {
struct __attribute__((__packed__)) hal_addr1 { struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
uint32_t ad1_31_0;
uint16_t ad1_47_32;
};
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf; return hal_soc->ops->hal_rx_mpdu_get_addr1(buf, mac_addr);
struct rx_mpdu_start *mpdu_start =
&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr;
uint32_t mac_addr_ad1_valid;
mac_addr_ad1_valid = HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(mpdu_info);
if (mac_addr_ad1_valid) {
addr->ad1_31_0 = HAL_RX_MPDU_AD1_31_0_GET(mpdu_info);
addr->ad1_47_32 = HAL_RX_MPDU_AD1_47_32_GET(mpdu_info);
return QDF_STATUS_SUCCESS;
}
return QDF_STATUS_E_FAILURE;
} }
/* /*

34
hal/wifi3.0/qca6290/hal_6290.c
View File

@@ -393,6 +393,39 @@ static uint8_t hal_rx_get_mpdu_frame_control_valid_6290(uint8_t *buf)
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info); return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
} }
/*
* hal_rx_mpdu_get_addr1_6290(): API to check get address1 of the mpdu
*
* @buf: pointer to the start of RX PKT TLV headera
* @mac_addr: pointer to mac address
* Return: success/failure
*/
static QDF_STATUS hal_rx_mpdu_get_addr1_6290(uint8_t *buf, uint8_t *mac_addr)
{
struct __attribute__((__packed__)) hal_addr1 {
uint32_t ad1_31_0;
uint16_t ad1_47_32;
};
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_mpdu_start *mpdu_start =
&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr;
uint32_t mac_addr_ad1_valid;
mac_addr_ad1_valid = HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(mpdu_info);
if (mac_addr_ad1_valid) {
addr->ad1_31_0 = HAL_RX_MPDU_AD1_31_0_GET(mpdu_info);
addr->ad1_47_32 = HAL_RX_MPDU_AD1_47_32_GET(mpdu_info);
return QDF_STATUS_SUCCESS;
}
return QDF_STATUS_E_FAILURE;
}
struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
hal_srng_dst_hw_init_generic, hal_srng_dst_hw_init_generic,
@@ -450,6 +483,7 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
hal_rx_mpdu_get_to_ds_6290, hal_rx_mpdu_get_to_ds_6290,
hal_rx_mpdu_get_fr_ds_6290, hal_rx_mpdu_get_fr_ds_6290,
hal_rx_get_mpdu_frame_control_valid_6290, hal_rx_get_mpdu_frame_control_valid_6290,
hal_rx_mpdu_get_addr1_6290,
}; };
struct hal_hw_srng_config hw_srng_table_6290[] = { struct hal_hw_srng_config hw_srng_table_6290[] = {

18
hal/wifi3.0/qca6290/hal_6290_rx.h
View File

@@ -143,6 +143,24 @@
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \ RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB)) RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB))
#define HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_OFFSET)), \
RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_MASK, \
RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_LSB))
#define HAL_RX_MPDU_AD1_31_0_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_OFFSET)), \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_MASK, \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_LSB))
#define HAL_RX_MPDU_AD1_47_32_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_OFFSET)), \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_MASK, \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_LSB))
#if defined(QCA_WIFI_QCA6290_11AX) #if defined(QCA_WIFI_QCA6290_11AX)
#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\ #define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\ (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\

34
hal/wifi3.0/qca6390/hal_6390.c
View File

@@ -391,6 +391,39 @@ static uint8_t hal_rx_get_mpdu_frame_control_valid_6390(uint8_t *buf)
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info); return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
} }
/*
* hal_rx_mpdu_get_addr1_6390(): API to check get address1 of the mpdu
*
* @buf: pointer to the start of RX PKT TLV headera
* @mac_addr: pointer to mac address
* Return: success/failure
*/
static QDF_STATUS hal_rx_mpdu_get_addr1_6390(uint8_t *buf, uint8_t *mac_addr)
{
struct __attribute__((__packed__)) hal_addr1 {
uint32_t ad1_31_0;
uint16_t ad1_47_32;
};
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_mpdu_start *mpdu_start =
&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr;
uint32_t mac_addr_ad1_valid;
mac_addr_ad1_valid = HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(mpdu_info);
if (mac_addr_ad1_valid) {
addr->ad1_31_0 = HAL_RX_MPDU_AD1_31_0_GET(mpdu_info);
addr->ad1_47_32 = HAL_RX_MPDU_AD1_47_32_GET(mpdu_info);
return QDF_STATUS_SUCCESS;
}
return QDF_STATUS_E_FAILURE;
}
struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
hal_srng_dst_hw_init_generic, hal_srng_dst_hw_init_generic,
@@ -448,6 +481,7 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
hal_rx_mpdu_get_to_ds_6390, hal_rx_mpdu_get_to_ds_6390,
hal_rx_mpdu_get_fr_ds_6390, hal_rx_mpdu_get_fr_ds_6390,
hal_rx_get_mpdu_frame_control_valid_6390, hal_rx_get_mpdu_frame_control_valid_6390,
hal_rx_mpdu_get_addr1_6390,
}; };
struct hal_hw_srng_config hw_srng_table_6390[] = { struct hal_hw_srng_config hw_srng_table_6390[] = {

18
hal/wifi3.0/qca6390/hal_6390_rx.h
View File

@@ -143,6 +143,24 @@
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \ RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB)) RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB))
#define HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_OFFSET)), \
RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_MASK, \
RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_LSB))
#define HAL_RX_MPDU_AD1_31_0_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_OFFSET)), \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_MASK, \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_LSB))
#define HAL_RX_MPDU_AD1_47_32_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_OFFSET)), \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_MASK, \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_LSB))
#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\ #define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\ (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
RX_MSDU_START_5_MIMO_SS_BITMAP_OFFSET)), \ RX_MSDU_START_5_MIMO_SS_BITMAP_OFFSET)), \

33
hal/wifi3.0/qca6490/hal_6490.c
View File

@@ -298,6 +298,38 @@ static uint8_t hal_rx_get_mpdu_frame_control_valid_6490(uint8_t *buf)
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info); return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
} }
/*
* hal_rx_mpdu_get_addr1_6490(): API to check get address1 of the mpdu
*
* @buf: pointer to the start of RX PKT TLV headera
* @mac_addr: pointer to mac address
* Return: success/failure
*/
static QDF_STATUS hal_rx_mpdu_get_addr1_6490(uint8_t *buf, uint8_t *mac_addr)
{
struct __attribute__((__packed__)) hal_addr1 {
uint32_t ad1_31_0;
uint16_t ad1_47_32;
};
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_mpdu_start *mpdu_start =
&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr;
uint32_t mac_addr_ad1_valid;
mac_addr_ad1_valid = HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(mpdu_info);
if (mac_addr_ad1_valid) {
addr->ad1_31_0 = HAL_RX_MPDU_AD1_31_0_GET(mpdu_info);
addr->ad1_47_32 = HAL_RX_MPDU_AD1_47_32_GET(mpdu_info);
return QDF_STATUS_SUCCESS;
}
return QDF_STATUS_E_FAILURE;
}
struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
/* rx */ /* rx */
hal_rx_get_rx_fragment_number_6490, hal_rx_get_rx_fragment_number_6490,
@@ -315,4 +347,5 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
hal_rx_mpdu_get_to_ds_6490, hal_rx_mpdu_get_to_ds_6490,
hal_rx_mpdu_get_fr_ds_6490, hal_rx_mpdu_get_fr_ds_6490,
hal_rx_get_mpdu_frame_control_valid_6490, hal_rx_get_mpdu_frame_control_valid_6490,
hal_rx_mpdu_get_addr1_6490,
}; };

18
hal/wifi3.0/qca6490/hal_6490_rx.h
View File

@@ -123,3 +123,21 @@
RX_MPDU_INFO_11_MPDU_FRAME_CONTROL_VALID_OFFSET)), \ RX_MPDU_INFO_11_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
RX_MPDU_INFO_11_MPDU_FRAME_CONTROL_VALID_MASK, \ RX_MPDU_INFO_11_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_11_MPDU_FRAME_CONTROL_VALID_LSB)) RX_MPDU_INFO_11_MPDU_FRAME_CONTROL_VALID_LSB))
#define HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_11_MAC_ADDR_AD1_VALID_OFFSET)), \
RX_MPDU_INFO_11_MAC_ADDR_AD1_VALID_MASK, \
RX_MPDU_INFO_11_MAC_ADDR_AD1_VALID_LSB))
#define HAL_RX_MPDU_AD1_31_0_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_OFFSET)), \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_MASK, \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_LSB))
#define HAL_RX_MPDU_AD1_47_32_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_OFFSET)), \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_MASK, \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_LSB))

35
hal/wifi3.0/qca8074v1/hal_8074v1.c
View File

@@ -388,6 +388,40 @@ static uint8_t hal_rx_get_mpdu_frame_control_valid_8074v1(uint8_t *buf)
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info); return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
} }
/*
* hal_rx_mpdu_get_addr1_8074v1(): API to check get address1 of the mpdu
*
* @buf: pointer to the start of RX PKT TLV headera
* @mac_addr: pointer to mac address
* Return: success/failure
*/
static QDF_STATUS hal_rx_mpdu_get_addr1_8074v1(uint8_t *buf,
uint8_t *mac_addr)
{
struct __attribute__((__packed__)) hal_addr1 {
uint32_t ad1_31_0;
uint16_t ad1_47_32;
};
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_mpdu_start *mpdu_start =
&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr;
uint32_t mac_addr_ad1_valid;
mac_addr_ad1_valid = HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(mpdu_info);
if (mac_addr_ad1_valid) {
addr->ad1_31_0 = HAL_RX_MPDU_AD1_31_0_GET(mpdu_info);
addr->ad1_47_32 = HAL_RX_MPDU_AD1_47_32_GET(mpdu_info);
return QDF_STATUS_SUCCESS;
}
return QDF_STATUS_E_FAILURE;
}
struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
@@ -446,6 +480,7 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
hal_rx_mpdu_get_to_ds_8074v1, hal_rx_mpdu_get_to_ds_8074v1,
hal_rx_mpdu_get_fr_ds_8074v1, hal_rx_mpdu_get_fr_ds_8074v1,
hal_rx_get_mpdu_frame_control_valid_8074v1, hal_rx_get_mpdu_frame_control_valid_8074v1,
hal_rx_mpdu_get_addr1_8074v1,
}; };
struct hal_hw_srng_config hw_srng_table_8074[] = { struct hal_hw_srng_config hw_srng_table_8074[] = {

18
hal/wifi3.0/qca8074v1/hal_8074v1_rx.h
View File

@@ -131,6 +131,24 @@
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_OFFSET)), \ RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \ RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB)) RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB))
#define HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_OFFSET)), \
RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_MASK, \
RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_LSB))
#define HAL_RX_MPDU_AD1_31_0_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_OFFSET)), \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_MASK, \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_LSB))
#define HAL_RX_MPDU_AD1_47_32_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_OFFSET)), \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_MASK, \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_LSB))
/* /*
* hal_rx_msdu_start_nss_get_8074(): API to get the NSS * hal_rx_msdu_start_nss_get_8074(): API to get the NSS
* Interval from rx_msdu_start * Interval from rx_msdu_start

35
hal/wifi3.0/qca8074v2/hal_8074v2.c
View File

@@ -386,6 +386,40 @@ static uint8_t hal_rx_get_mpdu_frame_control_valid_8074v2(uint8_t *buf)
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info); return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
} }
/*
* hal_rx_mpdu_get_addr1_8074v2(): API to check get address1 of the mpdu
*
* @buf: pointer to the start of RX PKT TLV headera
* @mac_addr: pointer to mac address
* Return: success/failure
*/
static QDF_STATUS hal_rx_mpdu_get_addr1_8074v2(uint8_t *buf, uint8_t *mac_addr)
{
struct __attribute__((__packed__)) hal_addr1 {
uint32_t ad1_31_0;
uint16_t ad1_47_32;
};
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_mpdu_start *mpdu_start =
&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr;
uint32_t mac_addr_ad1_valid;
mac_addr_ad1_valid = HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(mpdu_info);
if (mac_addr_ad1_valid) {
addr->ad1_31_0 = HAL_RX_MPDU_AD1_31_0_GET(mpdu_info);
addr->ad1_47_32 = HAL_RX_MPDU_AD1_47_32_GET(mpdu_info);
return QDF_STATUS_SUCCESS;
}
return QDF_STATUS_E_FAILURE;
}
struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
@@ -444,6 +478,7 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
hal_rx_mpdu_get_to_ds_8074v2, hal_rx_mpdu_get_to_ds_8074v2,
hal_rx_mpdu_get_fr_ds_8074v2, hal_rx_mpdu_get_fr_ds_8074v2,
hal_rx_get_mpdu_frame_control_valid_8074v2, hal_rx_get_mpdu_frame_control_valid_8074v2,
hal_rx_mpdu_get_addr1_8074v2,
}; };
struct hal_hw_srng_config hw_srng_table_8074v2[] = { struct hal_hw_srng_config hw_srng_table_8074v2[] = {

18
hal/wifi3.0/qca8074v2/hal_8074v2_rx.h
View File

@@ -140,6 +140,24 @@
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_OFFSET)), \ RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_OFFSET)), \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \ RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_MASK, \
RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB)) RX_MPDU_INFO_2_MPDU_FRAME_CONTROL_VALID_LSB))
#define HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_OFFSET)), \
RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_MASK, \
RX_MPDU_INFO_2_MAC_ADDR_AD1_VALID_LSB))
#define HAL_RX_MPDU_AD1_31_0_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_OFFSET)), \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_MASK, \
RX_MPDU_INFO_15_MAC_ADDR_AD1_31_0_LSB))
#define HAL_RX_MPDU_AD1_47_32_GET(_rx_mpdu_info) \
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_OFFSET)), \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_MASK, \
RX_MPDU_INFO_16_MAC_ADDR_AD1_47_32_LSB))
/* /*
* hal_rx_msdu_start_nss_get_8074v2(): API to get the NSS * hal_rx_msdu_start_nss_get_8074v2(): API to get the NSS
* Interval from rx_msdu_start * Interval from rx_msdu_start

35
hal/wifi3.0/qcn9000/hal_9000.c
View File

@@ -396,6 +396,40 @@ static uint8_t hal_rx_get_mpdu_frame_control_valid_9000(uint8_t *buf)
return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info); return HAL_RX_MPDU_GET_FRAME_CONTROL_VALID(rx_mpdu_info);
} }
/*
* hal_rx_mpdu_get_addr1_9000(): API to check get address1 of the mpdu
*
* @buf: pointer to the start of RX PKT TLV headera
* @mac_addr: pointer to mac address
* Return: success/failure
*/
static QDF_STATUS hal_rx_mpdu_get_addr1_9000(uint8_t *buf,
uint8_t *mac_addr)
{
struct __attribute__((__packed__)) hal_addr1 {
uint32_t ad1_31_0;
uint16_t ad1_47_32;
};
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
struct rx_mpdu_start *mpdu_start =
&pkt_tlvs->mpdu_start_tlv.rx_mpdu_start;
struct rx_mpdu_info *mpdu_info = &mpdu_start->rx_mpdu_info_details;
struct hal_addr1 *addr = (struct hal_addr1 *)mac_addr;
uint32_t mac_addr_ad1_valid;
mac_addr_ad1_valid = HAL_RX_MPDU_MAC_ADDR_AD1_VALID_GET(mpdu_info);
if (mac_addr_ad1_valid) {
addr->ad1_31_0 = HAL_RX_MPDU_AD1_31_0_GET(mpdu_info);
addr->ad1_47_32 = HAL_RX_MPDU_AD1_47_32_GET(mpdu_info);
return QDF_STATUS_SUCCESS;
}
return QDF_STATUS_E_FAILURE;
}
struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = { struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
/* init and setup */ /* init and setup */
@@ -454,6 +488,7 @@ struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
hal_rx_mpdu_get_to_ds_9000, hal_rx_mpdu_get_to_ds_9000,
hal_rx_mpdu_get_fr_ds_9000, hal_rx_mpdu_get_fr_ds_9000,
hal_rx_get_mpdu_frame_control_valid_9000, hal_rx_get_mpdu_frame_control_valid_9000,
hal_rx_mpdu_get_addr1_9000,
}; };
struct hal_hw_srng_config hw_srng_table_9000[] = { struct hal_hw_srng_config hw_srng_table_9000[] = {