disp: msm: dp: set drm mode clock same as clock value from EDID

Commit Ie972a2e140adfd81c4e68df8e7bc69feaaca22e1 updated the dp
driver to extract the drm mode clock from timing parameters
instead of using the clock value provided by EDID to align the
behavior with DSI driver. But this results in incorrect clock
value if the refresh rate is not an integer value. For rates
such as 59.94 or 29.97, the calculated mode clock value would
be different from what is stipulated by EDID. This change
reverts the mode clock calculation to use the clock value
from EDID.

Change-Id: I3e192ef09d2456fbb1d22a0bf9474ac25ba86c72
Signed-off-by: Sandeep Gangadharaiah <[email protected]>

msm/dp/dp_drm.c

@@ -40,8 +40,7 @@ void convert_to_drm_mode(const struct dp_display_mode *dp_mode,
 			      dp_mode->timing.v_sync_width;
 	drm_mode->vtotal = drm_mode->vsync_end + dp_mode->timing.v_back_porch;
 
-	drm_mode->clock = drm_mode->htotal * drm_mode->vtotal * dp_mode->timing.refresh_rate;
-	drm_mode->clock /= 1000;
+	drm_mode->clock = dp_mode->timing.pixel_clk_khz;
 
 	if (dp_mode->timing.h_active_low)
 		flags |= DRM_MODE_FLAG_NHSYNC;