qcacmn: Force update HP/TP upon delayed register writes

Currently if HP/TP register updates are delayed due to delayed reg
write work not getting scheduled, although driver has processed
the ring completely, hardware would see HP/TP delta and fires an
interrupt based on interrupt threshold configuration until the
HP/TP updates reach the hardware.

When system is heavily stressed, this delay in HP/TP updates would
result in IRQ storm further stressing the system which is bad.
Force update HP/TP to the hardware under such scenarios to avoid
this problem.

Currently doing this just for CE DST SRNGs, this can be scaled to
other SRNGs on need.

Change-Id: I8a4938dbd4850d7ab6ae5183186237a5e37e1038
CRs-Fixed: 3749078
This commit is contained in:
Manikanta Pubbisetty
2024-03-04 08:19:02 +05:30
committed by Ravindra Konda
parent e454eb5052
commit e2e92aa7d6
4 changed files with 110 additions and 1 deletions

View File

@@ -877,6 +877,27 @@ static inline int hal_get_reg_write_pending_work(void *hal_soc)
}
#endif
#if defined(FEATURE_HAL_DELAYED_REG_WRITE) && defined(QCA_WIFI_QCA6750)
/**
* hal_srng_check_and_update_hptp() - Check and force update HP/TP
* to the hardware
* @hal_soc: HAL soc handle
* @srng: SRNG handle
* @update: Whether or not update is needed
*
* Returns: void
*/
void hal_srng_check_and_update_hptp(struct hal_soc *hal_soc,
struct hal_srng *srng,
bool update);
#else
static inline void
hal_srng_check_and_update_hptp(struct hal_soc *hal_soc, struct hal_srng *srng,
bool update)
{
}
#endif
/**
* hal_read_address_32_mb() - Read 32-bit value from the register
* @soc: soc handle