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ASoC: wcd938x: Update the soundwire clock rate based on the tx paths

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Update the soundwire clock rate based on the number of TX paths enable
to avoid noise issue.

Change-Id: I8c73bfd73751d4b79de30f3347081929501a877e
Signed-off-by: Sudheer Papothi <spapothi@codeaurora.org>
This commit is contained in:
Sudheer Papothi
2020-08-12 12:34:22 +05:30
parent 214f88cc12
commit e2abf6fc7a
1 changed files with 10 additions and 0 deletions
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10
asoc/codecs/wcd938x/wcd938x.c
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@@ -1606,6 +1606,11 @@ static int wcd938x_tx_swr_ctrl(struct snd_soc_dapm_widget *w,
} }
} }
rate = wcd938x_get_clk_rate(i); rate = wcd938x_get_clk_rate(i);
if (wcd938x->adc_count) {
rate = (wcd938x->adc_count * rate);
if (rate > SWR_CLK_RATE_9P6MHZ)
rate = SWR_CLK_RATE_9P6MHZ;
}
wcd938x_set_swr_clk_rate(component, rate, bank); wcd938x_set_swr_clk_rate(component, rate, bank);
} }
ret = swr_slvdev_datapath_control(wcd938x->tx_swr_dev, ret = swr_slvdev_datapath_control(wcd938x->tx_swr_dev,
@@ -1732,6 +1737,11 @@ static int wcd938x_codec_enable_adc(struct snd_soc_dapm_widget *w,
} }
} }
clk_rate = wcd938x_get_clk_rate(i); clk_rate = wcd938x_get_clk_rate(i);
/* clk_rate depends on number of paths getting enabled */
clk_rate = (wcd938x->adc_count * clk_rate);
if (clk_rate > SWR_CLK_RATE_9P6MHZ)
clk_rate = SWR_CLK_RATE_9P6MHZ;
wcd938x_set_swr_clk_rate(component, clk_rate, bank); wcd938x_set_swr_clk_rate(component, clk_rate, bank);
ret = swr_slvdev_datapath_control(wcd938x->tx_swr_dev, ret = swr_slvdev_datapath_control(wcd938x->tx_swr_dev,
wcd938x->tx_swr_dev->dev_num, wcd938x->tx_swr_dev->dev_num,