disp: msm: sde: Add support to limit DSC size to 10k

With full DSC size of 20k, RT performance issues are seen due to the
stress created during larger prefill needed to fill up the 20k DSC buffer.

Limiting DSC size to 10k helps to mitigate these RT performace issues.

This change adds support for this based on new flag has_reduced_ob_max
in sde_mdss_cfg data structure. Flag has_reduced_ob_max has be set
true only on targets where its recommended.

Change-Id: I649d213bcd378025bd0548fb982b55c98c99224f
Signed-off-by: Ritesh Kumar <quic_riteshk@quicinc.com>

msm/sde/sde_hw_catalog.c

@@ -1,6 +1,7 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2015-2022, The Linux Foundation. All rights reserved.
  */
 
 #define pr_fmt(fmt)	"[drm:%s:%d] " fmt, __func__, __LINE__
@@ -3271,7 +3272,8 @@ static int sde_dsc_parse_dt(struct device_node *np,
 			if (PROP_VALUE_ACCESS(prop_value, DSC_422, i))
 					set_bit(SDE_DSC_NATIVE_422_EN,
 						&dsc->features);
-
+			if (sde_cfg->has_reduced_ob_max)
+				set_bit(SDE_DSC_REDUCED_OB_MAX, &dsc->features);
 		} else {
 			set_bit(SDE_DSC_HW_REV_1_1, &dsc->features);
 		}
@@ -5148,6 +5150,7 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)
 		sde_cfg->has_cwb_crop = true;
 		sde_cfg->has_qsync = true;
 		sde_cfg->perf.min_prefill_lines = 40;
+		sde_cfg->has_reduced_ob_max = true;
 		sde_cfg->vbif_qos_nlvl = 8;
 		sde_cfg->ts_prefill_rev = 2;
 		sde_cfg->ctl_rev = SDE_CTL_CFG_VERSION_1_0_0;