Merge "disp: msm: sde: Add support for LTM2/3 for kailua"

include/uapi/display/drm/msm_drm_pp.h

@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
 /*
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  */
 
@@ -480,7 +481,7 @@ struct drm_msm_ad4_roi_cfg {
 #define LTM_DATA_SIZE_3 33
 #define LTM_BUFFER_SIZE 5
 #define LTM_GUARD_BYTES 255
-#define LTM_BLOCK_SIZE 2
+#define LTM_BLOCK_SIZE 4
 
 #define LTM_STATS_SAT (1 << 1)
 #define LTM_STATS_MERGE_SAT (1 << 2)

msm/sde/sde_color_processing.c

@@ -4377,6 +4377,8 @@ static void _sde_cp_ltm_hist_interrupt_cb(void *arg, int irq_idx)
 	ltm_data->display_v = hw_cfg.displayv;
 	ltm_data->init_h[0] = phase.init_h[LTM_0];
 	ltm_data->init_h[1] = phase.init_h[LTM_1];
+	ltm_data->init_h[2] = phase.init_h[LTM_2];
+	ltm_data->init_h[3] = phase.init_h[LTM_3];
 	ltm_data->init_v = phase.init_v;
 	ltm_data->inc_v = phase.inc_v;
 	ltm_data->inc_h = phase.inc_h;

msm/sde/sde_hw_color_proc_common_v4.h

@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  * Copyright (c) 2017-2019, 2021 The Linux Foundation. All rights reserved.
  */
 #ifndef _SDE_HW_COLOR_PROC_COMMON_V4_H_
@@ -182,12 +183,17 @@ static inline void sde_ltm_get_phase_info(struct sde_hw_cp_cfg *hw_cfg,
 
 	info->init_h[LTM_0] = (1 << 23);
 	info->init_h[LTM_1] = (1 << 23);
+	info->init_h[LTM_2] = (1 << 23);
+	info->init_h[LTM_3] = (1 << 23);
 	info->init_v = (1 << 23);
 	info->inc_h = ((count_h - 1) << 24) / (hw_cfg->displayh - 1);
 	info->inc_v = ((count_v - 1) << 24) / (hw_cfg->displayv - 1);
-	if (info->merge_en)
+	if (info->merge_en) {
 		info->init_h[LTM_1] = info->init_h[LTM_0] +
 			info->inc_h * (hw_cfg->displayh / 2);
+		info->init_h[LTM_3] = info->init_h[LTM_2] +
+			info->inc_h * (hw_cfg->displayh / 2);
+	}
 }
 
 #endif /* _SDE_HW_COLOR_PROC_COMMON_V4_H_ */

msm/sde/sde_hw_reg_dma_v1.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  */
 
@@ -43,7 +43,7 @@
 #define GRP_VIG_HW_BLK_SELECT (VIG0 | VIG1 | VIG2 | VIG3)
 #define GRP_DMA_HW_BLK_SELECT (DMA0 | DMA1 | DMA2 | DMA3 | DMA4 | DMA5)
 #define GRP_DSPP_HW_BLK_SELECT (DSPP0 | DSPP1 | DSPP2 | DSPP3)
-#define GRP_LTM_HW_BLK_SELECT (LTM0 | LTM1)
+#define GRP_LTM_HW_BLK_SELECT (LTM0 | LTM1 | LTM2 | LTM3)
 #define GRP_MDSS_HW_BLK_SELECT (MDSS)
 #define BUFFER_SPACE_LEFT(cfg) ((cfg)->dma_buf->buffer_size - \
 			(cfg)->dma_buf->index)
@@ -241,6 +241,12 @@ static void get_decode_sel(unsigned long blk, u32 *decode_sel)
 		case LTM1:
 			*decode_sel |= BIT(23);
 			break;
+		case LTM2:
+			*decode_sel |= BIT(24);
+			break;
+		case LTM3:
+			*decode_sel |= BIT(25);
+			break;
 		case MDSS:
 			*decode_sel |= BIT(31);
 			break;

msm/sde/sde_hw_reg_dma_v1_color_proc.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  */
 
@@ -217,6 +217,8 @@ static u32 sspp_mapping[SSPP_MAX] = {
 static u32 ltm_mapping[LTM_MAX] = {
 	[LTM_0] = LTM0,
 	[LTM_1] = LTM1,
+	[LTM_2] = LTM2,
+	[LTM_3] = LTM3,
 };
 
 #define REG_DMA_INIT_OPS(cfg, block, reg_dma_feature, feature_dma_buf) \

msm/sde/sde_reg_dma.h

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
  * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  */
 
@@ -212,6 +212,8 @@ enum sde_reg_dma_blk {
 	LTM1 = BIT(19),
 	DMA4  = BIT(20),
 	DMA5  = BIT(21),
+	LTM2 = BIT(22),
+	LTM3 = BIT(23),
 	MDSS  = BIT(31)
 };