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Merge "msm: eva: Update QoS, SMMU debug register offsets"

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This commit is contained in:
qctecmdr
2023-02-01 17:33:22 -08:00
committato da Gerrit - the friendly Code Review server
parent a9db98a35d 26bf3dba95
commit e185d602d4
2 ha cambiato i file con 62 aggiunte e 37 eliminazioni
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20
msm/eva/cvp_hfi.c
Vedi File

@@ -794,15 +794,25 @@ static void __set_registers(struct iris_hfi_device *device)
__write_register(device, CVP_CPU_CS_AXI4_QOS,
pdata->noc_qos->axi_qos);
__write_register(device, CVP_NOC_PRIORITYLUT_LOW,
__write_register(device, CVP_NOC_RGE_PRIORITYLUT_LOW,
pdata->noc_qos->prioritylut_low);
__write_register(device, CVP_NOC_PRIORITYLUT_HIGH,
__write_register(device, CVP_NOC_RGE_PRIORITYLUT_HIGH,
pdata->noc_qos->prioritylut_high);
__write_register(device, CVP_NOC_URGENCY_LOW,
__write_register(device, CVP_NOC_RGE_URGENCY_LOW,
pdata->noc_qos->urgency_low);
__write_register(device, CVP_NOC_DANGERLUT_LOW,
__write_register(device, CVP_NOC_RGE_DANGERLUT_LOW,
pdata->noc_qos->dangerlut_low);
__write_register(device, CVP_NOC_SAFELUT_LOW,
__write_register(device, CVP_NOC_RGE_SAFELUT_LOW,
pdata->noc_qos->safelut_low);
__write_register(device, CVP_NOC_CDM_PRIORITYLUT_LOW,
pdata->noc_qos->prioritylut_low);
__write_register(device, CVP_NOC_CDM_PRIORITYLUT_HIGH,
pdata->noc_qos->prioritylut_high);
__write_register(device, CVP_NOC_CDM_URGENCY_LOW,
pdata->noc_qos->urgency_low);
__write_register(device, CVP_NOC_CDM_DANGERLUT_LOW,
pdata->noc_qos->dangerlut_low);
__write_register(device, CVP_NOC_CDM_SAFELUT_LOW,
pdata->noc_qos->safelut_low);
}

79
msm/eva/cvp_hfi_io.h
Vedi File

@@ -179,21 +179,20 @@
* --------------------------------------------------------------------------
*/
#define CVP_NOC_BASE_OFFS 0x000D0000
#define CVP_NOC_ERR_SWID_LOW_OFFS (CVP_NOC_BASE_OFFS + 0x80)
#define CVP_NOC_ERR_SWID_HIGH_OFFS (CVP_NOC_BASE_OFFS + 0x84)
#define CVP_NOC_ERR_MAINCTL_LOW_OFFS (CVP_NOC_BASE_OFFS + 0x88)
#define CVP_NOC_ERR_ERRVLD_LOW_OFFS (CVP_NOC_BASE_OFFS + 0x90)
#define CVP_NOC_ERR_ERRCLR_LOW_OFFS (CVP_NOC_BASE_OFFS + 0x98)
#define CVP_NOC_ERR_ERRLOG0_LOW_OFFS (CVP_NOC_BASE_OFFS + 0xA0)
#define CVP_NOC_ERR_ERRLOG0_HIGH_OFFS (CVP_NOC_BASE_OFFS + 0xA4)
#define CVP_NOC_ERR_ERRLOG1_LOW_OFFS (CVP_NOC_BASE_OFFS + 0xA8)
#define CVP_NOC_ERR_ERRLOG1_HIGH_OFFS (CVP_NOC_BASE_OFFS + 0xAC)
#define CVP_NOC_ERR_ERRLOG2_LOW_OFFS (CVP_NOC_BASE_OFFS + 0xB0)
#define CVP_NOC_ERR_ERRLOG2_HIGH_OFFS (CVP_NOC_BASE_OFFS + 0xB4)
#define CVP_NOC_ERR_ERRLOG3_LOW_OFFS (CVP_NOC_BASE_OFFS + 0xB8)
#define CVP_NOC_ERR_ERRLOG3_HIGH_OFFS (CVP_NOC_BASE_OFFS + 0xBC)
#define CVP_NOC_ERR_SWID_LOW_OFFS (CVP_NOC_BASE_OFFS + 0x0)
#define CVP_NOC_ERR_SWID_HIGH_OFFS (CVP_NOC_BASE_OFFS + 0x4)
#define CVP_NOC_ERR_MAINCTL_LOW_OFFS (CVP_NOC_BASE_OFFS + 0x8)
#define CVP_NOC_ERR_ERRVLD_LOW_OFFS (CVP_NOC_BASE_OFFS + 0x10)
#define CVP_NOC_ERR_ERRCLR_LOW_OFFS (CVP_NOC_BASE_OFFS + 0x18)
#define CVP_NOC_ERR_ERRLOG0_LOW_OFFS (CVP_NOC_BASE_OFFS + 0x20)
#define CVP_NOC_ERR_ERRLOG0_HIGH_OFFS (CVP_NOC_BASE_OFFS + 0x24)
#define CVP_NOC_ERR_ERRLOG1_LOW_OFFS (CVP_NOC_BASE_OFFS + 0x28)
#define CVP_NOC_ERR_ERRLOG1_HIGH_OFFS (CVP_NOC_BASE_OFFS + 0x2C)
#define CVP_NOC_ERR_ERRLOG2_LOW_OFFS (CVP_NOC_BASE_OFFS + 0x30)
#define CVP_NOC_ERR_ERRLOG2_HIGH_OFFS (CVP_NOC_BASE_OFFS + 0x34)
#define CVP_NOC_ERR_ERRLOG3_LOW_OFFS (CVP_NOC_BASE_OFFS + 0x38)
#define CVP_NOC_ERR_ERRLOG3_HIGH_OFFS (CVP_NOC_BASE_OFFS + 0x3C)
#define CVP_NOC_SBM_SENSELN0_LOW (CVP_NOC_BASE_OFFS + 0x300)
#define CVP_NOC_CPU_PENDING_MASK 0x3F80000
#define CVP_NOC_CORE_BASE_OFFS 0x00010000
#define CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN0_LOW \
@@ -203,43 +202,59 @@
#define CVP_NOC_MAIN_SIDEBANDMANAGER_SENSELN1_HIGH \
(CVP_NOC_CORE_BASE_OFFS + 0x710C)
#define CVP_NOC_CORE_ERR_SWID_LOW_OFFS \
(CVP_NOC_CORE_BASE_OFFS + 0x1200)
(CVP_NOC_CORE_BASE_OFFS + 0xA000)
#define CVP_NOC_CORE_ERR_SWID_HIGH_OFFS \
(CVP_NOC_CORE_BASE_OFFS + 0x1204)
(CVP_NOC_CORE_BASE_OFFS + 0xA004)
#define CVP_NOC_CORE_ERR_MAINCTL_LOW_OFFS \
(CVP_NOC_CORE_BASE_OFFS + 0x1208)
(CVP_NOC_CORE_BASE_OFFS + 0xA008)
#define CVP_NOC_CORE_ERR_ERRVLD_LOW_OFFS \
(CVP_NOC_CORE_BASE_OFFS + 0x1210)
(CVP_NOC_CORE_BASE_OFFS + 0xA010)
#define CVP_NOC_CORE_ERR_ERRCLR_LOW_OFFS \
(CVP_NOC_CORE_BASE_OFFS + 0x1218)
(CVP_NOC_CORE_BASE_OFFS + 0xA018)
#define CVP_NOC_CORE_ERR_ERRLOG0_LOW_OFFS \
(CVP_NOC_CORE_BASE_OFFS + 0x1220)
(CVP_NOC_CORE_BASE_OFFS + 0xA020)
#define CVP_NOC_CORE_ERR_ERRLOG0_HIGH_OFFS \
(CVP_NOC_CORE_BASE_OFFS + 0x1224)
(CVP_NOC_CORE_BASE_OFFS + 0xA024)
#define CVP_NOC_CORE_ERR_ERRLOG1_LOW_OFFS \
(CVP_NOC_CORE_BASE_OFFS + 0x1228)
(CVP_NOC_CORE_BASE_OFFS + 0xA028)
#define CVP_NOC_CORE_ERR_ERRLOG1_HIGH_OFFS \
(CVP_NOC_CORE_BASE_OFFS + 0x122C)
(CVP_NOC_CORE_BASE_OFFS + 0xA02C)
#define CVP_NOC_CORE_ERR_ERRLOG2_LOW_OFFS \
(CVP_NOC_CORE_BASE_OFFS + 0x1230)
(CVP_NOC_CORE_BASE_OFFS + 0xA030)
#define CVP_NOC_CORE_ERR_ERRLOG2_HIGH_OFFS \
(CVP_NOC_CORE_BASE_OFFS + 0x1234)
(CVP_NOC_CORE_BASE_OFFS + 0xA034)
#define CVP_NOC_CORE_ERR_ERRLOG3_LOW_OFFS \
(CVP_NOC_CORE_BASE_OFFS + 0x1238)
(CVP_NOC_CORE_BASE_OFFS + 0xA038)
#define CVP_NOC_CORE_ERR_ERRLOG3_HIGH_OFFS \
(CVP_NOC_CORE_BASE_OFFS + 0x123C)
(CVP_NOC_CORE_BASE_OFFS + 0xA03C)
#define CVP_NOC_RCG_VNOC_NOC_CLK_FORCECLOCKON_LOW \
(CVP_NOC_CORE_BASE_OFFS + 0x2018)
#define CVP_NOC_PRIORITYLUT_LOW \
/* NoC QoS registers */
#define CVP_NOC_RGE_PRIORITYLUT_LOW \
(CVP_NOC_CORE_BASE_OFFS + 0x3030)
#define CVP_NOC_PRIORITYLUT_HIGH \
#define CVP_NOC_RGE_PRIORITYLUT_HIGH \
(CVP_NOC_CORE_BASE_OFFS + 0x3034)
#define CVP_NOC_URGENCY_LOW \
#define CVP_NOC_RGE_URGENCY_LOW \
(CVP_NOC_CORE_BASE_OFFS + 0x3038)
#define CVP_NOC_DANGERLUT_LOW \
#define CVP_NOC_RGE_DANGERLUT_LOW \
(CVP_NOC_CORE_BASE_OFFS + 0x3040)
#define CVP_NOC_SAFELUT_LOW \
#define CVP_NOC_RGE_SAFELUT_LOW \
(CVP_NOC_CORE_BASE_OFFS + 0x3048)
#define CVP_NOC_CDM_PRIORITYLUT_LOW \
(CVP_NOC_CORE_BASE_OFFS + 0x3830)
#define CVP_NOC_CDM_PRIORITYLUT_HIGH \
(CVP_NOC_CORE_BASE_OFFS + 0x3834)
#define CVP_NOC_CDM_URGENCY_LOW \
(CVP_NOC_CORE_BASE_OFFS + 0x3838)
#define CVP_NOC_CDM_DANGERLUT_LOW \
(CVP_NOC_CORE_BASE_OFFS + 0x3840)
#define CVP_NOC_CDM_SAFELUT_LOW \
(CVP_NOC_CORE_BASE_OFFS + 0x3848)
/* End of NoC Qos */
#define CVP_NOC_RCGCONTROLLER_MAINCTL_LOW \
(CVP_NOC_CORE_BASE_OFFS + 0xC008)
#define CVP_NOC_RCGCONTROLLER_HYSTERESIS_LOW \