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Merge "wcd939x: update register defaults for wcd939x codec"

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This commit is contained in:
qctecmdr
2023-04-30 06:09:45 -07:00
committed by Gerrit - the friendly Code Review server
parent b8506aa704 eb6008aebf
commit e1715432ea
2 changed files with 9 additions and 7 deletions
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12
asoc/codecs/wcd939x/wcd939x-regmap.c
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@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only // SPDX-License-Identifier: GPL-2.0-only
/* /*
* Copyright (c) 2018-2019, 2021, The Linux Foundation. All rights reserved. * Copyright (c) 2018-2019, 2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#include <linux/regmap.h> #include <linux/regmap.h>
@@ -63,12 +63,12 @@ static struct reg_default wcd939x_defaults[] = {
{WCD939X_MICB2_TEST_CTL_1, 0x1a}, {WCD939X_MICB2_TEST_CTL_1, 0x1a},
{WCD939X_MICB2_TEST_CTL_2, 0x00}, {WCD939X_MICB2_TEST_CTL_2, 0x00},
{WCD939X_MICB2_TEST_CTL_3, 0x24}, {WCD939X_MICB2_TEST_CTL_3, 0x24},
{WCD939X_MICB3_TEST_CTL_1, 0x1a}, {WCD939X_MICB3_TEST_CTL_1, 0x9a},
{WCD939X_MICB3_TEST_CTL_2, 0x00}, {WCD939X_MICB3_TEST_CTL_2, 0x80},
{WCD939X_MICB3_TEST_CTL_3, 0xa4}, {WCD939X_MICB3_TEST_CTL_3, 0x24},
{WCD939X_MICB4_TEST_CTL_1, 0x1a}, {WCD939X_MICB4_TEST_CTL_1, 0x1a},
{WCD939X_MICB4_TEST_CTL_2, 0x00}, {WCD939X_MICB4_TEST_CTL_2, 0x80},
{WCD939X_MICB4_TEST_CTL_3, 0xa4}, {WCD939X_MICB4_TEST_CTL_3, 0x24},
{WCD939X_ADC_VCM, 0x39}, {WCD939X_ADC_VCM, 0x39},
{WCD939X_BIAS_ATEST, 0xe0}, {WCD939X_BIAS_ATEST, 0xe0},
{WCD939X_SPARE1, 0x00}, {WCD939X_SPARE1, 0x00},

4
asoc/codecs/wcd939x/wcd939x.c
View File

@@ -381,6 +381,7 @@ static int wcd939x_set_swr_clk_rate(struct snd_soc_component *component,
static int wcd939x_init_reg(struct snd_soc_component *component) static int wcd939x_init_reg(struct snd_soc_component *component)
{ {
struct wcd939x_priv *wcd939x = snd_soc_component_get_drvdata(component);
snd_soc_component_update_bits(component, snd_soc_component_update_bits(component,
REG_FIELD_VALUE(BIAS, ANALOG_BIAS_EN, 0x01)); REG_FIELD_VALUE(BIAS, ANALOG_BIAS_EN, 0x01));
@@ -437,7 +438,8 @@ static int wcd939x_init_reg(struct snd_soc_component *component)
snd_soc_component_update_bits(component, snd_soc_component_update_bits(component,
REG_FIELD_VALUE(HPH_OCP_CTL, SCD_OP_EN, 0x01)); REG_FIELD_VALUE(HPH_OCP_CTL, SCD_OP_EN, 0x01));
snd_soc_component_write(component, WCD939X_CFG0, 0x05); if (wcd939x->version != WCD939X_VERSION_2_0)
snd_soc_component_write(component, WCD939X_CFG0, 0x05);
return 0; return 0;
} }