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@@ -0,0 +1,538 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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+/*
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+ * Copyright (c) 2019, The Linux Foundation. All rights reserved.
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+ */
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+
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+#ifndef _CPASTOP_V170_200_H_
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+#define _CPASTOP_V170_200_H_
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+
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+#define TEST_IRQ_ENABLE 0
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+#define TCSR_CONN_RESET 0x0
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+#define TCSR_CONN_SET 0x3
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+
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+static struct cam_camnoc_irq_sbm cam_cpas_v170_200_irq_sbm = {
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+ .sbm_enable = {
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .enable = true,
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+ .offset = 0x2040, /* SBM_FAULTINEN0_LOW */
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+ .value = 0x1 | /* SBM_FAULTINEN0_LOW_PORT0_MASK*/
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+ 0x2 | /* SBM_FAULTINEN0_LOW_PORT1_MASK */
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+ 0x4 | /* SBM_FAULTINEN0_LOW_PORT2_MASK */
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+ 0x8 | /* SBM_FAULTINEN0_LOW_PORT3_MASK */
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+ 0x10 | /* SBM_FAULTINEN0_LOW_PORT4_MASK */
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+ 0x20 | /* SBM_FAULTINEN0_LOW_PORT5_MASK */
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+ (TEST_IRQ_ENABLE ?
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+ 0x100 : /* SBM_FAULTINEN0_LOW_PORT8_MASK */
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+ 0x0),
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+ },
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+ .sbm_status = {
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+ .access_type = CAM_REG_TYPE_READ,
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+ .enable = true,
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+ .offset = 0x2048, /* SBM_FAULTINSTATUS0_LOW */
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+ },
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+ .sbm_clear = {
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+ .access_type = CAM_REG_TYPE_WRITE,
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+ .enable = true,
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+ .offset = 0x2080, /* SBM_FLAGOUTCLR0_LOW */
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+ .value = TEST_IRQ_ENABLE ? 0x6 : 0x2,
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+ }
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+};
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+
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+static struct cam_camnoc_irq_err
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+ cam_cpas_v170_200_irq_err[] = {
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+ {
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+ .irq_type = CAM_CAMNOC_HW_IRQ_SLAVE_ERROR,
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+ .enable = true,
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+ .sbm_port = 0x1, /* SBM_FAULTINSTATUS0_LOW_PORT0_MASK */
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+ .err_enable = {
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .enable = true,
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+ .offset = 0x2708, /* ERRLOGGER_MAINCTL_LOW */
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+ .value = 1,
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+ },
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+ .err_status = {
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+ .access_type = CAM_REG_TYPE_READ,
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+ .enable = true,
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+ .offset = 0x2710, /* ERRLOGGER_ERRVLD_LOW */
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+ },
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+ .err_clear = {
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+ .access_type = CAM_REG_TYPE_WRITE,
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+ .enable = true,
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+ .offset = 0x2718, /* ERRLOGGER_ERRCLR_LOW */
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+ .value = 1,
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+ },
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+ },
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+ {
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+ .irq_type = CAM_CAMNOC_HW_IRQ_IFE02_UBWC_ENCODE_ERROR,
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+ .enable = true,
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+ .sbm_port = 0x2, /* SBM_FAULTINSTATUS0_LOW_PORT1_MASK */
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+ .err_enable = {
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .enable = true,
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+ .offset = 0x5a0, /* SPECIFIC_IFE02_ENCERREN_LOW */
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+ .value = 1,
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+ },
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+ .err_status = {
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+ .access_type = CAM_REG_TYPE_READ,
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+ .enable = true,
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+ .offset = 0x590, /* SPECIFIC_IFE02_ENCERRSTATUS_LOW */
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+ },
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+ .err_clear = {
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+ .access_type = CAM_REG_TYPE_WRITE,
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+ .enable = true,
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+ .offset = 0x598, /* SPECIFIC_IFE02_ENCERRCLR_LOW */
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+ .value = 1,
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+ },
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+ },
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+ {
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+ .irq_type = CAM_CAMNOC_HW_IRQ_IFE13_UBWC_ENCODE_ERROR,
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+ .enable = true,
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+ .sbm_port = 0x4, /* SBM_FAULTINSTATUS0_LOW_PORT2_MASK */
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+ .err_enable = {
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .enable = true,
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+ .offset = 0x9a0, /* SPECIFIC_IFE13_ENCERREN_LOW */
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+ .value = 1,
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+ },
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+ .err_status = {
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+ .access_type = CAM_REG_TYPE_READ,
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+ .enable = true,
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+ .offset = 0x990, /* SPECIFIC_IFE13_ENCERRSTATUS_LOW */
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+ },
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+ .err_clear = {
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+ .access_type = CAM_REG_TYPE_WRITE,
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+ .enable = true,
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+ .offset = 0x998, /* SPECIFIC_IFE13_ENCERRCLR_LOW */
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+ .value = 1,
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+ },
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+ },
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+ {
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+ .irq_type = CAM_CAMNOC_HW_IRQ_IPE_BPS_UBWC_DECODE_ERROR,
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+ .enable = true,
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+ .sbm_port = 0x8, /* SBM_FAULTINSTATUS0_LOW_PORT3_MASK */
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+ .err_enable = {
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .enable = true,
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+ .offset = 0xd20, /* SPECIFIC_IBL_RD_DECERREN_LOW */
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+ .value = 1,
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+ },
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+ .err_status = {
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+ .access_type = CAM_REG_TYPE_READ,
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+ .enable = true,
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+ .offset = 0xd10, /* SPECIFIC_IBL_RD_DECERRSTATUS_LOW */
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+ },
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+ .err_clear = {
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+ .access_type = CAM_REG_TYPE_WRITE,
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+ .enable = true,
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+ .offset = 0xd18, /* SPECIFIC_IBL_RD_DECERRCLR_LOW */
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+ .value = 1,
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+ },
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+ },
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+ {
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+ .irq_type = CAM_CAMNOC_HW_IRQ_IPE_BPS_UBWC_ENCODE_ERROR,
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+ .enable = true,
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+ .sbm_port = 0x10, /* SBM_FAULTINSTATUS0_LOW_PORT4_MASK */
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+ .err_enable = {
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .enable = true,
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+ .offset = 0x11a0, /* SPECIFIC_IBL_WR_ENCERREN_LOW */
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+ .value = 1,
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+ },
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+ .err_status = {
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+ .access_type = CAM_REG_TYPE_READ,
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+ .enable = true,
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+ .offset = 0x1190,
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+ /* SPECIFIC_IBL_WR_ENCERRSTATUS_LOW */
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+ },
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+ .err_clear = {
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+ .access_type = CAM_REG_TYPE_WRITE,
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+ .enable = true,
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+ .offset = 0x1198, /* SPECIFIC_IBL_WR_ENCERRCLR_LOW */
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+ .value = 1,
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+ },
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+ },
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+ {
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+ .irq_type = CAM_CAMNOC_HW_IRQ_AHB_TIMEOUT,
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+ .enable = true,
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+ .sbm_port = 0x20, /* SBM_FAULTINSTATUS0_LOW_PORT5_MASK */
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+ .err_enable = {
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .enable = true,
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+ .offset = 0x2088, /* SBM_FLAGOUTSET0_LOW */
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+ .value = 0x1,
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+ },
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+ .err_status = {
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+ .access_type = CAM_REG_TYPE_READ,
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+ .enable = true,
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+ .offset = 0x2090, /* SBM_FLAGOUTSTATUS0_LOW */
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+ },
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+ .err_clear = {
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+ .enable = false,
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+ },
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+ },
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+ {
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+ .irq_type = CAM_CAMNOC_HW_IRQ_RESERVED1,
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+ .enable = false,
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+ },
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+ {
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+ .irq_type = CAM_CAMNOC_HW_IRQ_RESERVED2,
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+ .enable = false,
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+ },
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+ {
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+ .irq_type = CAM_CAMNOC_HW_IRQ_CAMNOC_TEST,
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+ .enable = TEST_IRQ_ENABLE ? true : false,
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+ .sbm_port = 0x100, /* SBM_FAULTINSTATUS0_LOW_PORT8_MASK */
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+ .err_enable = {
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .enable = true,
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+ .offset = 0x2088, /* SBM_FLAGOUTSET0_LOW */
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+ .value = 0x5,
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+ },
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+ .err_status = {
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+ .access_type = CAM_REG_TYPE_READ,
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+ .enable = true,
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+ .offset = 0x2090, /* SBM_FLAGOUTSTATUS0_LOW */
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+ },
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+ .err_clear = {
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+ .enable = false,
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+ },
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+ },
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+};
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+
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+static struct cam_camnoc_specific
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+ cam_cpas_v170_200_camnoc_specific[] = {
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+ {
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+ .port_type = CAM_CAMNOC_CDM,
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+ .enable = true,
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+ .priority_lut_low = {
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+ .enable = true,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .masked_value = 0,
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+ .offset = 0x30, /* SPECIFIC_CDM_PRIORITYLUT_LOW */
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+ .value = 0x22222222,
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+ },
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+ .priority_lut_high = {
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+ .enable = true,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .masked_value = 0,
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+ .offset = 0x34, /* SPECIFIC_CDM_PRIORITYLUT_HIGH */
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+ .value = 0x22222222,
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+ },
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+ .urgency = {
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+ .enable = true,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .masked_value = 1,
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+ .offset = 0x38, /* SPECIFIC_CDM_URGENCY_LOW */
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+ .mask = 0x7, /* SPECIFIC_CDM_URGENCY_LOW_READ_MASK */
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+ .shift = 0x0, /* SPECIFIC_CDM_URGENCY_LOW_READ_SHIFT */
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+ .value = 0x2,
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+ },
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+ .danger_lut = {
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+ .enable = false,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .masked_value = 0,
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+ .offset = 0x40, /* SPECIFIC_CDM_DANGERLUT_LOW */
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+ .value = 0x0,
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+ },
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+ .safe_lut = {
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+ .enable = false,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .masked_value = 0,
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+ .offset = 0x48, /* SPECIFIC_CDM_SAFELUT_LOW */
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+ .value = 0x0,
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+ },
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+ .ubwc_ctl = {
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+ .enable = false,
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+ },
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+ },
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+ {
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+ .port_type = CAM_CAMNOC_IFE02,
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+ .enable = true,
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+ .priority_lut_low = {
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+ .enable = true,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .masked_value = 0,
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+ .offset = 0x430, /* SPECIFIC_IFE02_PRIORITYLUT_LOW */
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+ .value = 0x66666543,
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+ },
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+ .priority_lut_high = {
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+ .enable = true,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .masked_value = 0,
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+ .offset = 0x434, /* SPECIFIC_IFE02_PRIORITYLUT_HIGH */
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+ .value = 0x66666666,
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+ },
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+ .urgency = {
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+ .enable = true,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .masked_value = 1,
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+ .offset = 0x438, /* SPECIFIC_IFE02_URGENCY_LOW */
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+ /* SPECIFIC_IFE02_URGENCY_LOW_WRITE_MASK */
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+ .mask = 0x70,
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+ /* SPECIFIC_IFE02_URGENCY_LOW_WRITE_SHIFT */
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+ .shift = 0x4,
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+ .value = 3,
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+ },
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+ .danger_lut = {
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+ .enable = true,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .offset = 0x440, /* SPECIFIC_IFE02_DANGERLUT_LOW */
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+ .value = 0xFFFFFF00,
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+ },
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+ .safe_lut = {
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+ .enable = true,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .offset = 0x448, /* SPECIFIC_IFE02_SAFELUT_LOW */
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+ .value = 0x1,
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+ },
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+ .ubwc_ctl = {
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+ .enable = true,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .masked_value = 0,
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+ .offset = 0x588, /* SPECIFIC_IFE02_ENCCTL_LOW */
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+ .value = 1,
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+ },
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+ },
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+ {
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+ .port_type = CAM_CAMNOC_IFE13,
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+ .enable = true,
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+ .priority_lut_low = {
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+ .enable = true,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .masked_value = 0,
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+ .offset = 0x830, /* SPECIFIC_IFE13_PRIORITYLUT_LOW */
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+ .value = 0x66666543,
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+ },
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+ .priority_lut_high = {
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+ .enable = true,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .masked_value = 0,
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+ .offset = 0x834, /* SPECIFIC_IFE13_PRIORITYLUT_HIGH */
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+ .value = 0x66666666,
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+ },
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+ .urgency = {
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+ .enable = true,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .masked_value = 1,
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+ .offset = 0x838, /* SPECIFIC_IFE13_URGENCY_LOW */
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+ /* SPECIFIC_IFE13_URGENCY_LOW_WRITE_MASK */
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+ .mask = 0x70,
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+ /* SPECIFIC_IFE13_URGENCY_LOW_WRITE_SHIFT */
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+ .shift = 0x4,
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+ .value = 3,
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+ },
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+ .danger_lut = {
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+ .enable = true,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .offset = 0x840, /* SPECIFIC_IFE13_DANGERLUT_LOW */
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+ .value = 0xFFFFFF00,
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+ },
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+ .safe_lut = {
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+ .enable = true,
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+ .access_type = CAM_REG_TYPE_READ_WRITE,
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+ .offset = 0x848, /* SPECIFIC_IFE13_SAFELUT_LOW */
|
|
|
|
+ .value = 0x1,
|
|
|
|
+ },
|
|
|
|
+ .ubwc_ctl = {
|
|
|
|
+ .enable = true,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0x988, /* SPECIFIC_IFE13_ENCCTL_LOW */
|
|
|
|
+ .value = 1,
|
|
|
|
+ },
|
|
|
|
+ },
|
|
|
|
+ {
|
|
|
|
+ .port_type = CAM_CAMNOC_IPE_BPS_LRME_READ,
|
|
|
|
+ .enable = true,
|
|
|
|
+ .priority_lut_low = {
|
|
|
|
+ .enable = true,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0xc30, /* SPECIFIC_IBL_RD_PRIORITYLUT_LOW */
|
|
|
|
+ .value = 0x33333333,
|
|
|
|
+ },
|
|
|
|
+ .priority_lut_high = {
|
|
|
|
+ .enable = true,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0xc34, /* SPECIFIC_IBL_RD_PRIORITYLUT_HIGH */
|
|
|
|
+ .value = 0x33333333,
|
|
|
|
+ },
|
|
|
|
+ .urgency = {
|
|
|
|
+ .enable = true,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 1,
|
|
|
|
+ .offset = 0xc38, /* SPECIFIC_IBL_RD_URGENCY_LOW */
|
|
|
|
+ /* SPECIFIC_IBL_RD_URGENCY_LOW_READ_MASK */
|
|
|
|
+ .mask = 0x7,
|
|
|
|
+ /* SPECIFIC_IBL_RD_URGENCY_LOW_READ_SHIFT */
|
|
|
|
+ .shift = 0x0,
|
|
|
|
+ .value = 3,
|
|
|
|
+ },
|
|
|
|
+ .danger_lut = {
|
|
|
|
+ .enable = false,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0xc40, /* SPECIFIC_IBL_RD_DANGERLUT_LOW */
|
|
|
|
+ .value = 0x0,
|
|
|
|
+ },
|
|
|
|
+ .safe_lut = {
|
|
|
|
+ .enable = false,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0xc48, /* SPECIFIC_IBL_RD_SAFELUT_LOW */
|
|
|
|
+ .value = 0x0,
|
|
|
|
+ },
|
|
|
|
+ .ubwc_ctl = {
|
|
|
|
+ .enable = true,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0xd08, /* SPECIFIC_IBL_RD_DECCTL_LOW */
|
|
|
|
+ .value = 1,
|
|
|
|
+ },
|
|
|
|
+ },
|
|
|
|
+ {
|
|
|
|
+ .port_type = CAM_CAMNOC_IPE_BPS_LRME_WRITE,
|
|
|
|
+ .enable = true,
|
|
|
|
+ .priority_lut_low = {
|
|
|
|
+ .enable = true,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0x1030, /* SPECIFIC_IBL_WR_PRIORITYLUT_LOW */
|
|
|
|
+ .value = 0x33333333,
|
|
|
|
+ },
|
|
|
|
+ .priority_lut_high = {
|
|
|
|
+ .enable = true,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0x1034, /* SPECIFIC_IBL_WR_PRIORITYLUT_HIGH */
|
|
|
|
+ .value = 0x33333333,
|
|
|
|
+ },
|
|
|
|
+ .urgency = {
|
|
|
|
+ .enable = true,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 1,
|
|
|
|
+ .offset = 0x1038, /* SPECIFIC_IBL_WR_URGENCY_LOW */
|
|
|
|
+ /* SPECIFIC_IBL_WR_URGENCY_LOW_WRITE_MASK */
|
|
|
|
+ .mask = 0x70,
|
|
|
|
+ /* SPECIFIC_IBL_WR_URGENCY_LOW_WRITE_SHIFT */
|
|
|
|
+ .shift = 0x4,
|
|
|
|
+ .value = 3,
|
|
|
|
+ },
|
|
|
|
+ .danger_lut = {
|
|
|
|
+ .enable = false,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0x1040, /* SPECIFIC_IBL_WR_DANGERLUT_LOW */
|
|
|
|
+ .value = 0x0,
|
|
|
|
+ },
|
|
|
|
+ .safe_lut = {
|
|
|
|
+ .enable = false,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0x1048, /* SPECIFIC_IBL_WR_SAFELUT_LOW */
|
|
|
|
+ .value = 0x0,
|
|
|
|
+ },
|
|
|
|
+ .ubwc_ctl = {
|
|
|
|
+ .enable = true,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0x1188, /* SPECIFIC_IBL_WR_ENCCTL_LOW */
|
|
|
|
+ .value = 1,
|
|
|
|
+ },
|
|
|
|
+ },
|
|
|
|
+ {
|
|
|
|
+ .port_type = CAM_CAMNOC_JPEG,
|
|
|
|
+ .enable = true,
|
|
|
|
+ .priority_lut_low = {
|
|
|
|
+ .enable = true,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0x1430, /* SPECIFIC_JPEG_PRIORITYLUT_LOW */
|
|
|
|
+ .value = 0x22222222,
|
|
|
|
+ },
|
|
|
|
+ .priority_lut_high = {
|
|
|
|
+ .enable = true,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0x1434, /* SPECIFIC_JPEG_PRIORITYLUT_HIGH */
|
|
|
|
+ .value = 0x22222222,
|
|
|
|
+ },
|
|
|
|
+ .urgency = {
|
|
|
|
+ .enable = true,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0x1438, /* SPECIFIC_JPEG_URGENCY_LOW */
|
|
|
|
+ .value = 0x22,
|
|
|
|
+ },
|
|
|
|
+ .danger_lut = {
|
|
|
|
+ .enable = false,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0x1440, /* SPECIFIC_JPEG_DANGERLUT_LOW */
|
|
|
|
+ .value = 0x0,
|
|
|
|
+ },
|
|
|
|
+ .safe_lut = {
|
|
|
|
+ .enable = false,
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0x1448, /* SPECIFIC_JPEG_SAFELUT_LOW */
|
|
|
|
+ .value = 0x0,
|
|
|
|
+ },
|
|
|
|
+ .ubwc_ctl = {
|
|
|
|
+ .enable = false,
|
|
|
|
+ },
|
|
|
|
+ },
|
|
|
|
+ {
|
|
|
|
+ .port_type = CAM_CAMNOC_FD,
|
|
|
|
+ .enable = false,
|
|
|
|
+ },
|
|
|
|
+ {
|
|
|
|
+ .port_type = CAM_CAMNOC_ICP,
|
|
|
|
+ .enable = true,
|
|
|
|
+ .flag_out_set0_low = {
|
|
|
|
+ .enable = true,
|
|
|
|
+ .access_type = CAM_REG_TYPE_WRITE,
|
|
|
|
+ .masked_value = 0,
|
|
|
|
+ .offset = 0x2088,
|
|
|
|
+ .value = 0x100000,
|
|
|
|
+ },
|
|
|
|
+ },
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct cam_camnoc_err_logger_info cam170_cpas200_err_logger_offsets = {
|
|
|
|
+ .mainctrl = 0x2708, /* ERRLOGGER_MAINCTL_LOW */
|
|
|
|
+ .errvld = 0x2710, /* ERRLOGGER_ERRVLD_LOW */
|
|
|
|
+ .errlog0_low = 0x2720, /* ERRLOGGER_ERRLOG0_LOW */
|
|
|
|
+ .errlog0_high = 0x2724, /* ERRLOGGER_ERRLOG0_HIGH */
|
|
|
|
+ .errlog1_low = 0x2728, /* ERRLOGGER_ERRLOG1_LOW */
|
|
|
|
+ .errlog1_high = 0x272c, /* ERRLOGGER_ERRLOG1_HIGH */
|
|
|
|
+ .errlog2_low = 0x2730, /* ERRLOGGER_ERRLOG2_LOW */
|
|
|
|
+ .errlog2_high = 0x2734, /* ERRLOGGER_ERRLOG2_HIGH */
|
|
|
|
+ .errlog3_low = 0x2738, /* ERRLOGGER_ERRLOG3_LOW */
|
|
|
|
+ .errlog3_high = 0x273c, /* ERRLOGGER_ERRLOG3_HIGH */
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct cam_cpas_hw_errata_wa_list cam170_cpas200_errata_wa_list = {
|
|
|
|
+ .camnoc_flush_slave_pending_trans = {
|
|
|
|
+ .enable = false,
|
|
|
|
+ .data.reg_info = {
|
|
|
|
+ .access_type = CAM_REG_TYPE_READ,
|
|
|
|
+ .offset = 0x2100, /* SidebandManager_SenseIn0_Low */
|
|
|
|
+ .mask = 0xE0000, /* Bits 17, 18, 19 */
|
|
|
|
+ .value = 0, /* expected to be 0 */
|
|
|
|
+ },
|
|
|
|
+ },
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+static struct cam_camnoc_info cam170_cpas200_camnoc_info = {
|
|
|
|
+ .specific = &cam_cpas_v170_200_camnoc_specific[0],
|
|
|
|
+ .specific_size = ARRAY_SIZE(cam_cpas_v170_200_camnoc_specific),
|
|
|
|
+ .irq_sbm = &cam_cpas_v170_200_irq_sbm,
|
|
|
|
+ .irq_err = &cam_cpas_v170_200_irq_err[0],
|
|
|
|
+ .irq_err_size = ARRAY_SIZE(cam_cpas_v170_200_irq_err),
|
|
|
|
+ .err_logger = &cam170_cpas200_err_logger_offsets,
|
|
|
|
+ .errata_wa_list = &cam170_cpas200_errata_wa_list,
|
|
|
|
+};
|
|
|
|
+
|
|
|
|
+#endif /* _CPASTOP_V170_200_H_ */
|