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qcedev: support for additional offload pipes

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Add support for two additional offload pipes.
1 new HLOS_HLOS pipes.
1 new HLOS_CPB pipe.

Change-Id: Ia9acf3cbdf9c1f148dbddc9426d51ade0d26ff75
Signed-off-by: Gaurav Kashyap <quic_gaurkash@quicinc.com>
This commit is contained in:
Gaurav Kashyap
2023-02-08 02:51:50 -08:00
parent e0e07de5fd
commit de989fe1a3
5 changed files with 46 additions and 31 deletions
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6
crypto-qti/qce.h
View File

@@ -109,8 +109,10 @@ enum qce_req_op_enum {
enum qce_offload_op_enum {
QCE_OFFLOAD_NONE = 0, /* kernel pipe */
QCE_OFFLOAD_HLOS_HLOS = 1,
QCE_OFFLOAD_HLOS_CPB = 2,
QCE_OFFLOAD_CPB_HLOS = 3,
QCE_OFFLOAD_HLOS_HLOS_1 = 2,
QCE_OFFLOAD_HLOS_CPB = 3,
QCE_OFFLOAD_HLOS_CPB_1 = 4,
QCE_OFFLOAD_CPB_HLOS = 5,
QCE_OFFLOAD_OPER_LAST
};

50
crypto-qti/qce50.c
View File

@@ -205,8 +205,9 @@ static uint32_t _std_init_vector_sha256[] = {
*/
static bool is_offload_op(int op)
{
return (op == QCE_OFFLOAD_HLOS_HLOS || op == QCE_OFFLOAD_HLOS_CPB ||
op == QCE_OFFLOAD_CPB_HLOS);
return (op == QCE_OFFLOAD_HLOS_HLOS || op == QCE_OFFLOAD_HLOS_HLOS_1 ||
op == QCE_OFFLOAD_CPB_HLOS || op == QCE_OFFLOAD_HLOS_CPB ||
op == QCE_OFFLOAD_HLOS_CPB_1);
}
static uint32_t qce_get_config_be(struct qce_device *pce_dev,
@@ -296,28 +297,8 @@ static int qce_crypto_config(struct qce_device *pce_dev,
{
uint32_t config_be = 0;
switch (offload_op) {
case QCE_OFFLOAD_NONE:
config_be = qce_get_config_be(pce_dev,
pce_dev->ce_bam_info.pipe_pair_index[QCE_OFFLOAD_NONE]);
break;
case QCE_OFFLOAD_HLOS_HLOS:
config_be = qce_get_config_be(pce_dev,
pce_dev->ce_bam_info.pipe_pair_index[QCE_OFFLOAD_HLOS_HLOS]);
break;
case QCE_OFFLOAD_HLOS_CPB:
config_be = qce_get_config_be(pce_dev,
pce_dev->ce_bam_info.pipe_pair_index[QCE_OFFLOAD_HLOS_CPB]);
break;
case QCE_OFFLOAD_CPB_HLOS:
config_be = qce_get_config_be(pce_dev,
pce_dev->ce_bam_info.pipe_pair_index[QCE_OFFLOAD_CPB_HLOS]);
break;
default:
pr_err("%s: Valid pipe config not set, offload op = %d\n",
__func__, offload_op);
return -EINVAL;
}
pce_dev->ce_bam_info.pipe_pair_index[offload_op]);
pce_dev->reg.crypto_cfg_be = config_be;
pce_dev->reg.crypto_cfg_le = (config_be |
@@ -3384,6 +3365,8 @@ static int qce_sps_init(struct qce_device *pce_dev)
continue;
else if ((i > 0) && !(pce_dev->offload_pipes_support))
break;
if (!pce_dev->ce_bam_info.pipe_pair_index[i])
continue;
rc = qce_sps_init_ep_conn(pce_dev,
&pce_dev->ce_bam_info.producer[i], i, true);
if (rc)
@@ -3632,6 +3615,8 @@ static void qce_sps_exit(struct qce_device *pce_dev)
continue;
else if ((i > 0) && !(pce_dev->offload_pipes_support))
break;
if (!pce_dev->ce_bam_info.pipe_pair_index[i])
continue;
qce_sps_exit_ep_conn(pce_dev,
&pce_dev->ce_bam_info.consumer[i]);
qce_sps_exit_ep_conn(pce_dev,
@@ -5374,6 +5359,8 @@ static int _qce_suspend(void *handle)
continue;
else if ((i > 0) && !(pce_dev->offload_pipes_support))
break;
if (!pce_dev->ce_bam_info.pipe_pair_index[i])
continue;
sps_pipe_info = pce_dev->ce_bam_info.consumer[i].pipe;
sps_disconnect(sps_pipe_info);
@@ -5400,6 +5387,8 @@ static int _qce_resume(void *handle)
continue;
else if ((i > 0) && !(pce_dev->offload_pipes_support))
break;
if (!pce_dev->ce_bam_info.pipe_pair_index[i])
continue;
sps_pipe_info = pce_dev->ce_bam_info.consumer[i].pipe;
sps_connect_info = &pce_dev->ce_bam_info.consumer[i].connect;
memset(sps_connect_info->desc.base, 0x00,
@@ -6267,6 +6256,9 @@ static int __qce_get_device_tree_data(struct platform_device *pdev,
pce_dev->request_bw_before_clk = of_property_read_bool(
(&pdev->dev)->of_node, "qcom,request-bw-before-clk");
for (i = 0; i < QCE_OFFLOAD_OPER_LAST; i++)
pce_dev->ce_bam_info.pipe_pair_index[i] = 0;
pce_dev->kernel_pipes_support = true;
if (of_property_read_u32((&pdev->dev)->of_node,
"qcom,bam-pipe-pair",
@@ -6286,18 +6278,30 @@ static int __qce_get_device_tree_data(struct platform_device *pdev,
pr_err("Fail to get bam offload cpb-hlos pipe pair info.\n");
return -EINVAL;
}
if (of_property_read_u32((&pdev->dev)->of_node,
"qcom,bam-pipe-offload-hlos-hlos",
&pce_dev->ce_bam_info.pipe_pair_index[QCE_OFFLOAD_HLOS_HLOS])) {
pr_err("Fail to get bam offload hlos-hlos info.\n");
return -EINVAL;
}
if (of_property_read_u32((&pdev->dev)->of_node,
"qcom,bam-pipe-offload-hlos-hlos-1",
&pce_dev->ce_bam_info.pipe_pair_index[QCE_OFFLOAD_HLOS_HLOS_1])) {
pr_info("No bam offload hlos-hlos-1 info.\n");
}
if (of_property_read_u32((&pdev->dev)->of_node,
"qcom,bam-pipe-offload-hlos-cpb",
&pce_dev->ce_bam_info.pipe_pair_index[QCE_OFFLOAD_HLOS_CPB])) {
pr_err("Fail to get bam offload hlos-cpb info\n");
return -EINVAL;
}
if (of_property_read_u32((&pdev->dev)->of_node,
"qcom,bam-pipe-offload-hlos-cpb-1",
&pce_dev->ce_bam_info.pipe_pair_index[QCE_OFFLOAD_HLOS_CPB_1])) {
pr_info("No bam offload hlos-cpb-1 info\n");
}
}
if (of_property_read_u32((&pdev->dev)->of_node,

5
crypto-qti/qcedev.c
View File

@@ -569,12 +569,15 @@ static int start_offload_cipher_req(struct qcedev_control *podev,
return -EINVAL;
}
if (qcedev_areq->offload_cipher_op_req.is_copy_op) {
if (qcedev_areq->offload_cipher_op_req.is_copy_op ||
qcedev_areq->offload_cipher_op_req.encrypt) {
creq.dir = QCE_ENCRYPT;
} else {
switch(qcedev_areq->offload_cipher_op_req.op) {
case QCEDEV_OFFLOAD_HLOS_HLOS:
case QCEDEV_OFFLOAD_HLOS_HLOS_1:
case QCEDEV_OFFLOAD_HLOS_CPB:
case QCEDEV_OFFLOAD_HLOS_CPB_1:
creq.dir = QCE_DECRYPT;
break;
case QCEDEV_OFFLOAD_CPB_HLOS:

7
include/uapi/linux/qcedev.h
View File

@@ -49,8 +49,10 @@ enum qcedev_oper_enum {
*/
enum qcedev_offload_oper_enum {
QCEDEV_OFFLOAD_HLOS_HLOS = 1,
QCEDEV_OFFLOAD_HLOS_CPB = 2,
QCEDEV_OFFLOAD_CPB_HLOS = 3,
QCEDEV_OFFLOAD_HLOS_HLOS_1 = 2,
QCEDEV_OFFLOAD_HLOS_CPB = 3,
QCEDEV_OFFLOAD_HLOS_CPB_1 = 4,
QCEDEV_OFFLOAD_CPB_HLOS = 5,
QCEDEV_OFFLOAD_OPER_LAST
};
@@ -309,6 +311,7 @@ struct qcedev_offload_cipher_op_req {
__u8 block_offset;
__u8 is_pattern_valid;
__u8 is_copy_op;
__u8 encrypt;
struct pattern_info pattern_info;
enum qcedev_cipher_alg_enum alg;
enum qcedev_cipher_mode_enum mode;

7
linux/qcedev.h
View File

@@ -49,8 +49,10 @@ enum qcedev_oper_enum {
*/
enum qcedev_offload_oper_enum {
QCEDEV_OFFLOAD_HLOS_HLOS = 1,
QCEDEV_OFFLOAD_HLOS_CPB = 2,
QCEDEV_OFFLOAD_CPB_HLOS = 3,
QCEDEV_OFFLOAD_HLOS_HLOS_1 = 2,
QCEDEV_OFFLOAD_HLOS_CPB = 3,
QCEDEV_OFFLOAD_HLOS_CPB_1 = 4,
QCEDEV_OFFLOAD_CPB_HLOS = 5,
QCEDEV_OFFLOAD_OPER_LAST
};
@@ -309,6 +311,7 @@ struct qcedev_offload_cipher_op_req {
__u8 block_offset;
__u8 is_pattern_valid;
__u8 is_copy_op;
__u8 encrypt;
struct pattern_info pattern_info;
enum qcedev_cipher_alg_enum alg;
enum qcedev_cipher_mode_enum mode;