diff --git a/msm/sde/sde_crtc.c b/msm/sde/sde_crtc.c index 695425ceac..4814e98d7d 100644 --- a/msm/sde/sde_crtc.c +++ b/msm/sde/sde_crtc.c @@ -1796,6 +1796,11 @@ static void _sde_crtc_blend_setup(struct drm_crtc *crtc, return; } + if (test_bit(SDE_CRTC_DIRTY_DIM_LAYERS, &sde_crtc->revalidate_mask)) { + set_bit(SDE_CRTC_DIRTY_DIM_LAYERS, sde_crtc_state->dirty); + clear_bit(SDE_CRTC_DIRTY_DIM_LAYERS, &sde_crtc->revalidate_mask); + } + for (i = 0; i < sde_crtc->num_mixers; i++) { if (!mixer[i].hw_lm) { SDE_ERROR("invalid lm or ctl assigned to mixer\n"); @@ -4245,6 +4250,7 @@ void sde_crtc_reset_sw_state(struct drm_crtc *crtc) { struct sde_crtc_state *cstate = to_sde_crtc_state(crtc->state); struct drm_plane *plane; + struct sde_crtc *sde_crtc = to_sde_crtc(crtc); /* mark planes, mixers, and other blocks dirty for next update */ drm_atomic_crtc_for_each_plane(plane, crtc) @@ -4254,7 +4260,7 @@ void sde_crtc_reset_sw_state(struct drm_crtc *crtc) sde_crtc_clear_cached_mixer_cfg(crtc); /* mark other properties which need to be dirty for next update */ - set_bit(SDE_CRTC_DIRTY_DIM_LAYERS, cstate->dirty); + set_bit(SDE_CRTC_DIRTY_DIM_LAYERS, &sde_crtc->revalidate_mask); if (cstate->num_ds_enabled) set_bit(SDE_CRTC_DIRTY_DEST_SCALER, cstate->dirty); } diff --git a/msm/sde/sde_crtc.h b/msm/sde/sde_crtc.h index ff0a6632cc..cf6d364ebb 100644 --- a/msm/sde/sde_crtc.h +++ b/msm/sde/sde_crtc.h @@ -282,6 +282,7 @@ struct sde_frame_data { * @cp_feature_list : list of color processing features supported on a crtc * @cp_active_list : list of color processing features are active * @cp_dirty_list : list of color processing features are dirty + * @revalidate_mask : stores dirty flags to revalidate after idlepc * @ad_dirty : list containing ad properties that are dirty * @ad_active : list containing ad properties that are active * @crtc_lock : crtc lock around create, destroy and access. @@ -382,6 +383,7 @@ struct sde_crtc { spinlock_t spin_lock; spinlock_t fevent_spin_lock; bool kickoff_in_progress; + unsigned long revalidate_mask; /* for handling internal event thread */ struct sde_crtc_event event_cache[SDE_CRTC_MAX_EVENT_COUNT];