qcacmn: Find proper radar-found secondary frequency

Bring up a Hawkeye AP in ETSI domain in HT80_80 mode and enable preCAC
(preCACEn). When preCAC timer is running, if radar gets detected in the
secondary segment (which is DFS), radar found frequency gets computed
from "dfs_precac_secondary_freq" variable which does not get populated
for Lithium chipsets as "dfs_precac_secondary_freq" is specific to
legacy preCAC.

Since the secondary frequency gets assigned as 0, radar found offset gets
computed wrongly and channels are not added to NOL.

Ensure that "dfs_precac_secondary_freq" is used for secondary frequency
computation only for legacy chips. For chips that have a separate agile
radar detector engine, use "dfs_ch_vhtop_ch_freq_seg2" variable to
compute the secondary frequency.

CRs-Fixed: 2515454
Change-Id: Id1ec0c1500bf4df02a0fe52b4960141122da4f16

umac/dfs/core/src/dfs.h

@@ -932,9 +932,13 @@ struct dfs_event_log {
  *                                   received.
  * @is_radar_during_precac:          Radar found during precac.
  * @dfs_precac_lock:                 Lock to protect precac lists.
- * @dfs_precac_enable:               Enable the precac.
+ * @dfs_precac_enable:               Enable the precac for legacy chips.
+ * @dfs_agile_precac_enable:         Enable preCAC for chips that supports agile
+ *                                   detector engine.
  * @dfs_precac_secondary_freq:       Second segment freq for precac.
- * @dfs_precac_primary_freq:         Primary freq.
+ *                                   Applicable to only legacy chips.
+ * @dfs_precac_primary_freq:         PreCAC Primary freq applicable only to
+ *                                   legacy chips.
  * @dfs_defer_precac_channel_change: Defer precac channel change.
  * @dfs_precac_inter_chan:           Intermediate non-DFS channel used while
  *                                   doing precac.

umac/dfs/core/src/dfs_process_radar_found_ind.h

@@ -69,6 +69,8 @@
 #define DFS_CHIRP_OFFSET  10
 /* second segment freq offset */
 #define DFS_160MHZ_SECOND_SEG_OFFSET  40
+/*Primary segment id is 0 */
+#define PRIMARY_SEG 0
 
 /* Frequency offset indices */
 #define CENTER_CH 0

umac/dfs/core/src/misc/dfs_process_radar_found_ind.c

@@ -330,20 +330,33 @@ dfs_compute_radar_found_cfreq(struct wlan_dfs *dfs,
 			      uint32_t *freq_center)
 {
 	struct dfs_channel *curchan = dfs->dfs_curchan;
-
+	/* Radar found on agile detector ID.
+	 * Applicable to chips that have a separate agile radar detector
+	 * engine.
+	 */
 	if (radar_found->detector_id == AGILE_DETECTOR_ID) {
 		*freq_center = utils_dfs_chan_to_freq(
 				dfs->dfs_agile_precac_freq);
-	} else if (!radar_found->segment_id) {
+       /* Radar found on primary segment by the HW. */
+	} else if (radar_found->segment_id == PRIMARY_SEG) {
 		*freq_center = utils_dfs_chan_to_freq(
 				curchan->dfs_ch_vhtop_ch_freq_seg1);
 	} else {
-		if (dfs_is_precac_timer_running(dfs)) {
+	    /* Radar found on secondary segment by the HW when
+	     * preCAC was running. It (dfs_precac_enable) is specific to
+	     * legacy chips.
+	     */
+		if (dfs_is_precac_timer_running(dfs) &&
+		    (dfs->dfs_precac_enable)) {
 			*freq_center = utils_dfs_chan_to_freq(
 					dfs->dfs_precac_secondary_freq);
 		} else {
-			*freq_center = utils_dfs_chan_to_freq(
-					curchan->dfs_ch_vhtop_ch_freq_seg2);
+		    /* Radar found on secondary segment by the HW, when preCAC
+		     * was not running in legacy chips or preCAC was running
+		     * in Lithium chips.
+		     */
+		    *freq_center = utils_dfs_chan_to_freq(
+				  curchan->dfs_ch_vhtop_ch_freq_seg2);
 			if (WLAN_IS_CHAN_MODE_160(curchan)) {
 				/* If center frequency of entire 160 band
 				 * is less than center frequency of primary
@@ -352,7 +365,7 @@ dfs_compute_radar_found_cfreq(struct wlan_dfs *dfs,
 				 * frequency of entire 160 segment.
 				 */
 				if (curchan->dfs_ch_vhtop_ch_freq_seg2 <
-				    curchan->dfs_ch_vhtop_ch_freq_seg1)
+					curchan->dfs_ch_vhtop_ch_freq_seg1)
 					*freq_center -=
 						DFS_160MHZ_SECOND_SEG_OFFSET;
 				else