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@@ -26,6 +26,9 @@
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#define SDE_PERF_MODE_STRING_SIZE 128
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#define SDE_PERF_MODE_STRING_SIZE 128
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#define SDE_PERF_THRESHOLD_HIGH_MIN 12800000
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#define SDE_PERF_THRESHOLD_HIGH_MIN 12800000
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+#define GET_H32(val) (val >> 32)
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+#define GET_L32(val) (val & 0xffffffff)
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+
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static DEFINE_MUTEX(sde_core_perf_lock);
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static DEFINE_MUTEX(sde_core_perf_lock);
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/**
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/**
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@@ -150,7 +153,20 @@ static void _sde_core_perf_calc_crtc(struct sde_kms *kms,
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perf->core_clk_rate);
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perf->core_clk_rate);
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}
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}
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- SDE_EVT32(crtc->base.id, perf->core_clk_rate);
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+ SDE_EVT32(DRMID(crtc), perf->core_clk_rate,
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+ GET_H32(perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_MNOC]),
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+ GET_L32(perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_MNOC]),
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+ GET_H32(perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_LLCC]),
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+ GET_L32(perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_LLCC]),
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+ GET_H32(perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_EBI]),
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+ GET_L32(perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_EBI]));
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+ SDE_EVT32(DRMID(crtc),
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+ GET_H32(perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_MNOC]),
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+ GET_L32(perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_MNOC]),
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+ GET_H32(perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_LLCC]),
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+ GET_L32(perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_LLCC]),
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+ GET_H32(perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_EBI]),
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+ GET_L32(perf->max_per_pipe_ib[SDE_POWER_HANDLE_DBUS_ID_EBI]));
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trace_sde_perf_calc_crtc(crtc->base.id,
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trace_sde_perf_calc_crtc(crtc->base.id,
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perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_MNOC],
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perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_MNOC],
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perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_LLCC],
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perf->bw_ctl[SDE_POWER_HANDLE_DBUS_ID_LLCC],
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