msm: eva: Add QDENY and QACTIVE checks
During CPU NoC LPI sequence. Print more debugging registers in case LPI QACCEPT is not set after 20ms. It indicates a pending transaction lingering around. Adding dump for NOC registers. Change-Id: Ied58e52e30572074be77b4d51a03fb4194d78caa Signed-off-by: George Shen <quic_sqiao@quicinc.com>
This commit is contained in:
George Shen
gecommit door
Palak Joshi
Palak Joshi
bovenliggende
65910f2681
commit
dc5c927020
@@ -298,4 +298,5 @@ int cvp_iris_hfi_initialize(struct cvp_hfi_ops *hdev,
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int load_cvp_fw_impl(struct iris_hfi_device *device);
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int unload_cvp_fw_impl(struct iris_hfi_device *device);
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void cvp_dump_csr(struct iris_hfi_device *dev);
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#endif
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@@ -115,6 +115,9 @@ static int __reset_control_release(struct iris_hfi_device *device, const char *n
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static bool __is_ctl_power_on(struct iris_hfi_device *device);
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static void __print_sidebandmanager_regs(struct iris_hfi_device *device);
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static void dump_noc_reg(struct iris_hfi_device *device);
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static struct cvp_hal_ops hal_ops = {
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.interrupt_init = interrupt_init_iris2,
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.setup_dsp_uc_memmap = setup_dsp_uc_memmap_vpu5,
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@@ -1329,7 +1332,7 @@ static int iris_hfi_suspend(void *dev)
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return rc;
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}
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static void cvp_dump_csr(struct iris_hfi_device *dev)
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void cvp_dump_csr(struct iris_hfi_device *dev)
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{
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u32 reg;
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@@ -1355,6 +1358,9 @@ static void cvp_dump_csr(struct iris_hfi_device *dev)
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dprintk(CVP_ERR, "CVP_WRAPPER_CPU_CLOCK_CONFIG: %x\n", reg);
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reg = __read_register(dev, CVP_WRAPPER_CORE_CLOCK_CONFIG);
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dprintk(CVP_ERR, "CVP_WRAPPER_CORE_CLOCK_CONFIG: %x\n", reg);
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dump_noc_reg(dev);
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dev->reg_dumped = true;
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}
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@@ -3632,6 +3638,7 @@ static void iris_hfi_wd_work_handler(struct work_struct *work)
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if (msm_cvp_hw_wd_recovery) {
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dprintk(CVP_ERR, "Cleaning up as HW WD recovery is enable %d\n",
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msm_cvp_hw_wd_recovery);
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__print_sidebandmanager_regs(device);
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response.device_id = 0;
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handle_sys_error(cmd, (void *) &response);
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enable_irq(device->cvp_hal_data->irq_wd);
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@@ -4550,6 +4557,10 @@ static int __iris_power_on(struct iris_hfi_device *device)
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/*Do not access registers before this point!*/
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device->power_enabled = true;
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/* Thomas input to debug CPU NoC hang */
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__write_register(device, CVP_NOC_SBM_FAULTINEN0_LOW, 0x1);
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__write_register(device, CVP_NOC_ERR_MAINCTL_LOW_OFFS, 0x3);
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/*
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* Re-program all of the registers that get reset as a result of
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* regulator_disable() and _enable()
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@@ -4643,7 +4654,7 @@ err_tzbsp_suspend:
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static void __print_sidebandmanager_regs(struct iris_hfi_device *device)
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{
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u32 sbm_ln0_low, axi_cbcr;
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u32 sbm_ln0_low, axi_cbcr, val;
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u32 main_sbm_ln0_low = 0xdeadbeef, main_sbm_ln0_high = 0xdeadbeef;
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u32 main_sbm_ln1_high = 0xdeadbeef, cpu_cs_x2rpmh;
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int rc;
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@@ -4671,6 +4682,39 @@ static void __print_sidebandmanager_regs(struct iris_hfi_device *device)
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goto exit;
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}
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/* Added by Thomas to debug CPU NoC hang */
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val = __read_register(device, CVP_NOC_ERR_ERRVLD_LOW_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRVLD_LOW %#x\n", val);
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val = __read_register(device, CVP_NOC_SBM_FAULTINSTATUS0_LOW);
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dprintk(CVP_ERR, "CVP_NOC_SBM_FAULTINSTATUS0_LOW %#x\n", val);
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val = __read_register(device, CVP_NOC_ERR_ERRLOG0_LOW_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG0_LOW %#x\n", val);
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val = __read_register(device, CVP_NOC_ERR_ERRLOG0_HIGH_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG0_HIGH %#x\n", val);
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val = __read_register(device, CVP_NOC_ERR_ERRLOG1_LOW_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG1_LOW %#x\n", val);
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val = __read_register(device, CVP_NOC_ERR_ERRLOG1_HIGH_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG1_HIGH %#x\n", val);
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val = __read_register(device, CVP_NOC_ERR_ERRLOG2_LOW_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG2_LOW %#x\n", val);
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val = __read_register(device, CVP_NOC_ERR_ERRLOG2_HIGH_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG2_HIGH %#x\n", val);
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val = __read_register(device, CVP_NOC_ERR_ERRLOG3_LOW_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG3_LOW %#x\n", val);
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val = __read_register(device, CVP_NOC_ERR_ERRLOG3_HIGH_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_ERL_MAIN_ERRLOG3_HIGH %#x\n", val);
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/* end of addition */
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rc = call_iris_op(device, reset_control_acquire_name, device, "cvp_xo_reset");
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if (rc) {
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dprintk(CVP_WARN, "%s Fail acquire xo_reset\n", __func__);
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@@ -4696,10 +4740,50 @@ exit:
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cpu_cs_x2rpmh);
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}
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static void __enter_cpu_noc_lpi(struct iris_hfi_device *device)
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{
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u32 lpi_status, count = 0, max_count = 2000;
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/* New addition to put CPU/Tensilica to low power */
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count = 0;
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__write_register(device, CVP_WRAPPER_CPU_NOC_LPI_CONTROL, 0x1);
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while (count < max_count) {
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lpi_status = __read_register(device, CVP_WRAPPER_CPU_NOC_LPI_STATUS);
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if ((lpi_status & BIT(1)) || ((lpi_status & BIT(2)) && (!(lpi_status & BIT(0))))) {
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/*
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* If QDENY == true, or
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* If QACTIVE == true && QACCEPT == false
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* Try again
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*/
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__write_register(device, CVP_WRAPPER_CPU_NOC_LPI_CONTROL, 0x0);
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usleep_range(10, 20);
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__write_register(device, CVP_WRAPPER_CPU_NOC_LPI_CONTROL, 0x1);
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usleep_range(1000, 1200);
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count++;
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} else {
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break;
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}
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}
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dprintk(CVP_PWR,
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"%s, CPU Noc: lpi_status %x (count %d)\n", __func__, lpi_status, count);
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if (count == max_count) {
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u32 pc_ready, wfi_status;
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wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
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pc_ready = __read_register(device, CVP_CTRL_STATUS);
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dprintk(CVP_WARN,
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"%s, CPU NOC not in qaccept status %x %x %x\n",
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__func__, lpi_status, wfi_status, pc_ready);
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__print_sidebandmanager_regs(device);
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}
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}
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static int __power_off_controller(struct iris_hfi_device *device)
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{
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u32 lpi_status, reg_status = 0, count = 0, max_count = 1000;
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u32 sbm_ln0_low;
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u32 lpi_status, count = 0, max_count = 1000;
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int rc;
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u32 spare_val, spare_status;
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@@ -4708,37 +4792,7 @@ static int __power_off_controller(struct iris_hfi_device *device)
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__write_register(device, CVP_CPU_CS_X2RPMh, 0x3);
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/* HPG 6.2.2 Step 2, noc to low power */
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/* New addition to put CPU/Tensilica to low power */
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reg_status = 0;
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count = 0;
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__write_register(device, CVP_WRAPPER_CPU_NOC_LPI_CONTROL, 0x1);
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while (!reg_status && count < max_count) {
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lpi_status =
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__read_register(device,
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CVP_WRAPPER_CPU_NOC_LPI_STATUS);
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reg_status = lpi_status & BIT(0);
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/* Wait for CPU noc lpi status to be set */
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usleep_range(50, 100);
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count++;
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}
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sbm_ln0_low = __read_register(device, CVP_NOC_SBM_SENSELN0_LOW);
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dprintk(CVP_PWR,
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"CPU Noc: lpi_status %x noc_status %x (count %d) 0x%x\n",
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lpi_status, reg_status, count, sbm_ln0_low);
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if (count == max_count) {
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u32 pc_ready, wfi_status;
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wfi_status = __read_register(device, CVP_WRAPPER_CPU_STATUS);
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pc_ready = __read_register(device, CVP_CTRL_STATUS);
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dprintk(CVP_WARN,
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"CPU NOC not in qaccept status %x %x %x %x\n",
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reg_status, lpi_status, wfi_status, pc_ready);
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__print_sidebandmanager_regs(device);
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}
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__enter_cpu_noc_lpi(device);
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/* HPG 6.2.2 Step 3, debug bridge to low power BYPASSED */
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@@ -5113,6 +5167,9 @@ static void __unload_fw(struct iris_hfi_device *device)
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if (device->state != IRIS_STATE_DEINIT)
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flush_workqueue(device->iris_pm_workq);
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/* New addition to put CPU/Tensilica to low power */
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__enter_cpu_noc_lpi(device);
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unload_cvp_fw_impl(device);
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__interface_queues_release(device);
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call_iris_op(device, power_off, device);
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@@ -5575,3 +5632,89 @@ err_iris_hfi_init:
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return rc;
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}
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static void dump_noc_reg(struct iris_hfi_device *device)
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{
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u32 val = 0, config;
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int i;
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struct regulator_info *rinfo;
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int rc = 0;
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if (msm_cvp_fw_low_power_mode) {
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iris_hfi_for_each_regulator(device, rinfo) {
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if (strcmp(rinfo->name, "cvp-core"))
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continue;
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rc = __acquire_regulator(rinfo, device);
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if (rc)
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dprintk(CVP_WARN,
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"%s, Failed to acquire regulator control: %s\n",
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__func__, rinfo->name);
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}
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}
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val = __read_register(device, CVP_CC_MVS1_GDSCR);
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dprintk(CVP_ERR, "%s, CVP_CC_MVS1_GDSCR: 0x%x", __func__, val);
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config = __read_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG);
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dprintk(CVP_ERR, "%s, CVP_WRAPPER_CORE_CLOCK_CONFIG: 0x%x", __func__, config);
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if (config) {
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dprintk(CVP_PWR,
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"core clock config not enabled, enable it to access core\n");
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__write_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG, 0);
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}
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i = call_iris_op(device, reset_control_acquire_name, device, "cvp_xo_reset");
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if (i) {
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dprintk(CVP_WARN, "%s Fail acquire xo_reset\n", __func__);
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return;
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}
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val = __read_register(device, CVP_NOC_RGE_NIU_DECCTL_LOW);
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dprintk(CVP_ERR, "CVP_NOC_RGE_NIU_DECCTL_LOW: 0x%x", val);
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val = __read_register(device, CVP_NOC_RGE_NIU_ENCCTL_LOW);
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dprintk(CVP_ERR, "CVP_NOC_RGE_NIU_ENCCTL_LOW: 0x%x", val);
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val = __read_register(device, CVP_NOC_GCE_VADL_TOF_NIU_DECCTL_LOW);
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dprintk(CVP_ERR, "CVP_NOC_GCE_VADL_TOF_NIU_DECCTL_LOW: 0x%x", val);
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val = __read_register(device, CVP_NOC_GCE_VADL_TOF_NIU_ENCCTL_LOW);
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dprintk(CVP_ERR, "CVP_NOC_GCE_VADL_TOF_NIU_ENCCTL_LOW: 0x%x", val);
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val = __read_register(device, CVP_NOC_CORE_ERR_MAINCTL_LOW_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_CORE_ERR_MAINCTL_LOW_OFFS: 0x%x", val);
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val = __read_register(device, CVP_NOC_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW);
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dprintk(CVP_ERR, "CVP_NOC_MAIN_SIDEBANDMANAGER_FAULTINEN0_LOW: 0x%x", val);
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dprintk(CVP_ERR, "Dumping Core NoC registers\n");
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val = __read_register(device, CVP_NOC_CORE_ERR_SWID_LOW_OFFS);
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dprintk(CVP_ERR, "CVP_NOC__CORE_ERL_MAIN_SWID_LOW: 0x%x", val);
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val = __read_register(device, CVP_NOC_CORE_ERR_SWID_HIGH_OFFS);
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dprintk(CVP_ERR, "CVVP_NOC_CORE_ERL_MAIN_SWID_HIGH 0x%x", val);
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val = __read_register(device, CVP_NOC_CORE_ERR_MAINCTL_LOW_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_MAINCTL_LOW 0x%x", val);
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val = __read_register(device, CVP_NOC_CORE_ERR_ERRVLD_LOW_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRVLD_LOW 0x%x", val);
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val = __read_register(device, CVP_NOC_CORE_ERR_ERRCLR_LOW_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRCLR_LOW 0x%x", val);
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val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_LOW_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_LOW 0x%x", val);
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val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG0_HIGH_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG0_HIGH 0x%x", val);
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val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_LOW_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_LOW 0x%x", val);
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val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG1_HIGH_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG1_HIGH 0x%x", val);
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val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_LOW_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_LOW 0x%x", val);
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val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG2_HIGH_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG2_HIGH 0x%x", val);
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val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_LOW_OFFS);
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dprintk(CVP_ERR, "CORE ERRLOG3_LOW 0x%x, below details", val);
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__print_reg_details(val);
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val = __read_register(device, CVP_NOC_CORE_ERR_ERRLOG3_HIGH_OFFS);
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dprintk(CVP_ERR, "CVP_NOC_CORE_ERL_MAIN_ERRLOG3_HIGH 0x%x", val);
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__write_register(device, CVP_NOC_CORE_ERR_ERRCLR_LOW_OFFS, 0x1);
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call_iris_op(device, reset_control_release_name, device, "cvp_xo_reset");
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if (msm_cvp_fw_low_power_mode) {
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iris_hfi_for_each_regulator(device, rinfo) {
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if (strcmp(rinfo->name, "cvp-core"))
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continue;
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rc = __hand_off_regulator(rinfo);
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}
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}
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__write_register(device, CVP_WRAPPER_CORE_CLOCK_CONFIG, config);
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}
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@@ -195,6 +195,8 @@
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#define CVP_NOC_ERR_ERRLOG2_HIGH_OFFS (CVP_NOC_BASE_OFFS + 0x34)
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#define CVP_NOC_ERR_ERRLOG3_LOW_OFFS (CVP_NOC_BASE_OFFS + 0x38)
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#define CVP_NOC_ERR_ERRLOG3_HIGH_OFFS (CVP_NOC_BASE_OFFS + 0x3C)
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#define CVP_NOC_SBM_FAULTINEN0_LOW (CVP_NOC_BASE_OFFS + 0x240)
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#define CVP_NOC_SBM_FAULTINSTATUS0_LOW (CVP_NOC_BASE_OFFS + 0x248)
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#define CVP_NOC_SBM_SENSELN0_LOW (CVP_NOC_BASE_OFFS + 0x300)
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#define CVP_NOC_CORE_BASE_OFFS 0x00010000
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@@ -308,6 +308,7 @@ static int cvp_fence_proc(struct msm_cvp_inst *inst,
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struct cvp_session_queue *sq;
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u32 hfi_err = HFI_ERR_NONE;
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struct cvp_hfi_msg_session_hdr_ext hdr;
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struct iris_hfi_device *device;
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dprintk(CVP_SYNX, "%s %s\n", current->comm, __func__);
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@@ -354,6 +355,12 @@ static int cvp_fence_proc(struct msm_cvp_inst *inst,
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dprintk(CVP_INFO, "%s %s: cvp_wait_process_msg non-fatal %d\n",
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current->comm, __func__, hfi_err);
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synx_state = SYNX_STATE_SIGNALED_SUCCESS;
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} else if (hfi_err == HFI_ERR_SESSION_HW_HANG_DETECTED) {
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dprintk(CVP_ERR, "%s %s: cvp_wait_process_message hfi HW hang err %d\n",
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current->comm, __func__, hfi_err);
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synx_state = SYNX_STATE_SIGNALED_CANCEL;
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device = ops_tbl->hfi_device_data;
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cvp_dump_csr(device);
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} else if (hfi_err != HFI_ERR_NONE) {
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dprintk(CVP_ERR, "%s %s: cvp_wait_process_message hfi err %d\n",
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current->comm, __func__, hfi_err);
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@@ -542,6 +542,7 @@ static void handle_session_error(enum hal_command_response cmd, void *data)
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response->status, inst, hash32_ptr(inst->session));
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cvp_print_inst(CVP_WARN, inst);
|
||||
|
||||
print_hfi_queue_info(ops_tbl);
|
||||
//if (inst->state != MSM_CVP_CORE_INVALID) {
|
||||
// change_cvp_inst_state(inst, MSM_CVP_CORE_INVALID);
|
||||
// if (cvp_clean_session_queues(inst))
|
||||
|
||||
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