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@@ -1065,6 +1065,7 @@ static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
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uint32_t last_bank_size = 0;
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uint32_t entry_size, num_entries;
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int i;
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+ uint32_t desc_id = 0;
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/* Only Tx queue descriptors are allocated from common link descriptor
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* pool Rx queue descriptors are not included in this because (REO queue
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@@ -1195,8 +1196,10 @@ static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
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while (num_entries && (desc = hal_srng_src_get_next(
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soc->hal_soc,
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soc->wbm_idle_link_ring.hal_srng))) {
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- hal_set_link_desc_addr(desc, i, paddr);
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+ hal_set_link_desc_addr(desc,
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+ LINK_DESC_COOKIE(desc_id, i), paddr);
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num_entries--;
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+ desc_id++;
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paddr += link_desc_size;
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}
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}
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@@ -1249,14 +1252,12 @@ static int dp_hw_link_desc_pool_setup(struct dp_soc *soc)
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/ link_desc_size;
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unsigned long paddr = (unsigned long)(
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soc->link_desc_banks[i].base_paddr);
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- void *desc = NULL;
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- while (num_link_descs && (desc =
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- hal_srng_src_get_next(soc->hal_soc,
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- soc->wbm_idle_link_ring.hal_srng))) {
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+ while (num_link_descs) {
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hal_set_link_desc_addr((void *)scatter_buf_ptr,
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- i, paddr);
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+ LINK_DESC_COOKIE(desc_id, i), paddr);
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num_link_descs--;
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+ desc_id++;
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paddr += link_desc_size;
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if (rem_entries) {
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rem_entries--;
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