qcacmn: optimize code for register read/write
Optimize code for checking flag which indicates srngs initialization during register read/write. Change-Id: I6e3d2446b1df7214aaa90483046524c7cc01533f CRs-Fixed: 3670754
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@@ -316,9 +316,9 @@ static inline QDF_STATUS hal_write32_mb_confirm(struct hal_soc *hal_soc,
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static inline void hal_write32_mb(struct hal_soc *hal_soc, uint32_t offset,
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uint32_t value)
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{
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int ret;
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unsigned long flags;
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qdf_iomem_t new_addr;
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bool init_phase;
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if (!TARGET_ACCESS_ALLOWED(HIF_GET_SOFTC(
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hal_soc->hif_handle))) {
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@@ -332,14 +332,13 @@ static inline void hal_write32_mb(struct hal_soc *hal_soc, uint32_t offset,
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return;
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}
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init_phase = hal_soc->init_phase;
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/* Region greater than BAR + 4K */
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if (!hal_soc->init_phase) {
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ret = hif_force_wake_request(hal_soc->hif_handle);
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if (ret) {
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hal_err_rl("Wake up request failed");
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qdf_check_state_before_panic(__func__, __LINE__);
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return;
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}
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if (!init_phase && hif_force_wake_request(hal_soc->hif_handle)) {
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hal_err_rl("Wake up request failed");
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qdf_check_state_before_panic(__func__, __LINE__);
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return;
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}
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if (!hal_soc->use_register_windowing ||
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@@ -358,13 +357,10 @@ static inline void hal_write32_mb(struct hal_soc *hal_soc, uint32_t offset,
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hal_unlock_reg_access(hal_soc, &flags);
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}
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if (!hal_soc->init_phase) {
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ret = hif_force_wake_release(hal_soc->hif_handle);
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if (ret) {
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hal_err("Wake up release failed");
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qdf_check_state_before_panic(__func__, __LINE__);
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return;
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}
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if (!init_phase && hif_force_wake_release(hal_soc->hif_handle)) {
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hal_err("Wake up release failed");
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qdf_check_state_before_panic(__func__, __LINE__);
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return;
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}
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}
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@@ -380,10 +376,10 @@ static inline QDF_STATUS hal_write32_mb_confirm(struct hal_soc *hal_soc,
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uint32_t offset,
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uint32_t value)
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{
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int ret;
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unsigned long flags;
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qdf_iomem_t new_addr;
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QDF_STATUS status = QDF_STATUS_E_FAILURE;
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bool init_phase;
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if (!TARGET_ACCESS_ALLOWED(HIF_GET_SOFTC(
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hal_soc->hif_handle))) {
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@@ -397,14 +393,13 @@ static inline QDF_STATUS hal_write32_mb_confirm(struct hal_soc *hal_soc,
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return QDF_STATUS_E_NOSUPPORT;
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}
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init_phase = hal_soc->init_phase;
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/* Region greater than BAR + 4K */
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if (!hal_soc->init_phase) {
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ret = hif_force_wake_request(hal_soc->hif_handle);
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if (ret) {
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hal_err("Wake up request failed");
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qdf_check_state_before_panic(__func__, __LINE__);
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return status;
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}
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if (!init_phase && hif_force_wake_request(hal_soc->hif_handle)) {
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hal_err("Wake up request failed");
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qdf_check_state_before_panic(__func__, __LINE__);
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return status;
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}
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if (!hal_soc->use_register_windowing ||
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@@ -434,13 +429,10 @@ static inline QDF_STATUS hal_write32_mb_confirm(struct hal_soc *hal_soc,
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hal_unlock_reg_access(hal_soc, &flags);
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}
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if (!hal_soc->init_phase) {
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ret = hif_force_wake_release(hal_soc->hif_handle);
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if (ret) {
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hal_err("Wake up release failed");
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qdf_check_state_before_panic(__func__, __LINE__);
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return QDF_STATUS_E_INVAL;
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}
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if (!init_phase && hif_force_wake_release(hal_soc->hif_handle)) {
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hal_err("Wake up release failed");
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qdf_check_state_before_panic(__func__, __LINE__);
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return QDF_STATUS_E_INVAL;
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}
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return status;
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@@ -589,6 +581,7 @@ uint32_t hal_read32_mb(struct hal_soc *hal_soc, uint32_t offset)
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uint32_t ret;
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unsigned long flags;
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qdf_iomem_t new_addr;
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bool init_phase;
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if (!TARGET_ACCESS_ALLOWED(HIF_GET_SOFTC(
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hal_soc->hif_handle))) {
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@@ -600,8 +593,8 @@ uint32_t hal_read32_mb(struct hal_soc *hal_soc, uint32_t offset)
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if (offset < MAPPED_REF_OFF)
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return qdf_ioread32(hal_soc->dev_base_addr + offset);
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if ((!hal_soc->init_phase) &&
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hif_force_wake_request(hal_soc->hif_handle)) {
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init_phase = hal_soc->init_phase;
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if (!init_phase && hif_force_wake_request(hal_soc->hif_handle)) {
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hal_err("Wake up request failed");
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qdf_check_state_before_panic(__func__, __LINE__);
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return 0;
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@@ -623,8 +616,7 @@ uint32_t hal_read32_mb(struct hal_soc *hal_soc, uint32_t offset)
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hal_unlock_reg_access(hal_soc, &flags);
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}
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if ((!hal_soc->init_phase) &&
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hif_force_wake_release(hal_soc->hif_handle)) {
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if (!init_phase && hif_force_wake_release(hal_soc->hif_handle)) {
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hal_err("Wake up release failed");
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qdf_check_state_before_panic(__func__, __LINE__);
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return 0;
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