fw-api: Add required header files to bring fw-api project

Add header files under qca8074 to make fw-api project
compatible to host

Change-Id: Ia277e4e1e0e231ff87bca175a9f872ad0ae8528d
This commit is contained in:
Akshay Kosigi
2018-08-16 22:43:59 +05:30
gecommit door nshrivas
bovenliggende 81eea6104b
commit db3db0940b
28 gewijzigde bestanden met toevoegingen van 9057 en 0 verwijderingen

Bestand weergeven

@@ -0,0 +1,652 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _HE_SIG_A_MU_DL_INFO_H_
#define _HE_SIG_A_MU_DL_INFO_H_
#if !defined(__ASSEMBLER__)
#endif
// ################ START SUMMARY #################
//
// Dword Fields
// 0 dl_ul_flag[0], mcs_of_sig_b[3:1], dcm_of_sig_b[4], bss_color_id[10:5], spatial_reuse[14:11], transmit_bw[17:15], num_sig_b_symbols[21:18], comp_mode_sig_b[22], cp_ltf_size[24:23], doppler_indication[25], reserved_0a[31:26]
// 1 txop_duration[6:0], reserved_1a[7], num_ltf_symbols[10:8], ldpc_extra_symbol[11], stbc[12], packet_extension_a_factor[14:13], packet_extension_pe_disambiguity[15], crc[19:16], tail[25:20], reserved_1b[31:26]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_HE_SIG_A_MU_DL_INFO 2
struct he_sig_a_mu_dl_info {
uint32_t dl_ul_flag : 1, //[0]
mcs_of_sig_b : 3, //[3:1]
dcm_of_sig_b : 1, //[4]
bss_color_id : 6, //[10:5]
spatial_reuse : 4, //[14:11]
transmit_bw : 3, //[17:15]
num_sig_b_symbols : 4, //[21:18]
comp_mode_sig_b : 1, //[22]
cp_ltf_size : 2, //[24:23]
doppler_indication : 1, //[25]
reserved_0a : 6; //[31:26]
uint32_t txop_duration : 7, //[6:0]
reserved_1a : 1, //[7]
num_ltf_symbols : 3, //[10:8]
ldpc_extra_symbol : 1, //[11]
stbc : 1, //[12]
packet_extension_a_factor : 2, //[14:13]
packet_extension_pe_disambiguity: 1, //[15]
crc : 4, //[19:16]
tail : 6, //[25:20]
reserved_1b : 6; //[31:26]
};
/*
dl_ul_flag
Differentiates between DL and UL transmission
<enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
<enum 1 DL_UL_FLAG_IS_UL>
<legal all>
mcs_of_sig_b
Indicates the MCS of HE-SIG-B
<legal 0-5>
dcm_of_sig_b
Indicates whether dual sub-carrier modulation is applied
to HE-SIG-B
0: No DCM for HE_SIG_B
1: DCM for HE_SIG_B
<legal all>
bss_color_id
BSS color ID
Field Used by MAC HW
<legal all>
spatial_reuse
Spatial reuse
For 20MHz one SR field corresponding to entire 20MHz
(other 3 fields indicate identical values)
For 40MHz two SR fields for each 20MHz (other 2 fields
indicate identical values)
For 80MHz four SR fields for each 20MHz
For 160MHz four SR fields for each 40MHz
<legal all>
transmit_bw
Bandwidth of the PPDU.
<enum 0 HE_SIG_A_MU_DL_BW20> 20 Mhz
<enum 1 HE_SIG_A_MU_DL_BW40> 40 Mhz
<enum 2 HE_SIG_A_MU_DL_BW80> 80 Mhz
<enum 3 HE_SIG_A_MU_DL_BW160> 160 MHz or 80+80 MHz
NOTE: Other e-nums might be added for channel bonding
On RX side, Field Used by MAC HW
<legal 0-3>
num_sig_b_symbols
Number of symbols
For OFDMA, the actual number of symbols is 1 larger then
indicated in this field.
For MU-MIMO this is equal to the number of users - 1:
the following encoding is used:
1 => 2 users
2=> 3 users
Etc.
<legal all>
comp_mode_sig_b
Indicates the compression mode of HE-SIG-B
0: Regular [uncomp mode]
1: compressed mode (full-BW MU-MIMO only)
<legal all>
cp_ltf_size
Indicates the CP and HE-LTF type
<enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
<enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
<enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
<enum 3 FourX_LTF_3_2CP> 4x LTF + 3.2 µs CP
NOTE: for MU no proprietary modes (for now)
<legal all>
doppler_indication
0: No Doppler support
1: Doppler support
<legal all>
reserved_0a
<legal 0>
txop_duration
Indicates the remaining time in the current TXOP
Field Used by MAC HW
<legal all>
reserved_1a
Note: spec indicates this shall be set to 1
<legal 1>
num_ltf_symbols
Indicates the number of HE-LTF symbols
0: 1 symbol
1: 2 symbols
Etc.
<legal all>
ldpc_extra_symbol
If LDPC,
0: LDPC extra symbol not present
1: LDPC extra symbol present
Else
Set to 1
<legal all>
stbc
Indicates whether STBC is applied
0: No STBC
1: STBC
<legal all>
packet_extension_a_factor
the packet extension duration of the trigger-based PPDU
response with these two bits indicating the a-factor
<enum 0 a_factor_4>
<enum 1 a_factor_1>
<enum 2 a_factor_2>
<enum 3 a_factor_3>
<legal all>
packet_extension_pe_disambiguity
the packet extension duration of the trigger-based PPDU
response with this bit indicating the PE-Disambiguity
<legal all>
crc
CRC for HE-SIG-A contents.
<legal all>
tail
<legal 0>
reserved_1b
<legal 0>
*/
/* Description HE_SIG_A_MU_DL_INFO_0_DL_UL_FLAG
Differentiates between DL and UL transmission
<enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
<enum 1 DL_UL_FLAG_IS_UL>
<legal all>
*/
#define HE_SIG_A_MU_DL_INFO_0_DL_UL_FLAG_OFFSET 0x00000000
#define HE_SIG_A_MU_DL_INFO_0_DL_UL_FLAG_LSB 0
#define HE_SIG_A_MU_DL_INFO_0_DL_UL_FLAG_MASK 0x00000001
/* Description HE_SIG_A_MU_DL_INFO_0_MCS_OF_SIG_B
Indicates the MCS of HE-SIG-B
<legal 0-5>
*/
#define HE_SIG_A_MU_DL_INFO_0_MCS_OF_SIG_B_OFFSET 0x00000000
#define HE_SIG_A_MU_DL_INFO_0_MCS_OF_SIG_B_LSB 1
#define HE_SIG_A_MU_DL_INFO_0_MCS_OF_SIG_B_MASK 0x0000000e
/* Description HE_SIG_A_MU_DL_INFO_0_DCM_OF_SIG_B
Indicates whether dual sub-carrier modulation is applied
to HE-SIG-B
0: No DCM for HE_SIG_B
1: DCM for HE_SIG_B
<legal all>
*/
#define HE_SIG_A_MU_DL_INFO_0_DCM_OF_SIG_B_OFFSET 0x00000000
#define HE_SIG_A_MU_DL_INFO_0_DCM_OF_SIG_B_LSB 4
#define HE_SIG_A_MU_DL_INFO_0_DCM_OF_SIG_B_MASK 0x00000010
/* Description HE_SIG_A_MU_DL_INFO_0_BSS_COLOR_ID
BSS color ID
Field Used by MAC HW
<legal all>
*/
#define HE_SIG_A_MU_DL_INFO_0_BSS_COLOR_ID_OFFSET 0x00000000
#define HE_SIG_A_MU_DL_INFO_0_BSS_COLOR_ID_LSB 5
#define HE_SIG_A_MU_DL_INFO_0_BSS_COLOR_ID_MASK 0x000007e0
/* Description HE_SIG_A_MU_DL_INFO_0_SPATIAL_REUSE
Spatial reuse
For 20MHz one SR field corresponding to entire 20MHz
(other 3 fields indicate identical values)
For 40MHz two SR fields for each 20MHz (other 2 fields
indicate identical values)
For 80MHz four SR fields for each 20MHz
For 160MHz four SR fields for each 40MHz
<legal all>
*/
#define HE_SIG_A_MU_DL_INFO_0_SPATIAL_REUSE_OFFSET 0x00000000
#define HE_SIG_A_MU_DL_INFO_0_SPATIAL_REUSE_LSB 11
#define HE_SIG_A_MU_DL_INFO_0_SPATIAL_REUSE_MASK 0x00007800
/* Description HE_SIG_A_MU_DL_INFO_0_TRANSMIT_BW
Bandwidth of the PPDU.
<enum 0 HE_SIG_A_MU_DL_BW20> 20 Mhz
<enum 1 HE_SIG_A_MU_DL_BW40> 40 Mhz
<enum 2 HE_SIG_A_MU_DL_BW80> 80 Mhz
<enum 3 HE_SIG_A_MU_DL_BW160> 160 MHz or 80+80 MHz
NOTE: Other e-nums might be added for channel bonding
On RX side, Field Used by MAC HW
<legal 0-3>
*/
#define HE_SIG_A_MU_DL_INFO_0_TRANSMIT_BW_OFFSET 0x00000000
#define HE_SIG_A_MU_DL_INFO_0_TRANSMIT_BW_LSB 15
#define HE_SIG_A_MU_DL_INFO_0_TRANSMIT_BW_MASK 0x00038000
/* Description HE_SIG_A_MU_DL_INFO_0_NUM_SIG_B_SYMBOLS
Number of symbols
For OFDMA, the actual number of symbols is 1 larger then
indicated in this field.
For MU-MIMO this is equal to the number of users - 1:
the following encoding is used:
1 => 2 users
2=> 3 users
Etc.
<legal all>
*/
#define HE_SIG_A_MU_DL_INFO_0_NUM_SIG_B_SYMBOLS_OFFSET 0x00000000
#define HE_SIG_A_MU_DL_INFO_0_NUM_SIG_B_SYMBOLS_LSB 18
#define HE_SIG_A_MU_DL_INFO_0_NUM_SIG_B_SYMBOLS_MASK 0x003c0000
/* Description HE_SIG_A_MU_DL_INFO_0_COMP_MODE_SIG_B
Indicates the compression mode of HE-SIG-B
0: Regular [uncomp mode]
1: compressed mode (full-BW MU-MIMO only)
<legal all>
*/
#define HE_SIG_A_MU_DL_INFO_0_COMP_MODE_SIG_B_OFFSET 0x00000000
#define HE_SIG_A_MU_DL_INFO_0_COMP_MODE_SIG_B_LSB 22
#define HE_SIG_A_MU_DL_INFO_0_COMP_MODE_SIG_B_MASK 0x00400000
/* Description HE_SIG_A_MU_DL_INFO_0_CP_LTF_SIZE
Indicates the CP and HE-LTF type
<enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP
<enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP
<enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP
<enum 3 FourX_LTF_3_2CP> 4x LTF + 3.2 µs CP
NOTE: for MU no proprietary modes (for now)
<legal all>
*/
#define HE_SIG_A_MU_DL_INFO_0_CP_LTF_SIZE_OFFSET 0x00000000
#define HE_SIG_A_MU_DL_INFO_0_CP_LTF_SIZE_LSB 23
#define HE_SIG_A_MU_DL_INFO_0_CP_LTF_SIZE_MASK 0x01800000
/* Description HE_SIG_A_MU_DL_INFO_0_DOPPLER_INDICATION
0: No Doppler support
1: Doppler support
<legal all>
*/
#define HE_SIG_A_MU_DL_INFO_0_DOPPLER_INDICATION_OFFSET 0x00000000
#define HE_SIG_A_MU_DL_INFO_0_DOPPLER_INDICATION_LSB 25
#define HE_SIG_A_MU_DL_INFO_0_DOPPLER_INDICATION_MASK 0x02000000
/* Description HE_SIG_A_MU_DL_INFO_0_RESERVED_0A
<legal 0>
*/
#define HE_SIG_A_MU_DL_INFO_0_RESERVED_0A_OFFSET 0x00000000
#define HE_SIG_A_MU_DL_INFO_0_RESERVED_0A_LSB 26
#define HE_SIG_A_MU_DL_INFO_0_RESERVED_0A_MASK 0xfc000000
/* Description HE_SIG_A_MU_DL_INFO_1_TXOP_DURATION
Indicates the remaining time in the current TXOP
Field Used by MAC HW
<legal all>
*/
#define HE_SIG_A_MU_DL_INFO_1_TXOP_DURATION_OFFSET 0x00000004
#define HE_SIG_A_MU_DL_INFO_1_TXOP_DURATION_LSB 0
#define HE_SIG_A_MU_DL_INFO_1_TXOP_DURATION_MASK 0x0000007f
/* Description HE_SIG_A_MU_DL_INFO_1_RESERVED_1A
Note: spec indicates this shall be set to 1
<legal 1>
*/
#define HE_SIG_A_MU_DL_INFO_1_RESERVED_1A_OFFSET 0x00000004
#define HE_SIG_A_MU_DL_INFO_1_RESERVED_1A_LSB 7
#define HE_SIG_A_MU_DL_INFO_1_RESERVED_1A_MASK 0x00000080
/* Description HE_SIG_A_MU_DL_INFO_1_NUM_LTF_SYMBOLS
Indicates the number of HE-LTF symbols
0: 1 symbol
1: 2 symbols
Etc.
<legal all>
*/
#define HE_SIG_A_MU_DL_INFO_1_NUM_LTF_SYMBOLS_OFFSET 0x00000004
#define HE_SIG_A_MU_DL_INFO_1_NUM_LTF_SYMBOLS_LSB 8
#define HE_SIG_A_MU_DL_INFO_1_NUM_LTF_SYMBOLS_MASK 0x00000700
/* Description HE_SIG_A_MU_DL_INFO_1_LDPC_EXTRA_SYMBOL
If LDPC,
0: LDPC extra symbol not present
1: LDPC extra symbol present
Else
Set to 1
<legal all>
*/
#define HE_SIG_A_MU_DL_INFO_1_LDPC_EXTRA_SYMBOL_OFFSET 0x00000004
#define HE_SIG_A_MU_DL_INFO_1_LDPC_EXTRA_SYMBOL_LSB 11
#define HE_SIG_A_MU_DL_INFO_1_LDPC_EXTRA_SYMBOL_MASK 0x00000800
/* Description HE_SIG_A_MU_DL_INFO_1_STBC
Indicates whether STBC is applied
0: No STBC
1: STBC
<legal all>
*/
#define HE_SIG_A_MU_DL_INFO_1_STBC_OFFSET 0x00000004
#define HE_SIG_A_MU_DL_INFO_1_STBC_LSB 12
#define HE_SIG_A_MU_DL_INFO_1_STBC_MASK 0x00001000
/* Description HE_SIG_A_MU_DL_INFO_1_PACKET_EXTENSION_A_FACTOR
the packet extension duration of the trigger-based PPDU
response with these two bits indicating the a-factor
<enum 0 a_factor_4>
<enum 1 a_factor_1>
<enum 2 a_factor_2>
<enum 3 a_factor_3>
<legal all>
*/
#define HE_SIG_A_MU_DL_INFO_1_PACKET_EXTENSION_A_FACTOR_OFFSET 0x00000004
#define HE_SIG_A_MU_DL_INFO_1_PACKET_EXTENSION_A_FACTOR_LSB 13
#define HE_SIG_A_MU_DL_INFO_1_PACKET_EXTENSION_A_FACTOR_MASK 0x00006000
/* Description HE_SIG_A_MU_DL_INFO_1_PACKET_EXTENSION_PE_DISAMBIGUITY
the packet extension duration of the trigger-based PPDU
response with this bit indicating the PE-Disambiguity
<legal all>
*/
#define HE_SIG_A_MU_DL_INFO_1_PACKET_EXTENSION_PE_DISAMBIGUITY_OFFSET 0x00000004
#define HE_SIG_A_MU_DL_INFO_1_PACKET_EXTENSION_PE_DISAMBIGUITY_LSB 15
#define HE_SIG_A_MU_DL_INFO_1_PACKET_EXTENSION_PE_DISAMBIGUITY_MASK 0x00008000
/* Description HE_SIG_A_MU_DL_INFO_1_CRC
CRC for HE-SIG-A contents.
<legal all>
*/
#define HE_SIG_A_MU_DL_INFO_1_CRC_OFFSET 0x00000004
#define HE_SIG_A_MU_DL_INFO_1_CRC_LSB 16
#define HE_SIG_A_MU_DL_INFO_1_CRC_MASK 0x000f0000
/* Description HE_SIG_A_MU_DL_INFO_1_TAIL
<legal 0>
*/
#define HE_SIG_A_MU_DL_INFO_1_TAIL_OFFSET 0x00000004
#define HE_SIG_A_MU_DL_INFO_1_TAIL_LSB 20
#define HE_SIG_A_MU_DL_INFO_1_TAIL_MASK 0x03f00000
/* Description HE_SIG_A_MU_DL_INFO_1_RESERVED_1B
<legal 0>
*/
#define HE_SIG_A_MU_DL_INFO_1_RESERVED_1B_OFFSET 0x00000004
#define HE_SIG_A_MU_DL_INFO_1_RESERVED_1B_LSB 26
#define HE_SIG_A_MU_DL_INFO_1_RESERVED_1B_MASK 0xfc000000
#endif // _HE_SIG_A_MU_DL_INFO_H_

Bestand weergeven

@@ -0,0 +1,274 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _HE_SIG_A_MU_UL_INFO_H_
#define _HE_SIG_A_MU_UL_INFO_H_
#if !defined(__ASSEMBLER__)
#endif
// ################ START SUMMARY #################
//
// Dword Fields
// 0 format_indication[0], bss_color_id[6:1], spatial_reuse[22:7], reserved_0a[23], transmit_bw[25:24], reserved_0b[31:26]
// 1 txop_duration[6:0], reserved_1a[15:7], crc[19:16], tail[25:20], reserved_1b[31:26]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_HE_SIG_A_MU_UL_INFO 2
struct he_sig_a_mu_ul_info {
uint32_t format_indication : 1, //[0]
bss_color_id : 6, //[6:1]
spatial_reuse : 16, //[22:7]
reserved_0a : 1, //[23]
transmit_bw : 2, //[25:24]
reserved_0b : 6; //[31:26]
uint32_t txop_duration : 7, //[6:0]
reserved_1a : 9, //[15:7]
crc : 4, //[19:16]
tail : 6, //[25:20]
reserved_1b : 6; //[31:26]
};
/*
format_indication
Indicates whether the transmission is SU PPDU or a
trigger based UL MU PDDU
<enum 0 HE_SIGA_FORMAT_HE_TRIG>
<enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU>
<legal all>
bss_color_id
BSS color ID
<legal all>
spatial_reuse
Spatial reuse
<legal all>
reserved_0a
Note: spec indicates this shall be set to 1
<legal 1>
transmit_bw
Bandwidth of the PPDU.
<enum 0 HE_SIG_A_MU_UL_BW20> 20 Mhz
<enum 1 HE_SIG_A_MU_UL_BW40> 40 Mhz
<enum 2 HE_SIG_A_MU_UL_BW80> 80 Mhz
<enum 3 HE_SIG_A_MU_UL_BW160> 160 MHz or 80+80 MHz
On RX side, Field Used by MAC HW
<legal 0-3>
reserved_0b
<legal 0>
txop_duration
Indicates the remaining time in the current TXOP <legal
all>
reserved_1a
Note: spec indicates every bit shall be set to 1
<legal 255>
crc
CRC for HE-SIG-A contents.
This CRC may also cover some fields of L-SIG (TBD)
<legal all>
tail
BCC encoding (similar to VHT-SIG-A) with 6 tail bits is
used
<legal 0>
reserved_1b
<legal 0>
*/
/* Description HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION
Indicates whether the transmission is SU PPDU or a
trigger based UL MU PDDU
<enum 0 HE_SIGA_FORMAT_HE_TRIG>
<enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU>
<legal all>
*/
#define HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION_OFFSET 0x00000000
#define HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION_LSB 0
#define HE_SIG_A_MU_UL_INFO_0_FORMAT_INDICATION_MASK 0x00000001
/* Description HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID
BSS color ID
<legal all>
*/
#define HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID_OFFSET 0x00000000
#define HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID_LSB 1
#define HE_SIG_A_MU_UL_INFO_0_BSS_COLOR_ID_MASK 0x0000007e
/* Description HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE
Spatial reuse
<legal all>
*/
#define HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE_OFFSET 0x00000000
#define HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE_LSB 7
#define HE_SIG_A_MU_UL_INFO_0_SPATIAL_REUSE_MASK 0x007fff80
/* Description HE_SIG_A_MU_UL_INFO_0_RESERVED_0A
Note: spec indicates this shall be set to 1
<legal 1>
*/
#define HE_SIG_A_MU_UL_INFO_0_RESERVED_0A_OFFSET 0x00000000
#define HE_SIG_A_MU_UL_INFO_0_RESERVED_0A_LSB 23
#define HE_SIG_A_MU_UL_INFO_0_RESERVED_0A_MASK 0x00800000
/* Description HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW
Bandwidth of the PPDU.
<enum 0 HE_SIG_A_MU_UL_BW20> 20 Mhz
<enum 1 HE_SIG_A_MU_UL_BW40> 40 Mhz
<enum 2 HE_SIG_A_MU_UL_BW80> 80 Mhz
<enum 3 HE_SIG_A_MU_UL_BW160> 160 MHz or 80+80 MHz
On RX side, Field Used by MAC HW
<legal 0-3>
*/
#define HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW_OFFSET 0x00000000
#define HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW_LSB 24
#define HE_SIG_A_MU_UL_INFO_0_TRANSMIT_BW_MASK 0x03000000
/* Description HE_SIG_A_MU_UL_INFO_0_RESERVED_0B
<legal 0>
*/
#define HE_SIG_A_MU_UL_INFO_0_RESERVED_0B_OFFSET 0x00000000
#define HE_SIG_A_MU_UL_INFO_0_RESERVED_0B_LSB 26
#define HE_SIG_A_MU_UL_INFO_0_RESERVED_0B_MASK 0xfc000000
/* Description HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION
Indicates the remaining time in the current TXOP <legal
all>
*/
#define HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION_OFFSET 0x00000004
#define HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION_LSB 0
#define HE_SIG_A_MU_UL_INFO_1_TXOP_DURATION_MASK 0x0000007f
/* Description HE_SIG_A_MU_UL_INFO_1_RESERVED_1A
Note: spec indicates every bit shall be set to 1
<legal 255>
*/
#define HE_SIG_A_MU_UL_INFO_1_RESERVED_1A_OFFSET 0x00000004
#define HE_SIG_A_MU_UL_INFO_1_RESERVED_1A_LSB 7
#define HE_SIG_A_MU_UL_INFO_1_RESERVED_1A_MASK 0x0000ff80
/* Description HE_SIG_A_MU_UL_INFO_1_CRC
CRC for HE-SIG-A contents.
This CRC may also cover some fields of L-SIG (TBD)
<legal all>
*/
#define HE_SIG_A_MU_UL_INFO_1_CRC_OFFSET 0x00000004
#define HE_SIG_A_MU_UL_INFO_1_CRC_LSB 16
#define HE_SIG_A_MU_UL_INFO_1_CRC_MASK 0x000f0000
/* Description HE_SIG_A_MU_UL_INFO_1_TAIL
BCC encoding (similar to VHT-SIG-A) with 6 tail bits is
used
<legal 0>
*/
#define HE_SIG_A_MU_UL_INFO_1_TAIL_OFFSET 0x00000004
#define HE_SIG_A_MU_UL_INFO_1_TAIL_LSB 20
#define HE_SIG_A_MU_UL_INFO_1_TAIL_MASK 0x03f00000
/* Description HE_SIG_A_MU_UL_INFO_1_RESERVED_1B
<legal 0>
*/
#define HE_SIG_A_MU_UL_INFO_1_RESERVED_1B_OFFSET 0x00000004
#define HE_SIG_A_MU_UL_INFO_1_RESERVED_1B_LSB 26
#define HE_SIG_A_MU_UL_INFO_1_RESERVED_1B_MASK 0xfc000000
#endif // _HE_SIG_A_MU_UL_INFO_H_

Bestand weergeven

@@ -0,0 +1,849 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _HE_SIG_A_SU_INFO_H_
#define _HE_SIG_A_SU_INFO_H_
#if !defined(__ASSEMBLER__)
#endif
// ################ START SUMMARY #################
//
// Dword Fields
// 0 format_indication[0], beam_change[1], dl_ul_flag[2], transmit_mcs[6:3], dcm[7], bss_color_id[13:8], reserved_0a[14], spatial_reuse[18:15], transmit_bw[20:19], cp_ltf_size[22:21], nsts[25:23], reserved_0b[31:26]
// 1 txop_duration[6:0], coding[7], ldpc_extra_symbol[8], stbc[9], txbf[10], packet_extension_a_factor[12:11], packet_extension_pe_disambiguity[13], reserved_1a[14], doppler_indication[15], crc[19:16], tail[25:20], dot11ax_su_extended[26], dot11ax_ext_ru_size[30:27], rx_ndp[31]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_HE_SIG_A_SU_INFO 2
struct he_sig_a_su_info {
uint32_t format_indication : 1, //[0]
beam_change : 1, //[1]
dl_ul_flag : 1, //[2]
transmit_mcs : 4, //[6:3]
dcm : 1, //[7]
bss_color_id : 6, //[13:8]
reserved_0a : 1, //[14]
spatial_reuse : 4, //[18:15]
transmit_bw : 2, //[20:19]
cp_ltf_size : 2, //[22:21]
nsts : 3, //[25:23]
reserved_0b : 6; //[31:26]
uint32_t txop_duration : 7, //[6:0]
coding : 1, //[7]
ldpc_extra_symbol : 1, //[8]
stbc : 1, //[9]
txbf : 1, //[10]
packet_extension_a_factor : 2, //[12:11]
packet_extension_pe_disambiguity: 1, //[13]
reserved_1a : 1, //[14]
doppler_indication : 1, //[15]
crc : 4, //[19:16]
tail : 6, //[25:20]
dot11ax_su_extended : 1, //[26]
dot11ax_ext_ru_size : 4, //[30:27]
rx_ndp : 1; //[31]
};
/*
format_indication
<enum 0 HE_SIGA_FORMAT_HE_TRIG>
<enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU>
<legal all>
beam_change
Indicates whether spatial mapping is changed between
legacy and HE portion of preamble. If not, channel
estimation can include legacy preamble to improve accuracy
<legal all>
dl_ul_flag
Differentiates between DL and UL transmission
<enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
<enum 1 DL_UL_FLAG_IS_UL>
<legal all>
transmit_mcs
Indicates the data MCS
Field Used by MAC HW
<legal all>
dcm
0: No DCM
1:DCM
<legal all>
bss_color_id
BSS color ID
Field Used by MAC HW
<legal all>
reserved_0a
Note: spec indicates this shall be set to 1
<legal 1>
spatial_reuse
Spatial reuse
For 20MHz one SR field corresponding to entire 20MHz
(other 3 fields indicate identical values)
For 40MHz two SR fields for each 20MHz (other 2 fields
indicate identical values)
For 80MHz four SR fields for each 20MHz
For 160MHz four SR fields for each 40MHz
<legal all>
transmit_bw
Bandwidth of the PPDU.
For HE SU PPDU
<enum 0 HE_SIG_A_BW20> 20 Mhz
<enum 1 HE_SIG_A_BW40> 40 Mhz
<enum 2 HE_SIG_A_BW80> 80 Mhz
<enum 3 HE_SIG_A_BW160> 160 MHz or 80+80 MHz
For HE Extended Range SU PPDU
Set to 0 for 242-tone RU
Set to 1 for right 106-tone RU within the primary 20 MHz
On RX side, Field Used by MAC HW
<legal all>
cp_ltf_size
Indicates the CP and HE-LTF type
<enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP (See note for
proprietary mode)
<enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP (See note
for proprietary mode)
<enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP (See note
for proprietary mode)
<enum 3 FourX_LTF_3_2CP> 4x LTF + 3.2 µs CP (See note
for proprietary mode)
NOTE:
For QC proprietary mode
If ( DCM == 1 ) and ( MCS > 0 )
0 = 1xLTF + 0.4 usec
1 = 2xLTF + 0.4 usec
2~3 = Reserved
<legal all>
nsts
For HE SU PPDU
For HE Extended Range PPDU
<legal all>
reserved_0b
<legal 0>
txop_duration
Indicates the remaining time in the current TXOP
Field Used by MAC HW
<legal all>
coding
Distinguishes between BCC and LDPC coding.
0: BCC
1: LDPC
<legal all>
ldpc_extra_symbol
If LDPC,
0: LDPC extra symbol not present
1: LDPC extra symbol present
Else
Set to 1
<legal all>
stbc
Indicates whether STBC is applied
0: No STBC
1: STBC
<legal all>
txbf
Indicates whether beamforming is applied
0: No beamforming
1: beamforming
<legal all>
packet_extension_a_factor
Common trigger info
the packet extension duration of the trigger-based PPDU
response with these two bits indicating the a-factor
<enum 0 a_factor_4>
<enum 1 a_factor_1>
<enum 2 a_factor_2>
<enum 3 a_factor_3>
<legal all>
packet_extension_pe_disambiguity
Common trigger info
the packet extension duration of the trigger-based PPDU
response with this bit indicating the PE-Disambiguity
<legal all>
reserved_1a
Note: per standard, set to 1
<legal 1>
doppler_indication
0: No Doppler support
1: Doppler support
<legal all>
crc
CRC for HE-SIG-A contents.
<legal all>
tail
<legal 0>
dot11ax_su_extended
TX side:
Set to 0
RX side:
On RX side, evaluated by MAC HW. This is the only way
for MAC RX to know that this was an HE_SIG_A_SU received in
'extended' format
<legal all>
dot11ax_ext_ru_size
TX side:
Set to 0
RX side:
Field only contains valid info when dot11ax_su_extended
is set.
On RX side, evaluated by MAC HW. This is the only way
for MAC RX to know what the number of based RUs was in this
extended range reception. It is used by the MAC to determine
the RU size for the response...
<legal all>
rx_ndp
TX side:
Set to 0
RX side:Valid on RX side only, and looked at by MAC HW
When set, PHY has received (expected) NDP frame
<legal all>
*/
/* Description HE_SIG_A_SU_INFO_0_FORMAT_INDICATION
<enum 0 HE_SIGA_FORMAT_HE_TRIG>
<enum 1 HE_SIGA_FORMAT_SU_OR_EXT_SU>
<legal all>
*/
#define HE_SIG_A_SU_INFO_0_FORMAT_INDICATION_OFFSET 0x00000000
#define HE_SIG_A_SU_INFO_0_FORMAT_INDICATION_LSB 0
#define HE_SIG_A_SU_INFO_0_FORMAT_INDICATION_MASK 0x00000001
/* Description HE_SIG_A_SU_INFO_0_BEAM_CHANGE
Indicates whether spatial mapping is changed between
legacy and HE portion of preamble. If not, channel
estimation can include legacy preamble to improve accuracy
<legal all>
*/
#define HE_SIG_A_SU_INFO_0_BEAM_CHANGE_OFFSET 0x00000000
#define HE_SIG_A_SU_INFO_0_BEAM_CHANGE_LSB 1
#define HE_SIG_A_SU_INFO_0_BEAM_CHANGE_MASK 0x00000002
/* Description HE_SIG_A_SU_INFO_0_DL_UL_FLAG
Differentiates between DL and UL transmission
<enum 0 DL_UL_FLAG_IS_DL_OR_TDLS>
<enum 1 DL_UL_FLAG_IS_UL>
<legal all>
*/
#define HE_SIG_A_SU_INFO_0_DL_UL_FLAG_OFFSET 0x00000000
#define HE_SIG_A_SU_INFO_0_DL_UL_FLAG_LSB 2
#define HE_SIG_A_SU_INFO_0_DL_UL_FLAG_MASK 0x00000004
/* Description HE_SIG_A_SU_INFO_0_TRANSMIT_MCS
Indicates the data MCS
Field Used by MAC HW
<legal all>
*/
#define HE_SIG_A_SU_INFO_0_TRANSMIT_MCS_OFFSET 0x00000000
#define HE_SIG_A_SU_INFO_0_TRANSMIT_MCS_LSB 3
#define HE_SIG_A_SU_INFO_0_TRANSMIT_MCS_MASK 0x00000078
/* Description HE_SIG_A_SU_INFO_0_DCM
0: No DCM
1:DCM
<legal all>
*/
#define HE_SIG_A_SU_INFO_0_DCM_OFFSET 0x00000000
#define HE_SIG_A_SU_INFO_0_DCM_LSB 7
#define HE_SIG_A_SU_INFO_0_DCM_MASK 0x00000080
/* Description HE_SIG_A_SU_INFO_0_BSS_COLOR_ID
BSS color ID
Field Used by MAC HW
<legal all>
*/
#define HE_SIG_A_SU_INFO_0_BSS_COLOR_ID_OFFSET 0x00000000
#define HE_SIG_A_SU_INFO_0_BSS_COLOR_ID_LSB 8
#define HE_SIG_A_SU_INFO_0_BSS_COLOR_ID_MASK 0x00003f00
/* Description HE_SIG_A_SU_INFO_0_RESERVED_0A
Note: spec indicates this shall be set to 1
<legal 1>
*/
#define HE_SIG_A_SU_INFO_0_RESERVED_0A_OFFSET 0x00000000
#define HE_SIG_A_SU_INFO_0_RESERVED_0A_LSB 14
#define HE_SIG_A_SU_INFO_0_RESERVED_0A_MASK 0x00004000
/* Description HE_SIG_A_SU_INFO_0_SPATIAL_REUSE
Spatial reuse
For 20MHz one SR field corresponding to entire 20MHz
(other 3 fields indicate identical values)
For 40MHz two SR fields for each 20MHz (other 2 fields
indicate identical values)
For 80MHz four SR fields for each 20MHz
For 160MHz four SR fields for each 40MHz
<legal all>
*/
#define HE_SIG_A_SU_INFO_0_SPATIAL_REUSE_OFFSET 0x00000000
#define HE_SIG_A_SU_INFO_0_SPATIAL_REUSE_LSB 15
#define HE_SIG_A_SU_INFO_0_SPATIAL_REUSE_MASK 0x00078000
/* Description HE_SIG_A_SU_INFO_0_TRANSMIT_BW
Bandwidth of the PPDU.
For HE SU PPDU
<enum 0 HE_SIG_A_BW20> 20 Mhz
<enum 1 HE_SIG_A_BW40> 40 Mhz
<enum 2 HE_SIG_A_BW80> 80 Mhz
<enum 3 HE_SIG_A_BW160> 160 MHz or 80+80 MHz
For HE Extended Range SU PPDU
Set to 0 for 242-tone RU
Set to 1 for right 106-tone RU within the primary 20 MHz
On RX side, Field Used by MAC HW
<legal all>
*/
#define HE_SIG_A_SU_INFO_0_TRANSMIT_BW_OFFSET 0x00000000
#define HE_SIG_A_SU_INFO_0_TRANSMIT_BW_LSB 19
#define HE_SIG_A_SU_INFO_0_TRANSMIT_BW_MASK 0x00180000
/* Description HE_SIG_A_SU_INFO_0_CP_LTF_SIZE
Indicates the CP and HE-LTF type
<enum 0 OneX_LTF_0_8CP> 1xLTF + 0.8 us CP (See note for
proprietary mode)
<enum 1 TwoX_LTF_0_8CP> 2x LTF + 0.8 µs CP (See note
for proprietary mode)
<enum 2 TwoX_LTF_1_6CP> 2x LTF + 1.6 µs CP (See note
for proprietary mode)
<enum 3 FourX_LTF_3_2CP> 4x LTF + 3.2 µs CP (See note
for proprietary mode)
NOTE:
For QC proprietary mode
If ( DCM == 1 ) and ( MCS > 0 )
0 = 1xLTF + 0.4 usec
1 = 2xLTF + 0.4 usec
2~3 = Reserved
<legal all>
*/
#define HE_SIG_A_SU_INFO_0_CP_LTF_SIZE_OFFSET 0x00000000
#define HE_SIG_A_SU_INFO_0_CP_LTF_SIZE_LSB 21
#define HE_SIG_A_SU_INFO_0_CP_LTF_SIZE_MASK 0x00600000
/* Description HE_SIG_A_SU_INFO_0_NSTS
For HE SU PPDU
For HE Extended Range PPDU
<legal all>
*/
#define HE_SIG_A_SU_INFO_0_NSTS_OFFSET 0x00000000
#define HE_SIG_A_SU_INFO_0_NSTS_LSB 23
#define HE_SIG_A_SU_INFO_0_NSTS_MASK 0x03800000
/* Description HE_SIG_A_SU_INFO_0_RESERVED_0B
<legal 0>
*/
#define HE_SIG_A_SU_INFO_0_RESERVED_0B_OFFSET 0x00000000
#define HE_SIG_A_SU_INFO_0_RESERVED_0B_LSB 26
#define HE_SIG_A_SU_INFO_0_RESERVED_0B_MASK 0xfc000000
/* Description HE_SIG_A_SU_INFO_1_TXOP_DURATION
Indicates the remaining time in the current TXOP
Field Used by MAC HW
<legal all>
*/
#define HE_SIG_A_SU_INFO_1_TXOP_DURATION_OFFSET 0x00000004
#define HE_SIG_A_SU_INFO_1_TXOP_DURATION_LSB 0
#define HE_SIG_A_SU_INFO_1_TXOP_DURATION_MASK 0x0000007f
/* Description HE_SIG_A_SU_INFO_1_CODING
Distinguishes between BCC and LDPC coding.
0: BCC
1: LDPC
<legal all>
*/
#define HE_SIG_A_SU_INFO_1_CODING_OFFSET 0x00000004
#define HE_SIG_A_SU_INFO_1_CODING_LSB 7
#define HE_SIG_A_SU_INFO_1_CODING_MASK 0x00000080
/* Description HE_SIG_A_SU_INFO_1_LDPC_EXTRA_SYMBOL
If LDPC,
0: LDPC extra symbol not present
1: LDPC extra symbol present
Else
Set to 1
<legal all>
*/
#define HE_SIG_A_SU_INFO_1_LDPC_EXTRA_SYMBOL_OFFSET 0x00000004
#define HE_SIG_A_SU_INFO_1_LDPC_EXTRA_SYMBOL_LSB 8
#define HE_SIG_A_SU_INFO_1_LDPC_EXTRA_SYMBOL_MASK 0x00000100
/* Description HE_SIG_A_SU_INFO_1_STBC
Indicates whether STBC is applied
0: No STBC
1: STBC
<legal all>
*/
#define HE_SIG_A_SU_INFO_1_STBC_OFFSET 0x00000004
#define HE_SIG_A_SU_INFO_1_STBC_LSB 9
#define HE_SIG_A_SU_INFO_1_STBC_MASK 0x00000200
/* Description HE_SIG_A_SU_INFO_1_TXBF
Indicates whether beamforming is applied
0: No beamforming
1: beamforming
<legal all>
*/
#define HE_SIG_A_SU_INFO_1_TXBF_OFFSET 0x00000004
#define HE_SIG_A_SU_INFO_1_TXBF_LSB 10
#define HE_SIG_A_SU_INFO_1_TXBF_MASK 0x00000400
/* Description HE_SIG_A_SU_INFO_1_PACKET_EXTENSION_A_FACTOR
Common trigger info
the packet extension duration of the trigger-based PPDU
response with these two bits indicating the a-factor
<enum 0 a_factor_4>
<enum 1 a_factor_1>
<enum 2 a_factor_2>
<enum 3 a_factor_3>
<legal all>
*/
#define HE_SIG_A_SU_INFO_1_PACKET_EXTENSION_A_FACTOR_OFFSET 0x00000004
#define HE_SIG_A_SU_INFO_1_PACKET_EXTENSION_A_FACTOR_LSB 11
#define HE_SIG_A_SU_INFO_1_PACKET_EXTENSION_A_FACTOR_MASK 0x00001800
/* Description HE_SIG_A_SU_INFO_1_PACKET_EXTENSION_PE_DISAMBIGUITY
Common trigger info
the packet extension duration of the trigger-based PPDU
response with this bit indicating the PE-Disambiguity
<legal all>
*/
#define HE_SIG_A_SU_INFO_1_PACKET_EXTENSION_PE_DISAMBIGUITY_OFFSET 0x00000004
#define HE_SIG_A_SU_INFO_1_PACKET_EXTENSION_PE_DISAMBIGUITY_LSB 13
#define HE_SIG_A_SU_INFO_1_PACKET_EXTENSION_PE_DISAMBIGUITY_MASK 0x00002000
/* Description HE_SIG_A_SU_INFO_1_RESERVED_1A
Note: per standard, set to 1
<legal 1>
*/
#define HE_SIG_A_SU_INFO_1_RESERVED_1A_OFFSET 0x00000004
#define HE_SIG_A_SU_INFO_1_RESERVED_1A_LSB 14
#define HE_SIG_A_SU_INFO_1_RESERVED_1A_MASK 0x00004000
/* Description HE_SIG_A_SU_INFO_1_DOPPLER_INDICATION
0: No Doppler support
1: Doppler support
<legal all>
*/
#define HE_SIG_A_SU_INFO_1_DOPPLER_INDICATION_OFFSET 0x00000004
#define HE_SIG_A_SU_INFO_1_DOPPLER_INDICATION_LSB 15
#define HE_SIG_A_SU_INFO_1_DOPPLER_INDICATION_MASK 0x00008000
/* Description HE_SIG_A_SU_INFO_1_CRC
CRC for HE-SIG-A contents.
<legal all>
*/
#define HE_SIG_A_SU_INFO_1_CRC_OFFSET 0x00000004
#define HE_SIG_A_SU_INFO_1_CRC_LSB 16
#define HE_SIG_A_SU_INFO_1_CRC_MASK 0x000f0000
/* Description HE_SIG_A_SU_INFO_1_TAIL
<legal 0>
*/
#define HE_SIG_A_SU_INFO_1_TAIL_OFFSET 0x00000004
#define HE_SIG_A_SU_INFO_1_TAIL_LSB 20
#define HE_SIG_A_SU_INFO_1_TAIL_MASK 0x03f00000
/* Description HE_SIG_A_SU_INFO_1_DOT11AX_SU_EXTENDED
TX side:
Set to 0
RX side:
On RX side, evaluated by MAC HW. This is the only way
for MAC RX to know that this was an HE_SIG_A_SU received in
'extended' format
<legal all>
*/
#define HE_SIG_A_SU_INFO_1_DOT11AX_SU_EXTENDED_OFFSET 0x00000004
#define HE_SIG_A_SU_INFO_1_DOT11AX_SU_EXTENDED_LSB 26
#define HE_SIG_A_SU_INFO_1_DOT11AX_SU_EXTENDED_MASK 0x04000000
/* Description HE_SIG_A_SU_INFO_1_DOT11AX_EXT_RU_SIZE
TX side:
Set to 0
RX side:
Field only contains valid info when dot11ax_su_extended
is set.
On RX side, evaluated by MAC HW. This is the only way
for MAC RX to know what the number of based RUs was in this
extended range reception. It is used by the MAC to determine
the RU size for the response...
<legal all>
*/
#define HE_SIG_A_SU_INFO_1_DOT11AX_EXT_RU_SIZE_OFFSET 0x00000004
#define HE_SIG_A_SU_INFO_1_DOT11AX_EXT_RU_SIZE_LSB 27
#define HE_SIG_A_SU_INFO_1_DOT11AX_EXT_RU_SIZE_MASK 0x78000000
/* Description HE_SIG_A_SU_INFO_1_RX_NDP
TX side:
Set to 0
RX side:Valid on RX side only, and looked at by MAC HW
When set, PHY has received (expected) NDP frame
<legal all>
*/
#define HE_SIG_A_SU_INFO_1_RX_NDP_OFFSET 0x00000004
#define HE_SIG_A_SU_INFO_1_RX_NDP_LSB 31
#define HE_SIG_A_SU_INFO_1_RX_NDP_MASK 0x80000000
#endif // _HE_SIG_A_SU_INFO_H_

Bestand weergeven

@@ -0,0 +1,88 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _HE_SIG_B1_MU_INFO_H_
#define _HE_SIG_B1_MU_INFO_H_
#if !defined(__ASSEMBLER__)
#endif
// ################ START SUMMARY #################
//
// Dword Fields
// 0 ru_allocation[7:0], reserved_0[31:8]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_HE_SIG_B1_MU_INFO 1
struct he_sig_b1_mu_info {
uint32_t ru_allocation : 8, //[7:0]
reserved_0 : 24; //[31:8]
};
/*
ru_allocation
RU allocation for the user(s) following this common
portion of the SIG
For details, refer to RU_TYPE description
<legal all>
reserved_0
<legal 0>
*/
/* Description HE_SIG_B1_MU_INFO_0_RU_ALLOCATION
RU allocation for the user(s) following this common
portion of the SIG
For details, refer to RU_TYPE description
<legal all>
*/
#define HE_SIG_B1_MU_INFO_0_RU_ALLOCATION_OFFSET 0x00000000
#define HE_SIG_B1_MU_INFO_0_RU_ALLOCATION_LSB 0
#define HE_SIG_B1_MU_INFO_0_RU_ALLOCATION_MASK 0x000000ff
/* Description HE_SIG_B1_MU_INFO_0_RESERVED_0
<legal 0>
*/
#define HE_SIG_B1_MU_INFO_0_RESERVED_0_OFFSET 0x00000000
#define HE_SIG_B1_MU_INFO_0_RESERVED_0_LSB 8
#define HE_SIG_B1_MU_INFO_0_RESERVED_0_MASK 0xffffff00
#endif // _HE_SIG_B1_MU_INFO_H_

Bestand weergeven

@@ -0,0 +1,215 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _HE_SIG_B2_MU_INFO_H_
#define _HE_SIG_B2_MU_INFO_H_
#if !defined(__ASSEMBLER__)
#endif
// ################ START SUMMARY #################
//
// Dword Fields
// 0 sta_id[10:0], sta_spatial_config[14:11], sta_mcs[18:15], reserved_set_to_1[19], sta_coding[20], reserved_0a[28:21], nsts[31:29]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_HE_SIG_B2_MU_INFO 1
struct he_sig_b2_mu_info {
uint32_t sta_id : 11, //[10:0]
sta_spatial_config : 4, //[14:11]
sta_mcs : 4, //[18:15]
reserved_set_to_1 : 1, //[19]
sta_coding : 1, //[20]
reserved_0a : 8, //[28:21]
nsts : 3; //[31:29]
};
/*
sta_id
Identifies the STA that is addressed. Details of STA ID
are TBD
sta_spatial_config
Number of assigned spatial streams and their
corresponding index.
Total number of spatial streams assigned for the MU-MIMO
allocation is also signaled.
sta_mcs
Indicates the data MCS
reserved_set_to_1
<legal 1>
sta_coding
Distinguishes between BCC/LDPC
0: BCC
1: LDPC
<legal all>
reserved_0a
<legal 0>
nsts
MAC RX side usage only:
Needed by RXPCU. Provided by PHY so that RXPCU does not
need to have the RU number decoding logic.
Number of spatial streams for this user
<enum 0 1_spatial_stream>Single spatial stream
<enum 1 2_spatial_streams>2 spatial streams
<enum 2 3_spatial_streams>3 spatial streams
<enum 3 4_spatial_streams>4 spatial streams
<enum 4 5_spatial_streams>5 spatial streams
<enum 5 6_spatial_streams>6 spatial streams
<enum 6 7_spatial_streams>7 spatial streams
<enum 7 8_spatial_streams>8 spatial streams
*/
/* Description HE_SIG_B2_MU_INFO_0_STA_ID
Identifies the STA that is addressed. Details of STA ID
are TBD
*/
#define HE_SIG_B2_MU_INFO_0_STA_ID_OFFSET 0x00000000
#define HE_SIG_B2_MU_INFO_0_STA_ID_LSB 0
#define HE_SIG_B2_MU_INFO_0_STA_ID_MASK 0x000007ff
/* Description HE_SIG_B2_MU_INFO_0_STA_SPATIAL_CONFIG
Number of assigned spatial streams and their
corresponding index.
Total number of spatial streams assigned for the MU-MIMO
allocation is also signaled.
*/
#define HE_SIG_B2_MU_INFO_0_STA_SPATIAL_CONFIG_OFFSET 0x00000000
#define HE_SIG_B2_MU_INFO_0_STA_SPATIAL_CONFIG_LSB 11
#define HE_SIG_B2_MU_INFO_0_STA_SPATIAL_CONFIG_MASK 0x00007800
/* Description HE_SIG_B2_MU_INFO_0_STA_MCS
Indicates the data MCS
*/
#define HE_SIG_B2_MU_INFO_0_STA_MCS_OFFSET 0x00000000
#define HE_SIG_B2_MU_INFO_0_STA_MCS_LSB 15
#define HE_SIG_B2_MU_INFO_0_STA_MCS_MASK 0x00078000
/* Description HE_SIG_B2_MU_INFO_0_RESERVED_SET_TO_1
<legal 1>
*/
#define HE_SIG_B2_MU_INFO_0_RESERVED_SET_TO_1_OFFSET 0x00000000
#define HE_SIG_B2_MU_INFO_0_RESERVED_SET_TO_1_LSB 19
#define HE_SIG_B2_MU_INFO_0_RESERVED_SET_TO_1_MASK 0x00080000
/* Description HE_SIG_B2_MU_INFO_0_STA_CODING
Distinguishes between BCC/LDPC
0: BCC
1: LDPC
<legal all>
*/
#define HE_SIG_B2_MU_INFO_0_STA_CODING_OFFSET 0x00000000
#define HE_SIG_B2_MU_INFO_0_STA_CODING_LSB 20
#define HE_SIG_B2_MU_INFO_0_STA_CODING_MASK 0x00100000
/* Description HE_SIG_B2_MU_INFO_0_RESERVED_0A
<legal 0>
*/
#define HE_SIG_B2_MU_INFO_0_RESERVED_0A_OFFSET 0x00000000
#define HE_SIG_B2_MU_INFO_0_RESERVED_0A_LSB 21
#define HE_SIG_B2_MU_INFO_0_RESERVED_0A_MASK 0x1fe00000
/* Description HE_SIG_B2_MU_INFO_0_NSTS
MAC RX side usage only:
Needed by RXPCU. Provided by PHY so that RXPCU does not
need to have the RU number decoding logic.
Number of spatial streams for this user
<enum 0 1_spatial_stream>Single spatial stream
<enum 1 2_spatial_streams>2 spatial streams
<enum 2 3_spatial_streams>3 spatial streams
<enum 3 4_spatial_streams>4 spatial streams
<enum 4 5_spatial_streams>5 spatial streams
<enum 5 6_spatial_streams>6 spatial streams
<enum 6 7_spatial_streams>7 spatial streams
<enum 7 8_spatial_streams>8 spatial streams
*/
#define HE_SIG_B2_MU_INFO_0_NSTS_OFFSET 0x00000000
#define HE_SIG_B2_MU_INFO_0_NSTS_LSB 29
#define HE_SIG_B2_MU_INFO_0_NSTS_MASK 0xe0000000
#endif // _HE_SIG_B2_MU_INFO_H_

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@@ -0,0 +1,223 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _HE_SIG_B2_OFDMA_INFO_H_
#define _HE_SIG_B2_OFDMA_INFO_H_
#if !defined(__ASSEMBLER__)
#endif
// ################ START SUMMARY #################
//
// Dword Fields
// 0 sta_id[10:0], nsts[13:11], txbf[14], sta_mcs[18:15], sta_dcm[19], sta_coding[20], reserved_0[31:21]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_HE_SIG_B2_OFDMA_INFO 1
struct he_sig_b2_ofdma_info {
uint32_t sta_id : 11, //[10:0]
nsts : 3, //[13:11]
txbf : 1, //[14]
sta_mcs : 4, //[18:15]
sta_dcm : 1, //[19]
sta_coding : 1, //[20]
reserved_0 : 11; //[31:21]
};
/*
sta_id
Identifies the STA that is addressed. Details of STA ID
are TBD
nsts
MAC RX side usage only:
Number of spatial streams for this user
<enum 0 1_spatial_stream>Single spatial stream
<enum 1 2_spatial_streams>2 spatial streams
<enum 2 3_spatial_streams>3 spatial streams
<enum 3 4_spatial_streams>4 spatial streams
<enum 4 5_spatial_streams>5 spatial streams
<enum 5 6_spatial_streams>6 spatial streams
<enum 6 7_spatial_streams>7 spatial streams
<enum 7 8_spatial_streams>8 spatial streams
txbf
Indicates whether beamforming is applied
0: No beamforming
1: beamforming
<legal all>
sta_mcs
Indicates the data MCS
sta_dcm
0: No DCM
1:DCM
<legal all>
sta_coding
Distinguishes between BCC/LDPC
0: BCC
1: LDPC
<legal all>
reserved_0
<legal 0>
*/
/* Description HE_SIG_B2_OFDMA_INFO_0_STA_ID
Identifies the STA that is addressed. Details of STA ID
are TBD
*/
#define HE_SIG_B2_OFDMA_INFO_0_STA_ID_OFFSET 0x00000000
#define HE_SIG_B2_OFDMA_INFO_0_STA_ID_LSB 0
#define HE_SIG_B2_OFDMA_INFO_0_STA_ID_MASK 0x000007ff
/* Description HE_SIG_B2_OFDMA_INFO_0_NSTS
MAC RX side usage only:
Number of spatial streams for this user
<enum 0 1_spatial_stream>Single spatial stream
<enum 1 2_spatial_streams>2 spatial streams
<enum 2 3_spatial_streams>3 spatial streams
<enum 3 4_spatial_streams>4 spatial streams
<enum 4 5_spatial_streams>5 spatial streams
<enum 5 6_spatial_streams>6 spatial streams
<enum 6 7_spatial_streams>7 spatial streams
<enum 7 8_spatial_streams>8 spatial streams
*/
#define HE_SIG_B2_OFDMA_INFO_0_NSTS_OFFSET 0x00000000
#define HE_SIG_B2_OFDMA_INFO_0_NSTS_LSB 11
#define HE_SIG_B2_OFDMA_INFO_0_NSTS_MASK 0x00003800
/* Description HE_SIG_B2_OFDMA_INFO_0_TXBF
Indicates whether beamforming is applied
0: No beamforming
1: beamforming
<legal all>
*/
#define HE_SIG_B2_OFDMA_INFO_0_TXBF_OFFSET 0x00000000
#define HE_SIG_B2_OFDMA_INFO_0_TXBF_LSB 14
#define HE_SIG_B2_OFDMA_INFO_0_TXBF_MASK 0x00004000
/* Description HE_SIG_B2_OFDMA_INFO_0_STA_MCS
Indicates the data MCS
*/
#define HE_SIG_B2_OFDMA_INFO_0_STA_MCS_OFFSET 0x00000000
#define HE_SIG_B2_OFDMA_INFO_0_STA_MCS_LSB 15
#define HE_SIG_B2_OFDMA_INFO_0_STA_MCS_MASK 0x00078000
/* Description HE_SIG_B2_OFDMA_INFO_0_STA_DCM
0: No DCM
1:DCM
<legal all>
*/
#define HE_SIG_B2_OFDMA_INFO_0_STA_DCM_OFFSET 0x00000000
#define HE_SIG_B2_OFDMA_INFO_0_STA_DCM_LSB 19
#define HE_SIG_B2_OFDMA_INFO_0_STA_DCM_MASK 0x00080000
/* Description HE_SIG_B2_OFDMA_INFO_0_STA_CODING
Distinguishes between BCC/LDPC
0: BCC
1: LDPC
<legal all>
*/
#define HE_SIG_B2_OFDMA_INFO_0_STA_CODING_OFFSET 0x00000000
#define HE_SIG_B2_OFDMA_INFO_0_STA_CODING_LSB 20
#define HE_SIG_B2_OFDMA_INFO_0_STA_CODING_MASK 0x00100000
/* Description HE_SIG_B2_OFDMA_INFO_0_RESERVED_0
<legal 0>
*/
#define HE_SIG_B2_OFDMA_INFO_0_RESERVED_0_OFFSET 0x00000000
#define HE_SIG_B2_OFDMA_INFO_0_RESERVED_0_LSB 21
#define HE_SIG_B2_OFDMA_INFO_0_RESERVED_0_MASK 0xffe00000
#endif // _HE_SIG_B2_OFDMA_INFO_H_

396
hw/qca8074/v1/ht_sig_info.h Normal file
Bestand weergeven

@@ -0,0 +1,396 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _HT_SIG_INFO_H_
#define _HT_SIG_INFO_H_
#if !defined(__ASSEMBLER__)
#endif
// ################ START SUMMARY #################
//
// Dword Fields
// 0 mcs[6:0], cbw[7], length[23:8], reserved_0[31:24]
// 1 smoothing[0], not_sounding[1], ht_reserved[2], aggregation[3], stbc[5:4], fec_coding[6], short_gi[7], num_ext_sp_str[9:8], crc[17:10], signal_tail[23:18], reserved_1[31:24]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_HT_SIG_INFO 2
struct ht_sig_info {
uint32_t mcs : 7, //[6:0]
cbw : 1, //[7]
length : 16, //[23:8]
reserved_0 : 8; //[31:24]
uint32_t smoothing : 1, //[0]
not_sounding : 1, //[1]
ht_reserved : 1, //[2]
aggregation : 1, //[3]
stbc : 2, //[5:4]
fec_coding : 1, //[6]
short_gi : 1, //[7]
num_ext_sp_str : 2, //[9:8]
crc : 8, //[17:10]
signal_tail : 6, //[23:18]
reserved_1 : 8; //[31:24]
};
/*
mcs
Modulation Coding Scheme:
0-7 are used for single stream
8-15 are used for 2 streams
16-23 are used for 3 streams
24-31 are used for 4 streams
32 is used for duplicate HT20 (unsupported)
33-76 is used for unequal modulation (unsupported)
77-127 is reserved.
<legal 0-31>
cbw
Packet bandwidth:
<enum 0 ht_20_mhz>
<enum 1 ht_40_mhz>
<legal 0-1>
length
This is the MPDU or A-MPDU length in octets of the PPDU
<legal all>
reserved_0
This field is not part of HT-SIG
Reserved: Should be set to 0 by the MAC and ignored by
the PHY <legal 0>
smoothing
Field indicates if smoothing is needed
E_num 0 do_smoothing Unsupported setting: indicates
smoothing is often used for beamforming
<legal 1>
not_sounding
E_num 0 sounding Unsupported setting: indicates
sounding is used
<enum 1 no_sounding> Indicates no sounding is used
<legal 1>
ht_reserved
Reserved: Should be set to 1 by the MAC and ignored by
the PHY
<legal 1>
aggregation
<enum 0 mpdu> Indicates MPDU format
<enum 1 a_mpdu> Indicates A-MPDU format
<legal 0-1>
stbc
<enum 0 no_stbc> Indicates no STBC
<enum 1 1_str_stbc> Indicates 1 stream STBC
E_num 2 2_str_stbc Indicates 2 stream STBC
(Unsupported)
<legal 0-1>
fec_coding
<enum 0 ht_bcc> Indicates BCC coding
<enum 1 ht_ldpc> Indicates LDPC coding
<legal 0-1>
short_gi
<enum 0 ht_normal_gi> Indicates normal guard
interval
<legal 0-1>
num_ext_sp_str
Number of extension spatial streams: (Used for TxBF)
<enum 0 0_ext_sp_str> No extension spatial streams
E_num 1 1_ext_sp_str Not supported: 1 extension
spatial streams
E_num 2 2_ext_sp_str Not supported: 2 extension
spatial streams
<legal 0>
crc
The CRC protects the HT-SIG (HT-SIG[0][23:0] and
HT-SIG[1][9:0]. The generator polynomial is G(D) = D8 + D2 +
D + 1. <legal all>
signal_tail
The 6 bits of tail is always set to 0 is used to flush
the BCC encoder and decoder. <legal 0>
reserved_1
This field is not part of HT-SIG:
Reserved: Should be set to 0 by the MAC and ignored by
the PHY. <legal 0>
*/
/* Description HT_SIG_INFO_0_MCS
Modulation Coding Scheme:
0-7 are used for single stream
8-15 are used for 2 streams
16-23 are used for 3 streams
24-31 are used for 4 streams
32 is used for duplicate HT20 (unsupported)
33-76 is used for unequal modulation (unsupported)
77-127 is reserved.
<legal 0-31>
*/
#define HT_SIG_INFO_0_MCS_OFFSET 0x00000000
#define HT_SIG_INFO_0_MCS_LSB 0
#define HT_SIG_INFO_0_MCS_MASK 0x0000007f
/* Description HT_SIG_INFO_0_CBW
Packet bandwidth:
<enum 0 ht_20_mhz>
<enum 1 ht_40_mhz>
<legal 0-1>
*/
#define HT_SIG_INFO_0_CBW_OFFSET 0x00000000
#define HT_SIG_INFO_0_CBW_LSB 7
#define HT_SIG_INFO_0_CBW_MASK 0x00000080
/* Description HT_SIG_INFO_0_LENGTH
This is the MPDU or A-MPDU length in octets of the PPDU
<legal all>
*/
#define HT_SIG_INFO_0_LENGTH_OFFSET 0x00000000
#define HT_SIG_INFO_0_LENGTH_LSB 8
#define HT_SIG_INFO_0_LENGTH_MASK 0x00ffff00
/* Description HT_SIG_INFO_0_RESERVED_0
This field is not part of HT-SIG
Reserved: Should be set to 0 by the MAC and ignored by
the PHY <legal 0>
*/
#define HT_SIG_INFO_0_RESERVED_0_OFFSET 0x00000000
#define HT_SIG_INFO_0_RESERVED_0_LSB 24
#define HT_SIG_INFO_0_RESERVED_0_MASK 0xff000000
/* Description HT_SIG_INFO_1_SMOOTHING
Field indicates if smoothing is needed
E_num 0 do_smoothing Unsupported setting: indicates
smoothing is often used for beamforming
<legal 1>
*/
#define HT_SIG_INFO_1_SMOOTHING_OFFSET 0x00000004
#define HT_SIG_INFO_1_SMOOTHING_LSB 0
#define HT_SIG_INFO_1_SMOOTHING_MASK 0x00000001
/* Description HT_SIG_INFO_1_NOT_SOUNDING
E_num 0 sounding Unsupported setting: indicates
sounding is used
<enum 1 no_sounding> Indicates no sounding is used
<legal 1>
*/
#define HT_SIG_INFO_1_NOT_SOUNDING_OFFSET 0x00000004
#define HT_SIG_INFO_1_NOT_SOUNDING_LSB 1
#define HT_SIG_INFO_1_NOT_SOUNDING_MASK 0x00000002
/* Description HT_SIG_INFO_1_HT_RESERVED
Reserved: Should be set to 1 by the MAC and ignored by
the PHY
<legal 1>
*/
#define HT_SIG_INFO_1_HT_RESERVED_OFFSET 0x00000004
#define HT_SIG_INFO_1_HT_RESERVED_LSB 2
#define HT_SIG_INFO_1_HT_RESERVED_MASK 0x00000004
/* Description HT_SIG_INFO_1_AGGREGATION
<enum 0 mpdu> Indicates MPDU format
<enum 1 a_mpdu> Indicates A-MPDU format
<legal 0-1>
*/
#define HT_SIG_INFO_1_AGGREGATION_OFFSET 0x00000004
#define HT_SIG_INFO_1_AGGREGATION_LSB 3
#define HT_SIG_INFO_1_AGGREGATION_MASK 0x00000008
/* Description HT_SIG_INFO_1_STBC
<enum 0 no_stbc> Indicates no STBC
<enum 1 1_str_stbc> Indicates 1 stream STBC
E_num 2 2_str_stbc Indicates 2 stream STBC
(Unsupported)
<legal 0-1>
*/
#define HT_SIG_INFO_1_STBC_OFFSET 0x00000004
#define HT_SIG_INFO_1_STBC_LSB 4
#define HT_SIG_INFO_1_STBC_MASK 0x00000030
/* Description HT_SIG_INFO_1_FEC_CODING
<enum 0 ht_bcc> Indicates BCC coding
<enum 1 ht_ldpc> Indicates LDPC coding
<legal 0-1>
*/
#define HT_SIG_INFO_1_FEC_CODING_OFFSET 0x00000004
#define HT_SIG_INFO_1_FEC_CODING_LSB 6
#define HT_SIG_INFO_1_FEC_CODING_MASK 0x00000040
/* Description HT_SIG_INFO_1_SHORT_GI
<enum 0 ht_normal_gi> Indicates normal guard
interval
<legal 0-1>
*/
#define HT_SIG_INFO_1_SHORT_GI_OFFSET 0x00000004
#define HT_SIG_INFO_1_SHORT_GI_LSB 7
#define HT_SIG_INFO_1_SHORT_GI_MASK 0x00000080
/* Description HT_SIG_INFO_1_NUM_EXT_SP_STR
Number of extension spatial streams: (Used for TxBF)
<enum 0 0_ext_sp_str> No extension spatial streams
E_num 1 1_ext_sp_str Not supported: 1 extension
spatial streams
E_num 2 2_ext_sp_str Not supported: 2 extension
spatial streams
<legal 0>
*/
#define HT_SIG_INFO_1_NUM_EXT_SP_STR_OFFSET 0x00000004
#define HT_SIG_INFO_1_NUM_EXT_SP_STR_LSB 8
#define HT_SIG_INFO_1_NUM_EXT_SP_STR_MASK 0x00000300
/* Description HT_SIG_INFO_1_CRC
The CRC protects the HT-SIG (HT-SIG[0][23:0] and
HT-SIG[1][9:0]. The generator polynomial is G(D) = D8 + D2 +
D + 1. <legal all>
*/
#define HT_SIG_INFO_1_CRC_OFFSET 0x00000004
#define HT_SIG_INFO_1_CRC_LSB 10
#define HT_SIG_INFO_1_CRC_MASK 0x0003fc00
/* Description HT_SIG_INFO_1_SIGNAL_TAIL
The 6 bits of tail is always set to 0 is used to flush
the BCC encoder and decoder. <legal 0>
*/
#define HT_SIG_INFO_1_SIGNAL_TAIL_OFFSET 0x00000004
#define HT_SIG_INFO_1_SIGNAL_TAIL_LSB 18
#define HT_SIG_INFO_1_SIGNAL_TAIL_MASK 0x00fc0000
/* Description HT_SIG_INFO_1_RESERVED_1
This field is not part of HT-SIG:
Reserved: Should be set to 0 by the MAC and ignored by
the PHY. <legal 0>
*/
#define HT_SIG_INFO_1_RESERVED_1_OFFSET 0x00000004
#define HT_SIG_INFO_1_RESERVED_1_LSB 24
#define HT_SIG_INFO_1_RESERVED_1_MASK 0xff000000
#endif // _HT_SIG_INFO_H_

Bestand weergeven

@@ -0,0 +1,264 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _L_SIG_A_INFO_H_
#define _L_SIG_A_INFO_H_
#if !defined(__ASSEMBLER__)
#endif
// ################ START SUMMARY #################
//
// Dword Fields
// 0 rate[3:0], lsig_reserved[4], length[16:5], parity[17], tail[23:18], pkt_type[27:24], captured_implicit_sounding[28], reserved[31:29]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_L_SIG_A_INFO 1
struct l_sig_a_info {
uint32_t rate : 4, //[3:0]
lsig_reserved : 1, //[4]
length : 12, //[16:5]
parity : 1, //[17]
tail : 6, //[23:18]
pkt_type : 4, //[27:24]
captured_implicit_sounding : 1, //[28]
reserved : 3; //[31:29]
};
/*
rate
This format is originally defined for OFDM as a 4 bit
field but the 5th bit was added to indicate 11b formatted
frames. In the standard bit [4] is specified as reserved.
For 11b frames this L-SIG is transformed in the PHY into the
11b preamble format. The following are the rates:
<enum 8 ofdm_48_mbps> 64-QAM 2/3 (48 Mbps)
<enum 9 ofdm_24_mbps> 16-QAM 1/2 (24 Mbps)
<enum 10 ofdm_12_mbps> QPSK 1/2 (12 Mbps)
<enum 11 ofdm_6_mbps> BPSK 1/2 (6 Mbps)
<enum 12 ofdm_54_mbps> 64-QAM 3/4 (54 Mbps)
<enum 13 ofdm_36_mbps> 16-QAM 3/4 (36 Mbps)
<enum 14 ofdm_18_mbps> QPSK 1/2 (18 Mbps)
<enum 15 ofdm_9_mbps> BPSK 3/4 (9 Mbps)
<legal 8-15>
lsig_reserved
Reserved: Should be set to 0 by the MAC and ignored by
the PHY
<legal 0>
length
The length indicates the number of octets in this MPDU.
Note that when using mixed mode 11n preamble this length
provides the spoofed length for the PPDU. This length
provides part of the information to derive the actually PPDU
length. For legacy OFDM and 11B frames the maximum length
is
<legal all>
parity
11a/n/ac TX: This field provides even parity over the
first 18 bits of the signal field which means that the sum
of 1s in the signal field will always be even on
11a/n/ac RX: this field contains the received parity
field from the L-SIG symbol for the current packet.
<legal 0-1>
tail
The 6 bits of tail is always set to 0 is used to flush
the BCC encoder and decoder. <legal 0>
pkt_type
Note: This is not really part of L-SIG
Packet type:
<enum 0 dot11a>802.11a PPDU type
<enum 1 dot11b>802.11b PPDU type
<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
<enum 3 dot11ac>802.11ac PPDU type
<enum 4 dot11ax>802.11ax PPDU type
captured_implicit_sounding
Only used on the RX side. This indicates that the PHY
has captured implicit sounding.
reserved
Reserved: Should be set to 0 by the transmitting MAC and
ignored by the PHY <legal 0>
*/
/* Description L_SIG_A_INFO_0_RATE
This format is originally defined for OFDM as a 4 bit
field but the 5th bit was added to indicate 11b formatted
frames. In the standard bit [4] is specified as reserved.
For 11b frames this L-SIG is transformed in the PHY into the
11b preamble format. The following are the rates:
<enum 8 ofdm_48_mbps> 64-QAM 2/3 (48 Mbps)
<enum 9 ofdm_24_mbps> 16-QAM 1/2 (24 Mbps)
<enum 10 ofdm_12_mbps> QPSK 1/2 (12 Mbps)
<enum 11 ofdm_6_mbps> BPSK 1/2 (6 Mbps)
<enum 12 ofdm_54_mbps> 64-QAM 3/4 (54 Mbps)
<enum 13 ofdm_36_mbps> 16-QAM 3/4 (36 Mbps)
<enum 14 ofdm_18_mbps> QPSK 1/2 (18 Mbps)
<enum 15 ofdm_9_mbps> BPSK 3/4 (9 Mbps)
<legal 8-15>
*/
#define L_SIG_A_INFO_0_RATE_OFFSET 0x00000000
#define L_SIG_A_INFO_0_RATE_LSB 0
#define L_SIG_A_INFO_0_RATE_MASK 0x0000000f
/* Description L_SIG_A_INFO_0_LSIG_RESERVED
Reserved: Should be set to 0 by the MAC and ignored by
the PHY
<legal 0>
*/
#define L_SIG_A_INFO_0_LSIG_RESERVED_OFFSET 0x00000000
#define L_SIG_A_INFO_0_LSIG_RESERVED_LSB 4
#define L_SIG_A_INFO_0_LSIG_RESERVED_MASK 0x00000010
/* Description L_SIG_A_INFO_0_LENGTH
The length indicates the number of octets in this MPDU.
Note that when using mixed mode 11n preamble this length
provides the spoofed length for the PPDU. This length
provides part of the information to derive the actually PPDU
length. For legacy OFDM and 11B frames the maximum length
is
<legal all>
*/
#define L_SIG_A_INFO_0_LENGTH_OFFSET 0x00000000
#define L_SIG_A_INFO_0_LENGTH_LSB 5
#define L_SIG_A_INFO_0_LENGTH_MASK 0x0001ffe0
/* Description L_SIG_A_INFO_0_PARITY
11a/n/ac TX: This field provides even parity over the
first 18 bits of the signal field which means that the sum
of 1s in the signal field will always be even on
11a/n/ac RX: this field contains the received parity
field from the L-SIG symbol for the current packet.
<legal 0-1>
*/
#define L_SIG_A_INFO_0_PARITY_OFFSET 0x00000000
#define L_SIG_A_INFO_0_PARITY_LSB 17
#define L_SIG_A_INFO_0_PARITY_MASK 0x00020000
/* Description L_SIG_A_INFO_0_TAIL
The 6 bits of tail is always set to 0 is used to flush
the BCC encoder and decoder. <legal 0>
*/
#define L_SIG_A_INFO_0_TAIL_OFFSET 0x00000000
#define L_SIG_A_INFO_0_TAIL_LSB 18
#define L_SIG_A_INFO_0_TAIL_MASK 0x00fc0000
/* Description L_SIG_A_INFO_0_PKT_TYPE
Note: This is not really part of L-SIG
Packet type:
<enum 0 dot11a>802.11a PPDU type
<enum 1 dot11b>802.11b PPDU type
<enum 2 dot11n_mm>802.11n Mixed Mode PPDU type
<enum 3 dot11ac>802.11ac PPDU type
<enum 4 dot11ax>802.11ax PPDU type
*/
#define L_SIG_A_INFO_0_PKT_TYPE_OFFSET 0x00000000
#define L_SIG_A_INFO_0_PKT_TYPE_LSB 24
#define L_SIG_A_INFO_0_PKT_TYPE_MASK 0x0f000000
/* Description L_SIG_A_INFO_0_CAPTURED_IMPLICIT_SOUNDING
Only used on the RX side. This indicates that the PHY
has captured implicit sounding.
*/
#define L_SIG_A_INFO_0_CAPTURED_IMPLICIT_SOUNDING_OFFSET 0x00000000
#define L_SIG_A_INFO_0_CAPTURED_IMPLICIT_SOUNDING_LSB 28
#define L_SIG_A_INFO_0_CAPTURED_IMPLICIT_SOUNDING_MASK 0x10000000
/* Description L_SIG_A_INFO_0_RESERVED
Reserved: Should be set to 0 by the transmitting MAC and
ignored by the PHY <legal 0>
*/
#define L_SIG_A_INFO_0_RESERVED_OFFSET 0x00000000
#define L_SIG_A_INFO_0_RESERVED_LSB 29
#define L_SIG_A_INFO_0_RESERVED_MASK 0xe0000000
#endif // _L_SIG_A_INFO_H_

Bestand weergeven

@@ -0,0 +1,121 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _L_SIG_B_INFO_H_
#define _L_SIG_B_INFO_H_
#if !defined(__ASSEMBLER__)
#endif
// ################ START SUMMARY #################
//
// Dword Fields
// 0 rate[3:0], length[15:4], reserved[31:16]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_L_SIG_B_INFO 1
struct l_sig_b_info {
uint32_t rate : 4, //[3:0]
length : 12, //[15:4]
reserved : 16; //[31:16]
};
/*
rate
<enum 1 dsss_1_mpbs_long> DSSS 1 Mbps long
<enum 2 dsss_2_mbps_long> DSSS 2 Mbps long
<enum 3 cck_5_5_mbps_long> CCK 5.5 Mbps long
<enum 4 cck_11_mbps_long> CCK 11 Mbps long
<enum 5 dsss_2_mbps_short> DSSS 2 Mbps short
<enum 6 cck_5_5_mbps_short> CCK 5.5 Mbps short
<enum 7 cck_11_mbps_short> CCK 11 Mbps short
<legal 1-7>
length
The length indicates the number of octets in this MPDU.
<legal all>
reserved
Reserved: Should be set to 0 by the transmitting MAC and
ignored by the PHY <legal 0>
*/
/* Description L_SIG_B_INFO_0_RATE
<enum 1 dsss_1_mpbs_long> DSSS 1 Mbps long
<enum 2 dsss_2_mbps_long> DSSS 2 Mbps long
<enum 3 cck_5_5_mbps_long> CCK 5.5 Mbps long
<enum 4 cck_11_mbps_long> CCK 11 Mbps long
<enum 5 dsss_2_mbps_short> DSSS 2 Mbps short
<enum 6 cck_5_5_mbps_short> CCK 5.5 Mbps short
<enum 7 cck_11_mbps_short> CCK 11 Mbps short
<legal 1-7>
*/
#define L_SIG_B_INFO_0_RATE_OFFSET 0x00000000
#define L_SIG_B_INFO_0_RATE_LSB 0
#define L_SIG_B_INFO_0_RATE_MASK 0x0000000f
/* Description L_SIG_B_INFO_0_LENGTH
The length indicates the number of octets in this MPDU.
<legal all>
*/
#define L_SIG_B_INFO_0_LENGTH_OFFSET 0x00000000
#define L_SIG_B_INFO_0_LENGTH_LSB 4
#define L_SIG_B_INFO_0_LENGTH_MASK 0x0000fff0
/* Description L_SIG_B_INFO_0_RESERVED
Reserved: Should be set to 0 by the transmitting MAC and
ignored by the PHY <legal 0>
*/
#define L_SIG_B_INFO_0_RESERVED_OFFSET 0x00000000
#define L_SIG_B_INFO_0_RESERVED_LSB 16
#define L_SIG_B_INFO_0_RESERVED_MASK 0xffff0000
#endif // _L_SIG_B_INFO_H_

Bestand weergeven

@@ -0,0 +1,86 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _MACRX_ABORT_REQUEST_INFO_H_
#define _MACRX_ABORT_REQUEST_INFO_H_
#if !defined(__ASSEMBLER__)
#endif
// ################ START SUMMARY #################
//
// Dword Fields
// 0 macrx_abort_reason[7:0], reserved_0[15:8]
//
// ################ END SUMMARY #################
#define NUM_OF_WORDS_MACRX_ABORT_REQUEST_INFO 1
struct macrx_abort_request_info {
uint16_t macrx_abort_reason : 8, //[7:0]
reserved_0 : 8; //[15:8]
};
/*
macrx_abort_reason
<enum 0 macrx_abort_sw_initiated>
<enum 1 macrx_abort_other>
<legal 0-1>
reserved_0
<legal 0>
*/
/* Description MACRX_ABORT_REQUEST_INFO_0_MACRX_ABORT_REASON
<enum 0 macrx_abort_sw_initiated>
<enum 1 macrx_abort_other>
<legal 0-1>
*/
#define MACRX_ABORT_REQUEST_INFO_0_MACRX_ABORT_REASON_OFFSET 0x00000000
#define MACRX_ABORT_REQUEST_INFO_0_MACRX_ABORT_REASON_LSB 0
#define MACRX_ABORT_REQUEST_INFO_0_MACRX_ABORT_REASON_MASK 0x000000ff
/* Description MACRX_ABORT_REQUEST_INFO_0_RESERVED_0
<legal 0>
*/
#define MACRX_ABORT_REQUEST_INFO_0_RESERVED_0_OFFSET 0x00000000
#define MACRX_ABORT_REQUEST_INFO_0_RESERVED_0_LSB 8
#define MACRX_ABORT_REQUEST_INFO_0_RESERVED_0_MASK 0x0000ff00
#endif // _MACRX_ABORT_REQUEST_INFO_H_

Bestand weergeven

@@ -0,0 +1,274 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _PHYRX_ABORT_REQUEST_INFO_H_
#define _PHYRX_ABORT_REQUEST_INFO_H_
#if !defined(__ASSEMBLER__)
#endif
// ################ START SUMMARY #################
//
// Dword Fields
// 0 phyrx_abort_reason[7:0], reserved_0[31:8]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_PHYRX_ABORT_REQUEST_INFO 1
struct phyrx_abort_request_info {
uint32_t phyrx_abort_reason : 8, //[7:0]
reserved_0 : 24; //[31:8]
};
/*
phyrx_abort_reason
<enum 0 phyrx_err_phy_off> Reception aborted due to
receiving a PHY_OFF TLV
<enum 1 phyrx_err_synth_off>
<enum 2 phyrx_err_ofdma_timing>
<enum 3 phyrx_err_ofdma_signal_parity>
<enum 4 phyrx_err_ofdma_rate_illegal>
<enum 5 phyrx_err_ofdma_length_illegal>
<enum 6 phyrx_err_ofdma_restart>
<enum 7 phyrx_err_ofdma_service>
<enum 8 phyrx_err_ppdu_ofdma_power_drop>
<enum 9 phyrx_err_cck_blokker>
<enum 10 phyrx_err_cck_timing>
<enum 11 phyrx_err_cck_header_crc>
<enum 12 phyrx_err_cck_rate_illegal>
<enum 13 phyrx_err_cck_length_illegal>
<enum 14 phyrx_err_cck_restart>
<enum 15 phyrx_err_cck_service>
<enum 16 phyrx_err_cck_power_drop>
<enum 17 phyrx_err_ht_crc_err>
<enum 18 phyrx_err_ht_length_illegal>
<enum 19 phyrx_err_ht_rate_illegal>
<enum 20 phyrx_err_ht_zlf>
<enum 21 phyrx_err_false_radar_ext>
<enum 22 phyrx_err_green_field>
<enum 23 phyrx_err_bw_gt_dyn_bw>
<enum 24 phyrx_err_leg_ht_mismatch>
<enum 25 phyrx_err_vht_crc_error>
<enum 26 phyrx_err_vht_siga_unsupported>
<enum 27 phyrx_err_vht_lsig_len_invalid>
<enum 28 phyrx_err_vht_ndp_or_zlf>
<enum 29 phyrx_err_vht_nsym_lt_zero>
<enum 30 phyrx_err_vht_rx_extra_symbol_mismatch>
<enum 31 phyrx_err_vht_rx_skip_group_id0>
<enum 32 phyrx_err_vht_rx_skip_group_id1to62>
<enum 33 phyrx_err_vht_rx_skip_group_id63>
<enum 34 phyrx_err_ofdm_ldpc_decoder_disabled>
<enum 35 phyrx_err_defer_nap>
<enum 36 phyrx_err_fdomain_timeout>
<enum 37 phyrx_err_lsig_rel_check>
<enum 38 phyrx_err_bt_collision>
<enum 39 phyrx_err_unsupported_mu_feedback>
<enum 40 phyrx_err_ppdu_tx_interrupt_rx>
<enum 41 phyrx_err_unsupported_cbf>
<enum 42 phyrx_err_other> Should not really be used. If
needed, ask for documentation update
<legal 0 - 42>
reserved_0
<legal 0>
*/
/* Description PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON
<enum 0 phyrx_err_phy_off> Reception aborted due to
receiving a PHY_OFF TLV
<enum 1 phyrx_err_synth_off>
<enum 2 phyrx_err_ofdma_timing>
<enum 3 phyrx_err_ofdma_signal_parity>
<enum 4 phyrx_err_ofdma_rate_illegal>
<enum 5 phyrx_err_ofdma_length_illegal>
<enum 6 phyrx_err_ofdma_restart>
<enum 7 phyrx_err_ofdma_service>
<enum 8 phyrx_err_ppdu_ofdma_power_drop>
<enum 9 phyrx_err_cck_blokker>
<enum 10 phyrx_err_cck_timing>
<enum 11 phyrx_err_cck_header_crc>
<enum 12 phyrx_err_cck_rate_illegal>
<enum 13 phyrx_err_cck_length_illegal>
<enum 14 phyrx_err_cck_restart>
<enum 15 phyrx_err_cck_service>
<enum 16 phyrx_err_cck_power_drop>
<enum 17 phyrx_err_ht_crc_err>
<enum 18 phyrx_err_ht_length_illegal>
<enum 19 phyrx_err_ht_rate_illegal>
<enum 20 phyrx_err_ht_zlf>
<enum 21 phyrx_err_false_radar_ext>
<enum 22 phyrx_err_green_field>
<enum 23 phyrx_err_bw_gt_dyn_bw>
<enum 24 phyrx_err_leg_ht_mismatch>
<enum 25 phyrx_err_vht_crc_error>
<enum 26 phyrx_err_vht_siga_unsupported>
<enum 27 phyrx_err_vht_lsig_len_invalid>
<enum 28 phyrx_err_vht_ndp_or_zlf>
<enum 29 phyrx_err_vht_nsym_lt_zero>
<enum 30 phyrx_err_vht_rx_extra_symbol_mismatch>
<enum 31 phyrx_err_vht_rx_skip_group_id0>
<enum 32 phyrx_err_vht_rx_skip_group_id1to62>
<enum 33 phyrx_err_vht_rx_skip_group_id63>
<enum 34 phyrx_err_ofdm_ldpc_decoder_disabled>
<enum 35 phyrx_err_defer_nap>
<enum 36 phyrx_err_fdomain_timeout>
<enum 37 phyrx_err_lsig_rel_check>
<enum 38 phyrx_err_bt_collision>
<enum 39 phyrx_err_unsupported_mu_feedback>
<enum 40 phyrx_err_ppdu_tx_interrupt_rx>
<enum 41 phyrx_err_unsupported_cbf>
<enum 42 phyrx_err_other> Should not really be used. If
needed, ask for documentation update
<legal 0 - 42>
*/
#define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_OFFSET 0x00000000
#define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_LSB 0
#define PHYRX_ABORT_REQUEST_INFO_0_PHYRX_ABORT_REASON_MASK 0x000000ff
/* Description PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0
<legal 0>
*/
#define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_OFFSET 0x00000000
#define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_LSB 8
#define PHYRX_ABORT_REQUEST_INFO_0_RESERVED_0_MASK 0xffffff00
#endif // _PHYRX_ABORT_REQUEST_INFO_H_

Bestand weergeven

@@ -0,0 +1,60 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _PHYRX_HE_SIG_A_MU_DL_H_
#define _PHYRX_HE_SIG_A_MU_DL_H_
#if !defined(__ASSEMBLER__)
#endif
#include "he_sig_a_mu_dl_info.h"
// ################ START SUMMARY #################
//
// Dword Fields
// 0-1 struct he_sig_a_mu_dl_info phyrx_he_sig_a_mu_dl_info_details;
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_PHYRX_HE_SIG_A_MU_DL 2
struct phyrx_he_sig_a_mu_dl {
struct he_sig_a_mu_dl_info phyrx_he_sig_a_mu_dl_info_details;
};
/*
struct he_sig_a_mu_dl_info phyrx_he_sig_a_mu_dl_info_details
See detailed description of the STRUCT
*/
#define PHYRX_HE_SIG_A_MU_DL_0_HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_OFFSET 0x00000000
#define PHYRX_HE_SIG_A_MU_DL_0_HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LSB 0
#define PHYRX_HE_SIG_A_MU_DL_0_HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_HE_SIG_A_MU_DL_1_HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_OFFSET 0x00000004
#define PHYRX_HE_SIG_A_MU_DL_1_HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_LSB 0
#define PHYRX_HE_SIG_A_MU_DL_1_HE_SIG_A_MU_DL_INFO_PHYRX_HE_SIG_A_MU_DL_INFO_DETAILS_MASK 0xffffffff
#endif // _PHYRX_HE_SIG_A_MU_DL_H_

Bestand weergeven

@@ -0,0 +1,60 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _PHYRX_HE_SIG_A_MU_UL_H_
#define _PHYRX_HE_SIG_A_MU_UL_H_
#if !defined(__ASSEMBLER__)
#endif
#include "he_sig_a_mu_ul_info.h"
// ################ START SUMMARY #################
//
// Dword Fields
// 0-1 struct he_sig_a_mu_ul_info phyrx_he_sig_a_mu_ul_info_details;
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_PHYRX_HE_SIG_A_MU_UL 2
struct phyrx_he_sig_a_mu_ul {
struct he_sig_a_mu_ul_info phyrx_he_sig_a_mu_ul_info_details;
};
/*
struct he_sig_a_mu_ul_info phyrx_he_sig_a_mu_ul_info_details
See detailed description of the STRUCT
*/
#define PHYRX_HE_SIG_A_MU_UL_0_HE_SIG_A_MU_UL_INFO_PHYRX_HE_SIG_A_MU_UL_INFO_DETAILS_OFFSET 0x00000000
#define PHYRX_HE_SIG_A_MU_UL_0_HE_SIG_A_MU_UL_INFO_PHYRX_HE_SIG_A_MU_UL_INFO_DETAILS_LSB 0
#define PHYRX_HE_SIG_A_MU_UL_0_HE_SIG_A_MU_UL_INFO_PHYRX_HE_SIG_A_MU_UL_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_HE_SIG_A_MU_UL_1_HE_SIG_A_MU_UL_INFO_PHYRX_HE_SIG_A_MU_UL_INFO_DETAILS_OFFSET 0x00000004
#define PHYRX_HE_SIG_A_MU_UL_1_HE_SIG_A_MU_UL_INFO_PHYRX_HE_SIG_A_MU_UL_INFO_DETAILS_LSB 0
#define PHYRX_HE_SIG_A_MU_UL_1_HE_SIG_A_MU_UL_INFO_PHYRX_HE_SIG_A_MU_UL_INFO_DETAILS_MASK 0xffffffff
#endif // _PHYRX_HE_SIG_A_MU_UL_H_

Bestand weergeven

@@ -0,0 +1,60 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _PHYRX_HE_SIG_A_SU_H_
#define _PHYRX_HE_SIG_A_SU_H_
#if !defined(__ASSEMBLER__)
#endif
#include "he_sig_a_su_info.h"
// ################ START SUMMARY #################
//
// Dword Fields
// 0-1 struct he_sig_a_su_info phyrx_he_sig_a_su_info_details;
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_PHYRX_HE_SIG_A_SU 2
struct phyrx_he_sig_a_su {
struct he_sig_a_su_info phyrx_he_sig_a_su_info_details;
};
/*
struct he_sig_a_su_info phyrx_he_sig_a_su_info_details
See detailed description of the STRUCT
*/
#define PHYRX_HE_SIG_A_SU_0_HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS_OFFSET 0x00000000
#define PHYRX_HE_SIG_A_SU_0_HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LSB 0
#define PHYRX_HE_SIG_A_SU_0_HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_HE_SIG_A_SU_1_HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS_OFFSET 0x00000004
#define PHYRX_HE_SIG_A_SU_1_HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS_LSB 0
#define PHYRX_HE_SIG_A_SU_1_HE_SIG_A_SU_INFO_PHYRX_HE_SIG_A_SU_INFO_DETAILS_MASK 0xffffffff
#endif // _PHYRX_HE_SIG_A_SU_H_

Bestand weergeven

@@ -0,0 +1,57 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _PHYRX_HE_SIG_B1_MU_H_
#define _PHYRX_HE_SIG_B1_MU_H_
#if !defined(__ASSEMBLER__)
#endif
#include "he_sig_b1_mu_info.h"
// ################ START SUMMARY #################
//
// Dword Fields
// 0 struct he_sig_b1_mu_info phyrx_he_sig_b1_mu_info_details;
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_PHYRX_HE_SIG_B1_MU 1
struct phyrx_he_sig_b1_mu {
struct he_sig_b1_mu_info phyrx_he_sig_b1_mu_info_details;
};
/*
struct he_sig_b1_mu_info phyrx_he_sig_b1_mu_info_details
See detailed description of the STRUCT
*/
#define PHYRX_HE_SIG_B1_MU_0_HE_SIG_B1_MU_INFO_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_OFFSET 0x00000000
#define PHYRX_HE_SIG_B1_MU_0_HE_SIG_B1_MU_INFO_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_LSB 0
#define PHYRX_HE_SIG_B1_MU_0_HE_SIG_B1_MU_INFO_PHYRX_HE_SIG_B1_MU_INFO_DETAILS_MASK 0xffffffff
#endif // _PHYRX_HE_SIG_B1_MU_H_

Bestand weergeven

@@ -0,0 +1,57 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _PHYRX_HE_SIG_B2_MU_H_
#define _PHYRX_HE_SIG_B2_MU_H_
#if !defined(__ASSEMBLER__)
#endif
#include "he_sig_b2_mu_info.h"
// ################ START SUMMARY #################
//
// Dword Fields
// 0 struct he_sig_b2_mu_info phyrx_he_sig_b2_mu_info_details;
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_PHYRX_HE_SIG_B2_MU 1
struct phyrx_he_sig_b2_mu {
struct he_sig_b2_mu_info phyrx_he_sig_b2_mu_info_details;
};
/*
struct he_sig_b2_mu_info phyrx_he_sig_b2_mu_info_details
See detailed description of the STRUCT
*/
#define PHYRX_HE_SIG_B2_MU_0_HE_SIG_B2_MU_INFO_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_OFFSET 0x00000000
#define PHYRX_HE_SIG_B2_MU_0_HE_SIG_B2_MU_INFO_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_LSB 0
#define PHYRX_HE_SIG_B2_MU_0_HE_SIG_B2_MU_INFO_PHYRX_HE_SIG_B2_MU_INFO_DETAILS_MASK 0xffffffff
#endif // _PHYRX_HE_SIG_B2_MU_H_

Bestand weergeven

@@ -0,0 +1,57 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _PHYRX_HE_SIG_B2_OFDMA_H_
#define _PHYRX_HE_SIG_B2_OFDMA_H_
#if !defined(__ASSEMBLER__)
#endif
#include "he_sig_b2_ofdma_info.h"
// ################ START SUMMARY #################
//
// Dword Fields
// 0 struct he_sig_b2_ofdma_info phyrx_he_sig_b2_ofdma_info_details;
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_PHYRX_HE_SIG_B2_OFDMA 1
struct phyrx_he_sig_b2_ofdma {
struct he_sig_b2_ofdma_info phyrx_he_sig_b2_ofdma_info_details;
};
/*
struct he_sig_b2_ofdma_info phyrx_he_sig_b2_ofdma_info_details
See detailed description of the STRUCT
*/
#define PHYRX_HE_SIG_B2_OFDMA_0_HE_SIG_B2_OFDMA_INFO_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_OFFSET 0x00000000
#define PHYRX_HE_SIG_B2_OFDMA_0_HE_SIG_B2_OFDMA_INFO_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_LSB 0
#define PHYRX_HE_SIG_B2_OFDMA_0_HE_SIG_B2_OFDMA_INFO_PHYRX_HE_SIG_B2_OFDMA_INFO_DETAILS_MASK 0xffffffff
#endif // _PHYRX_HE_SIG_B2_OFDMA_H_

Bestand weergeven

@@ -0,0 +1,60 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _PHYRX_HT_SIG_H_
#define _PHYRX_HT_SIG_H_
#if !defined(__ASSEMBLER__)
#endif
#include "ht_sig_info.h"
// ################ START SUMMARY #################
//
// Dword Fields
// 0-1 struct ht_sig_info phyrx_ht_sig_info_details;
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_PHYRX_HT_SIG 2
struct phyrx_ht_sig {
struct ht_sig_info phyrx_ht_sig_info_details;
};
/*
struct ht_sig_info phyrx_ht_sig_info_details
See detailed description of the STRUCT
*/
#define PHYRX_HT_SIG_0_HT_SIG_INFO_PHYRX_HT_SIG_INFO_DETAILS_OFFSET 0x00000000
#define PHYRX_HT_SIG_0_HT_SIG_INFO_PHYRX_HT_SIG_INFO_DETAILS_LSB 0
#define PHYRX_HT_SIG_0_HT_SIG_INFO_PHYRX_HT_SIG_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_HT_SIG_1_HT_SIG_INFO_PHYRX_HT_SIG_INFO_DETAILS_OFFSET 0x00000004
#define PHYRX_HT_SIG_1_HT_SIG_INFO_PHYRX_HT_SIG_INFO_DETAILS_LSB 0
#define PHYRX_HT_SIG_1_HT_SIG_INFO_PHYRX_HT_SIG_INFO_DETAILS_MASK 0xffffffff
#endif // _PHYRX_HT_SIG_H_

Bestand weergeven

@@ -0,0 +1,57 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _PHYRX_L_SIG_A_H_
#define _PHYRX_L_SIG_A_H_
#if !defined(__ASSEMBLER__)
#endif
#include "l_sig_a_info.h"
// ################ START SUMMARY #################
//
// Dword Fields
// 0 struct l_sig_a_info phyrx_l_sig_a_info_details;
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_PHYRX_L_SIG_A 1
struct phyrx_l_sig_a {
struct l_sig_a_info phyrx_l_sig_a_info_details;
};
/*
struct l_sig_a_info phyrx_l_sig_a_info_details
See detailed description of the STRUCT
*/
#define PHYRX_L_SIG_A_0_L_SIG_A_INFO_PHYRX_L_SIG_A_INFO_DETAILS_OFFSET 0x00000000
#define PHYRX_L_SIG_A_0_L_SIG_A_INFO_PHYRX_L_SIG_A_INFO_DETAILS_LSB 0
#define PHYRX_L_SIG_A_0_L_SIG_A_INFO_PHYRX_L_SIG_A_INFO_DETAILS_MASK 0xffffffff
#endif // _PHYRX_L_SIG_A_H_

Bestand weergeven

@@ -0,0 +1,57 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _PHYRX_L_SIG_B_H_
#define _PHYRX_L_SIG_B_H_
#if !defined(__ASSEMBLER__)
#endif
#include "l_sig_b_info.h"
// ################ START SUMMARY #################
//
// Dword Fields
// 0 struct l_sig_b_info phyrx_l_sig_b_info_details;
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_PHYRX_L_SIG_B 1
struct phyrx_l_sig_b {
struct l_sig_b_info phyrx_l_sig_b_info_details;
};
/*
struct l_sig_b_info phyrx_l_sig_b_info_details
See detailed description of the STRUCT
*/
#define PHYRX_L_SIG_B_0_L_SIG_B_INFO_PHYRX_L_SIG_B_INFO_DETAILS_OFFSET 0x00000000
#define PHYRX_L_SIG_B_0_L_SIG_B_INFO_PHYRX_L_SIG_B_INFO_DETAILS_LSB 0
#define PHYRX_L_SIG_B_0_L_SIG_B_INFO_PHYRX_L_SIG_B_INFO_DETAILS_MASK 0xffffffff
#endif // _PHYRX_L_SIG_B_H_

Bestand weergeven

@@ -0,0 +1,460 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _PHYRX_PKT_END_H_
#define _PHYRX_PKT_END_H_
#if !defined(__ASSEMBLER__)
#endif
#include "rx_location_info.h"
#include "rx_timing_offset_info.h"
#include "receive_rssi_info.h"
// ################ START SUMMARY #################
//
// Dword Fields
// 0 phy_internal_nap[0], location_info_valid[1], timing_info_valid[2], rssi_info_valid[3], rx_frame_correction_needed[4], frameless_frame_received[5], reserved_0a[31:6]
// 1 phy_timestamp_1_lower_32[31:0]
// 2 phy_timestamp_1_upper_32[31:0]
// 3 phy_timestamp_2_lower_32[31:0]
// 4 phy_timestamp_2_upper_32[31:0]
// 5-13 struct rx_location_info rx_location_info_details;
// 14 struct rx_timing_offset_info rx_timing_offset_info_details;
// 15-30 struct receive_rssi_info post_rssi_info_details;
// 31 phy_sw_status_31_0[31:0]
// 32 phy_sw_status_63_32[31:0]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_PHYRX_PKT_END 33
struct phyrx_pkt_end {
uint32_t phy_internal_nap : 1, //[0]
location_info_valid : 1, //[1]
timing_info_valid : 1, //[2]
rssi_info_valid : 1, //[3]
rx_frame_correction_needed : 1, //[4]
frameless_frame_received : 1, //[5]
reserved_0a : 26; //[31:6]
uint32_t phy_timestamp_1_lower_32 : 32; //[31:0]
uint32_t phy_timestamp_1_upper_32 : 32; //[31:0]
uint32_t phy_timestamp_2_lower_32 : 32; //[31:0]
uint32_t phy_timestamp_2_upper_32 : 32; //[31:0]
struct rx_location_info rx_location_info_details;
struct rx_timing_offset_info rx_timing_offset_info_details;
struct receive_rssi_info post_rssi_info_details;
uint32_t phy_sw_status_31_0 : 32; //[31:0]
uint32_t phy_sw_status_63_32 : 32; //[31:0]
};
/*
phy_internal_nap
When set, PHY RX entered an internal NAP state, as PHY
determined that this reception was not destined to this
device
location_info_valid
Indicates that the RX_LOCATION_INFO structure later on
in the TLV contains valid info
timing_info_valid
Indicates that the RX_TIMING_OFFSET_INFO structure later
on in the TLV contains valid info
rssi_info_valid
Indicates that the RECEIVE_RSSI_INFO structure later on
in the TLV contains valid info
rx_frame_correction_needed
When clear, no action is needed in the MAC.
When set, the falling edge of the rx_frame happened 4us
too late. MAC will need to compensate for this delay in
order to maintain proper SIFS timing and/or not to get
de-slotted.
PHY uses this for very short 11a frames.
When set, PHY will have passed this TLV to the MAC up to
8 us into the 'real SIFS' time, and thus within 4us from the
falling edge of the rx_frame.
<legal all>
frameless_frame_received
When set, PHY has received the 'frameless frame' . Can
be used in the 'MU-RTS -CTS exchange where CTS reception can
be problematic.
<legal all>
reserved_0a
<legal 0>
phy_timestamp_1_lower_32
TODO PHY-RF team: Is the description for this and the
next 3 fields still correct ?
The PHY timestamp in the AMPI of the first rising edge
of rx_clear_pri after TX_PHY_DESC. . This field should set
to 0 by the PHY and should be updated by the AMPI before
being forwarded to the rest of the MAC. This field indicates
the lower 32 bits of the timestamp
phy_timestamp_1_upper_32
The PHY timestamp in the AMPI of the first rising edge
of rx_clear_pri after TX_PHY_DESC. This field should set to
0 by the PHY and should be updated by the AMPI before being
forwarded to the rest of the MAC. This field indicates the
upper 32 bits of the timestamp
phy_timestamp_2_lower_32
The PHY timestamp in the AMPI of the rising edge of
rx_clear_pri after RX_RSSI_LEGACY. This field should set to
0 by the PHY and should be updated by the AMPI before being
forwarded to the rest of the MAC. This field indicates the
lower 32 bits of the timestamp
phy_timestamp_2_upper_32
The PHY timestamp in the AMPI of the rising edge of
rx_clear_pri after RX_RSSI_LEGACY. This field should set to
0 by the PHY and should be updated by the AMPI before being
forwarded to the rest of the MAC. This field indicates the
upper 32 bits of the timestamp
struct rx_location_info rx_location_info_details
Overview of location related info
struct rx_timing_offset_info rx_timing_offset_info_details
Overview of timing offset related info
struct receive_rssi_info post_rssi_info_details
Overview of the post-RSSI values.
phy_sw_status_31_0
Some PHY micro code status that can be put in here.
Details of definition within SW specification
This field can be used for debugging, FW - SW message
exchange, etc.
It could for example be a pointer to a DDR memory
location where PHY FW put some debug info.
<legal all>
phy_sw_status_63_32
Some PHY micro code status that can be put in here.
Details of definition within SW specification
This field can be used for debugging, FW - SW message
exchange, etc.
It could for example be a pointer to a DDR memory
location where PHY FW put some debug info.
<legal all>
*/
/* Description PHYRX_PKT_END_0_PHY_INTERNAL_NAP
When set, PHY RX entered an internal NAP state, as PHY
determined that this reception was not destined to this
device
*/
#define PHYRX_PKT_END_0_PHY_INTERNAL_NAP_OFFSET 0x00000000
#define PHYRX_PKT_END_0_PHY_INTERNAL_NAP_LSB 0
#define PHYRX_PKT_END_0_PHY_INTERNAL_NAP_MASK 0x00000001
/* Description PHYRX_PKT_END_0_LOCATION_INFO_VALID
Indicates that the RX_LOCATION_INFO structure later on
in the TLV contains valid info
*/
#define PHYRX_PKT_END_0_LOCATION_INFO_VALID_OFFSET 0x00000000
#define PHYRX_PKT_END_0_LOCATION_INFO_VALID_LSB 1
#define PHYRX_PKT_END_0_LOCATION_INFO_VALID_MASK 0x00000002
/* Description PHYRX_PKT_END_0_TIMING_INFO_VALID
Indicates that the RX_TIMING_OFFSET_INFO structure later
on in the TLV contains valid info
*/
#define PHYRX_PKT_END_0_TIMING_INFO_VALID_OFFSET 0x00000000
#define PHYRX_PKT_END_0_TIMING_INFO_VALID_LSB 2
#define PHYRX_PKT_END_0_TIMING_INFO_VALID_MASK 0x00000004
/* Description PHYRX_PKT_END_0_RSSI_INFO_VALID
Indicates that the RECEIVE_RSSI_INFO structure later on
in the TLV contains valid info
*/
#define PHYRX_PKT_END_0_RSSI_INFO_VALID_OFFSET 0x00000000
#define PHYRX_PKT_END_0_RSSI_INFO_VALID_LSB 3
#define PHYRX_PKT_END_0_RSSI_INFO_VALID_MASK 0x00000008
/* Description PHYRX_PKT_END_0_RX_FRAME_CORRECTION_NEEDED
When clear, no action is needed in the MAC.
When set, the falling edge of the rx_frame happened 4us
too late. MAC will need to compensate for this delay in
order to maintain proper SIFS timing and/or not to get
de-slotted.
PHY uses this for very short 11a frames.
When set, PHY will have passed this TLV to the MAC up to
8 us into the 'real SIFS' time, and thus within 4us from the
falling edge of the rx_frame.
<legal all>
*/
#define PHYRX_PKT_END_0_RX_FRAME_CORRECTION_NEEDED_OFFSET 0x00000000
#define PHYRX_PKT_END_0_RX_FRAME_CORRECTION_NEEDED_LSB 4
#define PHYRX_PKT_END_0_RX_FRAME_CORRECTION_NEEDED_MASK 0x00000010
/* Description PHYRX_PKT_END_0_FRAMELESS_FRAME_RECEIVED
When set, PHY has received the 'frameless frame' . Can
be used in the 'MU-RTS -CTS exchange where CTS reception can
be problematic.
<legal all>
*/
#define PHYRX_PKT_END_0_FRAMELESS_FRAME_RECEIVED_OFFSET 0x00000000
#define PHYRX_PKT_END_0_FRAMELESS_FRAME_RECEIVED_LSB 5
#define PHYRX_PKT_END_0_FRAMELESS_FRAME_RECEIVED_MASK 0x00000020
/* Description PHYRX_PKT_END_0_RESERVED_0A
<legal 0>
*/
#define PHYRX_PKT_END_0_RESERVED_0A_OFFSET 0x00000000
#define PHYRX_PKT_END_0_RESERVED_0A_LSB 6
#define PHYRX_PKT_END_0_RESERVED_0A_MASK 0xffffffc0
/* Description PHYRX_PKT_END_1_PHY_TIMESTAMP_1_LOWER_32
TODO PHY-RF team: Is the description for this and the
next 3 fields still correct ?
The PHY timestamp in the AMPI of the first rising edge
of rx_clear_pri after TX_PHY_DESC. . This field should set
to 0 by the PHY and should be updated by the AMPI before
being forwarded to the rest of the MAC. This field indicates
the lower 32 bits of the timestamp
*/
#define PHYRX_PKT_END_1_PHY_TIMESTAMP_1_LOWER_32_OFFSET 0x00000004
#define PHYRX_PKT_END_1_PHY_TIMESTAMP_1_LOWER_32_LSB 0
#define PHYRX_PKT_END_1_PHY_TIMESTAMP_1_LOWER_32_MASK 0xffffffff
/* Description PHYRX_PKT_END_2_PHY_TIMESTAMP_1_UPPER_32
The PHY timestamp in the AMPI of the first rising edge
of rx_clear_pri after TX_PHY_DESC. This field should set to
0 by the PHY and should be updated by the AMPI before being
forwarded to the rest of the MAC. This field indicates the
upper 32 bits of the timestamp
*/
#define PHYRX_PKT_END_2_PHY_TIMESTAMP_1_UPPER_32_OFFSET 0x00000008
#define PHYRX_PKT_END_2_PHY_TIMESTAMP_1_UPPER_32_LSB 0
#define PHYRX_PKT_END_2_PHY_TIMESTAMP_1_UPPER_32_MASK 0xffffffff
/* Description PHYRX_PKT_END_3_PHY_TIMESTAMP_2_LOWER_32
The PHY timestamp in the AMPI of the rising edge of
rx_clear_pri after RX_RSSI_LEGACY. This field should set to
0 by the PHY and should be updated by the AMPI before being
forwarded to the rest of the MAC. This field indicates the
lower 32 bits of the timestamp
*/
#define PHYRX_PKT_END_3_PHY_TIMESTAMP_2_LOWER_32_OFFSET 0x0000000c
#define PHYRX_PKT_END_3_PHY_TIMESTAMP_2_LOWER_32_LSB 0
#define PHYRX_PKT_END_3_PHY_TIMESTAMP_2_LOWER_32_MASK 0xffffffff
/* Description PHYRX_PKT_END_4_PHY_TIMESTAMP_2_UPPER_32
The PHY timestamp in the AMPI of the rising edge of
rx_clear_pri after RX_RSSI_LEGACY. This field should set to
0 by the PHY and should be updated by the AMPI before being
forwarded to the rest of the MAC. This field indicates the
upper 32 bits of the timestamp
*/
#define PHYRX_PKT_END_4_PHY_TIMESTAMP_2_UPPER_32_OFFSET 0x00000010
#define PHYRX_PKT_END_4_PHY_TIMESTAMP_2_UPPER_32_LSB 0
#define PHYRX_PKT_END_4_PHY_TIMESTAMP_2_UPPER_32_MASK 0xffffffff
#define PHYRX_PKT_END_5_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_OFFSET 0x00000014
#define PHYRX_PKT_END_5_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_5_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_6_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_OFFSET 0x00000018
#define PHYRX_PKT_END_6_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_6_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_7_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_OFFSET 0x0000001c
#define PHYRX_PKT_END_7_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_7_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_8_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_OFFSET 0x00000020
#define PHYRX_PKT_END_8_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_8_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_9_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_OFFSET 0x00000024
#define PHYRX_PKT_END_9_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_9_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_10_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_OFFSET 0x00000028
#define PHYRX_PKT_END_10_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_10_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_11_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_OFFSET 0x0000002c
#define PHYRX_PKT_END_11_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_11_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_12_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_OFFSET 0x00000030
#define PHYRX_PKT_END_12_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_12_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_13_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_OFFSET 0x00000034
#define PHYRX_PKT_END_13_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_13_RX_LOCATION_INFO_RX_LOCATION_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_14_RX_TIMING_OFFSET_INFO_RX_TIMING_OFFSET_INFO_DETAILS_OFFSET 0x00000038
#define PHYRX_PKT_END_14_RX_TIMING_OFFSET_INFO_RX_TIMING_OFFSET_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_14_RX_TIMING_OFFSET_INFO_RX_TIMING_OFFSET_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_15_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x0000003c
#define PHYRX_PKT_END_15_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_15_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_16_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x00000040
#define PHYRX_PKT_END_16_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_16_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_17_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x00000044
#define PHYRX_PKT_END_17_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_17_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_18_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x00000048
#define PHYRX_PKT_END_18_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_18_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_19_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x0000004c
#define PHYRX_PKT_END_19_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_19_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_20_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x00000050
#define PHYRX_PKT_END_20_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_20_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_21_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x00000054
#define PHYRX_PKT_END_21_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_21_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_22_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x00000058
#define PHYRX_PKT_END_22_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_22_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_23_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x0000005c
#define PHYRX_PKT_END_23_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_23_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_24_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x00000060
#define PHYRX_PKT_END_24_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_24_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_25_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x00000064
#define PHYRX_PKT_END_25_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_25_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_26_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x00000068
#define PHYRX_PKT_END_26_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_26_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_27_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x0000006c
#define PHYRX_PKT_END_27_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_27_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_28_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x00000070
#define PHYRX_PKT_END_28_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_28_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_29_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x00000074
#define PHYRX_PKT_END_29_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_29_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_PKT_END_30_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_OFFSET 0x00000078
#define PHYRX_PKT_END_30_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_PKT_END_30_RECEIVE_RSSI_INFO_POST_RSSI_INFO_DETAILS_MASK 0xffffffff
/* Description PHYRX_PKT_END_31_PHY_SW_STATUS_31_0
Some PHY micro code status that can be put in here.
Details of definition within SW specification
This field can be used for debugging, FW - SW message
exchange, etc.
It could for example be a pointer to a DDR memory
location where PHY FW put some debug info.
<legal all>
*/
#define PHYRX_PKT_END_31_PHY_SW_STATUS_31_0_OFFSET 0x0000007c
#define PHYRX_PKT_END_31_PHY_SW_STATUS_31_0_LSB 0
#define PHYRX_PKT_END_31_PHY_SW_STATUS_31_0_MASK 0xffffffff
/* Description PHYRX_PKT_END_32_PHY_SW_STATUS_63_32
Some PHY micro code status that can be put in here.
Details of definition within SW specification
This field can be used for debugging, FW - SW message
exchange, etc.
It could for example be a pointer to a DDR memory
location where PHY FW put some debug info.
<legal all>
*/
#define PHYRX_PKT_END_32_PHY_SW_STATUS_63_32_OFFSET 0x00000080
#define PHYRX_PKT_END_32_PHY_SW_STATUS_63_32_LSB 0
#define PHYRX_PKT_END_32_PHY_SW_STATUS_63_32_MASK 0xffffffff
#endif // _PHYRX_PKT_END_H_

Bestand weergeven

@@ -0,0 +1,458 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _PHYRX_RSSI_LEGACY_H_
#define _PHYRX_RSSI_LEGACY_H_
#if !defined(__ASSEMBLER__)
#endif
#include "receive_rssi_info.h"
// ################ START SUMMARY #################
//
// Dword Fields
// 0 reception_type[3:0], reserved_0[7:4], rx_chain_mask[15:8], phy_ppdu_id[31:16]
// 1 sw_phy_meta_data[31:0]
// 2 ppdu_start_timestamp[31:0]
// 3-18 struct receive_rssi_info pre_rssi_info_details;
// 19-34 struct receive_rssi_info preamble_rssi_info_details;
// 35 pre_rssi_comb[7:0], rssi_comb[15:8], receive_bandwidth[17:16], reserved[31:18]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_PHYRX_RSSI_LEGACY 36
struct phyrx_rssi_legacy {
uint32_t reception_type : 4, //[3:0]
reserved_0 : 4, //[7:4]
rx_chain_mask : 8, //[15:8]
phy_ppdu_id : 16; //[31:16]
uint32_t sw_phy_meta_data : 32; //[31:0]
uint32_t ppdu_start_timestamp : 32; //[31:0]
struct receive_rssi_info pre_rssi_info_details;
struct receive_rssi_info preamble_rssi_info_details;
uint32_t pre_rssi_comb : 8, //[7:0]
rssi_comb : 8, //[15:8]
receive_bandwidth : 2, //[17:16]
reserved : 14; //[31:18]
};
/*
reception_type
This field helps MAC SW determine which field in this
(and following TLVs) will contain valid information. For
example some RSSI info not valid in case of uplink_ofdma..
<enum 0 reception_is_uplink_ofdma>
<enum 1 reception_is_uplink_mimo>
<enum 2 reception_is_other>
<enum 3 reception_is_frameless> PHY RX has been
instructed in advance that the upcoming reception is
frameless. This implieas that in advance it is known that
all frames will collide in the medium, and nothing can be
properly decoded... This can happen during the CTS reception
in response to the triggered MU-RTS transmission.
MAC takes no action when seeing this e_num. For the
frameless reception the indication in pkt_end is the final
one evaluated by the MAC
<legal 0-3>
reserved_0
<legal 0>
rx_chain_mask
The chain mask at the start of the reception of this
frame.
each bit is one antenna
0: the chain is NOT used
1: the chain is used
Supports up to 8 chains
Used in 11ax TPC calculations for UL OFDMA/MIMO and has
to be in sync with the rssi_comb value as this is also used
by the MAC for the TPC calculations.
<legal all>
phy_ppdu_id
A ppdu counter value that PHY increments for every PPDU
received. The counter value wraps around
<legal all>
sw_phy_meta_data
32 bit Meta data that SW can program in a 32 bit PHY
register and PHY will insert the value in every
RX_RSSI_LEGACY TLV that it generates.
SW uses this field to embed among other things some SW
channel info.
ppdu_start_timestamp
Timestamp that indicates when the PPDU that contained
this MPDU started on the medium.
Note that PHY will detect the start later, and will have
to derive out of the preamble info when the frame actually
appeared on the medium
<legal 0- 10>
struct receive_rssi_info pre_rssi_info_details
This field is not valid when reception_is_uplink_ofdma
Overview of the pre-RSSI values. That is RSSI values
measured on the medium before this reception started.
struct receive_rssi_info preamble_rssi_info_details
This field is not valid when reception_is_uplink_ofdma
Overview of the RSSI values measured during the
pre-amble phase of this reception
pre_rssi_comb
Combined pre_rssi of all chains. Based on primary
channel RSSI.
<legal all>
rssi_comb
Combined rssi of all chains. Based on primary channel
RSSI.
<legal all>
receive_bandwidth
Full receive Bandwidth
<enum 0 full_rx_bw_20_mhz>
<enum 1 full_rx_bw_40_mhz>
<enum 2 full_rx_bw_80_mhz>
<enum 3 full_rx_bw_160_mhz>
<legal 0-3>
reserved
<legal 0>
*/
/* Description PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE
This field helps MAC SW determine which field in this
(and following TLVs) will contain valid information. For
example some RSSI info not valid in case of uplink_ofdma..
<enum 0 reception_is_uplink_ofdma>
<enum 1 reception_is_uplink_mimo>
<enum 2 reception_is_other>
<enum 3 reception_is_frameless> PHY RX has been
instructed in advance that the upcoming reception is
frameless. This implieas that in advance it is known that
all frames will collide in the medium, and nothing can be
properly decoded... This can happen during the CTS reception
in response to the triggered MU-RTS transmission.
MAC takes no action when seeing this e_num. For the
frameless reception the indication in pkt_end is the final
one evaluated by the MAC
<legal 0-3>
*/
#define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_OFFSET 0x00000000
#define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_LSB 0
#define PHYRX_RSSI_LEGACY_0_RECEPTION_TYPE_MASK 0x0000000f
/* Description PHYRX_RSSI_LEGACY_0_RESERVED_0
<legal 0>
*/
#define PHYRX_RSSI_LEGACY_0_RESERVED_0_OFFSET 0x00000000
#define PHYRX_RSSI_LEGACY_0_RESERVED_0_LSB 4
#define PHYRX_RSSI_LEGACY_0_RESERVED_0_MASK 0x000000f0
/* Description PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK
The chain mask at the start of the reception of this
frame.
each bit is one antenna
0: the chain is NOT used
1: the chain is used
Supports up to 8 chains
Used in 11ax TPC calculations for UL OFDMA/MIMO and has
to be in sync with the rssi_comb value as this is also used
by the MAC for the TPC calculations.
<legal all>
*/
#define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_OFFSET 0x00000000
#define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_LSB 8
#define PHYRX_RSSI_LEGACY_0_RX_CHAIN_MASK_MASK 0x0000ff00
/* Description PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID
A ppdu counter value that PHY increments for every PPDU
received. The counter value wraps around
<legal all>
*/
#define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_OFFSET 0x00000000
#define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_LSB 16
#define PHYRX_RSSI_LEGACY_0_PHY_PPDU_ID_MASK 0xffff0000
/* Description PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA
32 bit Meta data that SW can program in a 32 bit PHY
register and PHY will insert the value in every
RX_RSSI_LEGACY TLV that it generates.
SW uses this field to embed among other things some SW
channel info.
*/
#define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_OFFSET 0x00000004
#define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_LSB 0
#define PHYRX_RSSI_LEGACY_1_SW_PHY_META_DATA_MASK 0xffffffff
/* Description PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP
Timestamp that indicates when the PPDU that contained
this MPDU started on the medium.
Note that PHY will detect the start later, and will have
to derive out of the preamble info when the frame actually
appeared on the medium
<legal 0- 10>
*/
#define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_OFFSET 0x00000008
#define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_LSB 0
#define PHYRX_RSSI_LEGACY_2_PPDU_START_TIMESTAMP_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_3_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x0000000c
#define PHYRX_RSSI_LEGACY_3_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_3_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_4_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000010
#define PHYRX_RSSI_LEGACY_4_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_4_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_5_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000014
#define PHYRX_RSSI_LEGACY_5_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_5_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_6_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000018
#define PHYRX_RSSI_LEGACY_6_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_6_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_7_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x0000001c
#define PHYRX_RSSI_LEGACY_7_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_7_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_8_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000020
#define PHYRX_RSSI_LEGACY_8_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_8_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_9_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000024
#define PHYRX_RSSI_LEGACY_9_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_9_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_10_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000028
#define PHYRX_RSSI_LEGACY_10_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_10_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_11_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x0000002c
#define PHYRX_RSSI_LEGACY_11_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_11_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_12_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000030
#define PHYRX_RSSI_LEGACY_12_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_12_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_13_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000034
#define PHYRX_RSSI_LEGACY_13_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_13_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_14_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000038
#define PHYRX_RSSI_LEGACY_14_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_14_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_15_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x0000003c
#define PHYRX_RSSI_LEGACY_15_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_15_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_16_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000040
#define PHYRX_RSSI_LEGACY_16_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_16_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_17_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000044
#define PHYRX_RSSI_LEGACY_17_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_17_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_18_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_OFFSET 0x00000048
#define PHYRX_RSSI_LEGACY_18_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_18_RECEIVE_RSSI_INFO_PRE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_19_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x0000004c
#define PHYRX_RSSI_LEGACY_19_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_19_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_20_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000050
#define PHYRX_RSSI_LEGACY_20_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_20_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_21_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000054
#define PHYRX_RSSI_LEGACY_21_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_21_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_22_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000058
#define PHYRX_RSSI_LEGACY_22_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_22_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_23_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x0000005c
#define PHYRX_RSSI_LEGACY_23_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_23_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_24_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000060
#define PHYRX_RSSI_LEGACY_24_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_24_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_25_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000064
#define PHYRX_RSSI_LEGACY_25_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_25_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_26_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000068
#define PHYRX_RSSI_LEGACY_26_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_26_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_27_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x0000006c
#define PHYRX_RSSI_LEGACY_27_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_27_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_28_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000070
#define PHYRX_RSSI_LEGACY_28_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_28_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_29_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000074
#define PHYRX_RSSI_LEGACY_29_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_29_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_30_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000078
#define PHYRX_RSSI_LEGACY_30_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_30_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_31_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x0000007c
#define PHYRX_RSSI_LEGACY_31_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_31_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_32_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000080
#define PHYRX_RSSI_LEGACY_32_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_32_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_33_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000084
#define PHYRX_RSSI_LEGACY_33_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_33_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_RSSI_LEGACY_34_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_OFFSET 0x00000088
#define PHYRX_RSSI_LEGACY_34_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_LSB 0
#define PHYRX_RSSI_LEGACY_34_RECEIVE_RSSI_INFO_PREAMBLE_RSSI_INFO_DETAILS_MASK 0xffffffff
/* Description PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB
Combined pre_rssi of all chains. Based on primary
channel RSSI.
<legal all>
*/
#define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_OFFSET 0x0000008c
#define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_LSB 0
#define PHYRX_RSSI_LEGACY_35_PRE_RSSI_COMB_MASK 0x000000ff
/* Description PHYRX_RSSI_LEGACY_35_RSSI_COMB
Combined rssi of all chains. Based on primary channel
RSSI.
<legal all>
*/
#define PHYRX_RSSI_LEGACY_35_RSSI_COMB_OFFSET 0x0000008c
#define PHYRX_RSSI_LEGACY_35_RSSI_COMB_LSB 8
#define PHYRX_RSSI_LEGACY_35_RSSI_COMB_MASK 0x0000ff00
/* Description PHYRX_RSSI_LEGACY_35_RECEIVE_BANDWIDTH
Full receive Bandwidth
<enum 0 full_rx_bw_20_mhz>
<enum 1 full_rx_bw_40_mhz>
<enum 2 full_rx_bw_80_mhz>
<enum 3 full_rx_bw_160_mhz>
<legal 0-3>
*/
#define PHYRX_RSSI_LEGACY_35_RECEIVE_BANDWIDTH_OFFSET 0x0000008c
#define PHYRX_RSSI_LEGACY_35_RECEIVE_BANDWIDTH_LSB 16
#define PHYRX_RSSI_LEGACY_35_RECEIVE_BANDWIDTH_MASK 0x00030000
/* Description PHYRX_RSSI_LEGACY_35_RESERVED
<legal 0>
*/
#define PHYRX_RSSI_LEGACY_35_RESERVED_OFFSET 0x0000008c
#define PHYRX_RSSI_LEGACY_35_RESERVED_LSB 18
#define PHYRX_RSSI_LEGACY_35_RESERVED_MASK 0xfffc0000
#endif // _PHYRX_RSSI_LEGACY_H_

Bestand weergeven

@@ -0,0 +1,60 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _PHYRX_VHT_SIG_A_H_
#define _PHYRX_VHT_SIG_A_H_
#if !defined(__ASSEMBLER__)
#endif
#include "vht_sig_a_info.h"
// ################ START SUMMARY #################
//
// Dword Fields
// 0-1 struct vht_sig_a_info phyrx_vht_sig_a_info_details;
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_PHYRX_VHT_SIG_A 2
struct phyrx_vht_sig_a {
struct vht_sig_a_info phyrx_vht_sig_a_info_details;
};
/*
struct vht_sig_a_info phyrx_vht_sig_a_info_details
See detailed description of the STRUCT
*/
#define PHYRX_VHT_SIG_A_0_VHT_SIG_A_INFO_PHYRX_VHT_SIG_A_INFO_DETAILS_OFFSET 0x00000000
#define PHYRX_VHT_SIG_A_0_VHT_SIG_A_INFO_PHYRX_VHT_SIG_A_INFO_DETAILS_LSB 0
#define PHYRX_VHT_SIG_A_0_VHT_SIG_A_INFO_PHYRX_VHT_SIG_A_INFO_DETAILS_MASK 0xffffffff
#define PHYRX_VHT_SIG_A_1_VHT_SIG_A_INFO_PHYRX_VHT_SIG_A_INFO_DETAILS_OFFSET 0x00000004
#define PHYRX_VHT_SIG_A_1_VHT_SIG_A_INFO_PHYRX_VHT_SIG_A_INFO_DETAILS_LSB 0
#define PHYRX_VHT_SIG_A_1_VHT_SIG_A_INFO_PHYRX_VHT_SIG_A_INFO_DETAILS_MASK 0xffffffff
#endif // _PHYRX_VHT_SIG_A_H_

Diff onderdrukt omdat het te groot bestand Laad Diff

Diff onderdrukt omdat het te groot bestand Laad Diff

Bestand weergeven

@@ -0,0 +1,78 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _RX_TIMING_OFFSET_INFO_H_
#define _RX_TIMING_OFFSET_INFO_H_
#if !defined(__ASSEMBLER__)
#endif
// ################ START SUMMARY #################
//
// Dword Fields
// 0 residual_phase_offset[11:0], reserved[31:12]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_RX_TIMING_OFFSET_INFO 1
struct rx_timing_offset_info {
uint32_t residual_phase_offset : 12, //[11:0]
reserved : 20; //[31:12]
};
/*
residual_phase_offset
Cumulative reference frequency error at end of RX
<legal all>
reserved
<legal 0>
*/
/* Description RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET
Cumulative reference frequency error at end of RX
<legal all>
*/
#define RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET_OFFSET 0x00000000
#define RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET_LSB 0
#define RX_TIMING_OFFSET_INFO_0_RESIDUAL_PHASE_OFFSET_MASK 0x00000fff
/* Description RX_TIMING_OFFSET_INFO_0_RESERVED
<legal 0>
*/
#define RX_TIMING_OFFSET_INFO_0_RESERVED_OFFSET 0x00000000
#define RX_TIMING_OFFSET_INFO_0_RESERVED_LSB 12
#define RX_TIMING_OFFSET_INFO_0_RESERVED_MASK 0xfffff000
#endif // _RX_TIMING_OFFSET_INFO_H_

Bestand weergeven

@@ -0,0 +1,758 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _RXPCU_PPDU_END_INFO_H_
#define _RXPCU_PPDU_END_INFO_H_
#if !defined(__ASSEMBLER__)
#endif
#include "phyrx_abort_request_info.h"
#include "macrx_abort_request_info.h"
// ################ START SUMMARY #################
//
// Dword Fields
// 0 wb_timestamp_lower_32[31:0]
// 1 wb_timestamp_upper_32[31:0]
// 2 rx_antenna[23:0], tx_ht_vht_ack[24], unsupported_mu_nc[25], otp_txbf_disable[26], previous_tlv_corrupted[27], phyrx_abort_request_info_valid[28], macrx_abort_request_info_valid[29], reserved[31:30]
// 3 coex_bt_tx_from_start_of_rx[0], coex_bt_tx_after_start_of_rx[1], coex_wan_tx_from_start_of_rx[2], coex_wan_tx_after_start_of_rx[3], coex_wlan_tx_from_start_of_rx[4], coex_wlan_tx_after_start_of_rx[5], mpdu_delimiter_errors_seen[6], ftm_tm[8:7], dialog_token[16:9], follow_up_dialog_token[24:17], bb_captured_channel[25], reserved_3[31:26]
// 4 before_mpdu_count_passing_fcs[7:0], before_mpdu_count_failing_fcs[15:8], after_mpdu_count_passing_fcs[23:16], after_mpdu_count_failing_fcs[31:24]
// 5 phy_timestamp_tx_lower_32[31:0]
// 6 phy_timestamp_tx_upper_32[31:0]
// 7 bb_length[15:0], bb_data[16], reserved_7[31:17]
// 8 rx_ppdu_duration[23:0], reserved_8[31:24]
// 9 ast_index[15:0], ast_index_valid[16], reserved_9[31:17]
// 10 struct phyrx_abort_request_info phyrx_abort_request_info_details;
// 11 struct macrx_abort_request_info macrx_abort_request_info_details;
// 12 rx_ppdu_end_marker[31:0]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_RXPCU_PPDU_END_INFO 13
struct rxpcu_ppdu_end_info {
uint32_t wb_timestamp_lower_32 : 32; //[31:0]
uint32_t wb_timestamp_upper_32 : 32; //[31:0]
uint32_t rx_antenna : 24, //[23:0]
tx_ht_vht_ack : 1, //[24]
unsupported_mu_nc : 1, //[25]
otp_txbf_disable : 1, //[26]
previous_tlv_corrupted : 1, //[27]
phyrx_abort_request_info_valid : 1, //[28]
macrx_abort_request_info_valid : 1, //[29]
reserved : 2; //[31:30]
uint32_t coex_bt_tx_from_start_of_rx : 1, //[0]
coex_bt_tx_after_start_of_rx : 1, //[1]
coex_wan_tx_from_start_of_rx : 1, //[2]
coex_wan_tx_after_start_of_rx : 1, //[3]
coex_wlan_tx_from_start_of_rx : 1, //[4]
coex_wlan_tx_after_start_of_rx : 1, //[5]
mpdu_delimiter_errors_seen : 1, //[6]
ftm_tm : 2, //[8:7]
dialog_token : 8, //[16:9]
follow_up_dialog_token : 8, //[24:17]
bb_captured_channel : 1, //[25]
reserved_3 : 6; //[31:26]
uint32_t before_mpdu_count_passing_fcs : 8, //[7:0]
before_mpdu_count_failing_fcs : 8, //[15:8]
after_mpdu_count_passing_fcs : 8, //[23:16]
after_mpdu_count_failing_fcs : 8; //[31:24]
uint32_t phy_timestamp_tx_lower_32 : 32; //[31:0]
uint32_t phy_timestamp_tx_upper_32 : 32; //[31:0]
uint32_t bb_length : 16, //[15:0]
bb_data : 1, //[16]
reserved_7 : 15; //[31:17]
uint32_t rx_ppdu_duration : 24, //[23:0]
reserved_8 : 8; //[31:24]
uint32_t ast_index : 16, //[15:0]
ast_index_valid : 1, //[16]
reserved_9 : 15; //[31:17]
struct phyrx_abort_request_info phyrx_abort_request_info_details;
struct macrx_abort_request_info macrx_abort_request_info_details;
uint16_t reserved_after_struct16 : 16; //[31:16]
uint32_t rx_ppdu_end_marker : 32; //[31:0]
};
/*
wb_timestamp_lower_32
WLAN/BT timestamp is a 1 usec resolution timestamp which
does not get updated based on receive beacon like TSF. The
same rules for capturing tsf_timestamp are used to capture
the wb_timestamp. This field represents the lower 32 bits of
the 64-bit timestamp
wb_timestamp_upper_32
WLAN/BT timestamp is a 1 usec resolution timestamp which
does not get updated based on receive beacon like TSF. The
same rules for capturing tsf_timestamp are used to capture
the wb_timestamp. This field represents the upper 32 bits of
the 64-bit timestamp
rx_antenna
Receive antenna value ???
tx_ht_vht_ack
Indicates that a HT or VHT Ack/BA frame was transmitted
in response to this receive packet.
unsupported_mu_nc
Set if MU Nc > 2 in received NDPA.
If this bit is set, even though AID and BSSID are
matched, MAC doesn't send tx_expect_ndp to PHY, because MU
Nc > 2 is not supported in Helium.
otp_txbf_disable
Set if either OTP_SUBFEE_DISABLE or OTP_TXBF_DISABLE is
set and if RXPU receives directed NDPA frame. Then, RXPCU
should not send TX_EXPECT_NDP TLV to SW but set this bit to
inform SW.
previous_tlv_corrupted
When set, the TLV preceding this RXPCU_END_INFO TLV
within the RX_PPDU_END TLV, is corrupted. Not the entire TLV
was received.... Likely due to an abort scenario... If abort
is to blame, see the abort data datastructure for details.
<legal all>
phyrx_abort_request_info_valid
When set, the PHY sent an PHYRX_ABORT_REQUEST TLV to
RXPCU. The abort fields embedded in this TLV contain valid
info.
<legal all>
macrx_abort_request_info_valid
When set, the PHY sent an PHYRX_ABORT_REQUEST TLV to
RXPCU. The abort fields embedded in this TLV contain valid
info.
<legal all>
reserved
<legal 0>
coex_bt_tx_from_start_of_rx
Set when BT TX was ongoing when WLAN RX started
coex_bt_tx_after_start_of_rx
coex_wan_tx_from_start_of_rx
Set when WAN TX was ongoing when WLAN RX started
coex_wan_tx_after_start_of_rx
Set when WAN TX started while WLAN RX was already
ongoing
coex_wlan_tx_from_start_of_rx
Set when other WLAN TX was ongoing when WLAN RX started
coex_wlan_tx_after_start_of_rx
Set when other WLAN TX started while WLAN RX was already
ongoing
mpdu_delimiter_errors_seen
When set, MPDU delimiter errors have been detected
during this PPDU reception
ftm_tm
Indicate the timestamp is for the FTM or TM frame
0: non TM or FTM frame
1: FTM frame
2: TM frame
3: reserved
<legal all>
dialog_token
The dialog token in the FTM or TM frame. Only valid when
the FTM is set. Clear to 254 for a non-FTM frame
<legal all>
follow_up_dialog_token
The follow up dialog token in the FTM or TM frame. Only
valid when the FTM is set. Clear to 0 for a non-FTM frame,
The follow up dialog token in the FTM frame. Only valid when
the FTM is set. Clear to 255 for a non-FTM frame<legal all>
bb_captured_channel
Set by RXPCU when the following conditions are met:
Directed (=> unicast) TM or FTM frame has been received
with passing FCS
PHYRX_PKT_END. Location_info_valid is set
<legal all>
reserved_3
<legal 0>
before_mpdu_count_passing_fcs
Number of MPDUs received in this PPDU that passed the
FCS check before the Coex TX started
before_mpdu_count_failing_fcs
Number of MPDUs received in this PPDU that failed the
FCS check before the Coex TX started
after_mpdu_count_passing_fcs
Number of MPDUs received in this PPDU that passed the
FCS check after the moment the Coex TX started
(Note: The partially received MPDU when the COEX tx
start event came in falls in the after category)
after_mpdu_count_failing_fcs
Number of MPDUs received in this PPDU that failed the
FCS check after the moment the Coex TX started
(Note: The partially received MPDU when the COEX tx
start event came in falls in the after category)
phy_timestamp_tx_lower_32
The PHY timestamp in the AMPI of the most recent rising
edge (TODO: of what ???) after the TX_PHY_DESC.  This field
indicates the lower 32 bits of the timestamp
phy_timestamp_tx_upper_32
The PHY timestamp in the AMPI of the most recent rising
edge (TODO: of what ???) after the TX_PHY_DESC.  This field
indicates the upper 32 bits of the timestamp
bb_length
Indicates the number of bytes of baseband information
for PPDUs where the BB descriptor preamble type is 0x80 to
0xFF which indicates that this is not a normal PPDU but
rather contains baseband debug information.
TODO: Is this still needed ???
bb_data
Indicates that BB data associated with this PPDU will
exist in the receive buffer. The exact contents of this BB
data can be found by decoding the BB TLV in the buffer
associated with the BB data. See vector_fragment in the
Helium_mac_phy_interface.docx
reserved_7
Reserved: HW should fill with 0, FW should ignore.
rx_ppdu_duration
The length of this PPDU reception in us
reserved_8
<legal 0>
ast_index
The AST index of the receive Ack/BA. This information
is provided from the TXPCU to the RXPCU for receive Ack/BA
for implicit beamforming.
<legal all>
ast_index_valid
Indicates that ast_index is valid. Should only be set
for receive Ack/BA where single stream implicit sounding is
captured.
reserved_9
<legal 0>
struct phyrx_abort_request_info phyrx_abort_request_info_details
Field only valid when Phyrx_abort_request_info_valid is
set
The reason why PHY generated an abort request
struct macrx_abort_request_info macrx_abort_request_info_details
Field only valid when macrx_abort_request_info_valid is
set
The reason why MACRX generated an abort request
rx_ppdu_end_marker
Field used by SW to double check that their structure
alignment is in sync with what HW has done.
<legal 0xAABBCCDD>
*/
/* Description RXPCU_PPDU_END_INFO_0_WB_TIMESTAMP_LOWER_32
WLAN/BT timestamp is a 1 usec resolution timestamp which
does not get updated based on receive beacon like TSF. The
same rules for capturing tsf_timestamp are used to capture
the wb_timestamp. This field represents the lower 32 bits of
the 64-bit timestamp
*/
#define RXPCU_PPDU_END_INFO_0_WB_TIMESTAMP_LOWER_32_OFFSET 0x00000000
#define RXPCU_PPDU_END_INFO_0_WB_TIMESTAMP_LOWER_32_LSB 0
#define RXPCU_PPDU_END_INFO_0_WB_TIMESTAMP_LOWER_32_MASK 0xffffffff
/* Description RXPCU_PPDU_END_INFO_1_WB_TIMESTAMP_UPPER_32
WLAN/BT timestamp is a 1 usec resolution timestamp which
does not get updated based on receive beacon like TSF. The
same rules for capturing tsf_timestamp are used to capture
the wb_timestamp. This field represents the upper 32 bits of
the 64-bit timestamp
*/
#define RXPCU_PPDU_END_INFO_1_WB_TIMESTAMP_UPPER_32_OFFSET 0x00000004
#define RXPCU_PPDU_END_INFO_1_WB_TIMESTAMP_UPPER_32_LSB 0
#define RXPCU_PPDU_END_INFO_1_WB_TIMESTAMP_UPPER_32_MASK 0xffffffff
/* Description RXPCU_PPDU_END_INFO_2_RX_ANTENNA
Receive antenna value ???
*/
#define RXPCU_PPDU_END_INFO_2_RX_ANTENNA_OFFSET 0x00000008
#define RXPCU_PPDU_END_INFO_2_RX_ANTENNA_LSB 0
#define RXPCU_PPDU_END_INFO_2_RX_ANTENNA_MASK 0x00ffffff
/* Description RXPCU_PPDU_END_INFO_2_TX_HT_VHT_ACK
Indicates that a HT or VHT Ack/BA frame was transmitted
in response to this receive packet.
*/
#define RXPCU_PPDU_END_INFO_2_TX_HT_VHT_ACK_OFFSET 0x00000008
#define RXPCU_PPDU_END_INFO_2_TX_HT_VHT_ACK_LSB 24
#define RXPCU_PPDU_END_INFO_2_TX_HT_VHT_ACK_MASK 0x01000000
/* Description RXPCU_PPDU_END_INFO_2_UNSUPPORTED_MU_NC
Set if MU Nc > 2 in received NDPA.
If this bit is set, even though AID and BSSID are
matched, MAC doesn't send tx_expect_ndp to PHY, because MU
Nc > 2 is not supported in Helium.
*/
#define RXPCU_PPDU_END_INFO_2_UNSUPPORTED_MU_NC_OFFSET 0x00000008
#define RXPCU_PPDU_END_INFO_2_UNSUPPORTED_MU_NC_LSB 25
#define RXPCU_PPDU_END_INFO_2_UNSUPPORTED_MU_NC_MASK 0x02000000
/* Description RXPCU_PPDU_END_INFO_2_OTP_TXBF_DISABLE
Set if either OTP_SUBFEE_DISABLE or OTP_TXBF_DISABLE is
set and if RXPU receives directed NDPA frame. Then, RXPCU
should not send TX_EXPECT_NDP TLV to SW but set this bit to
inform SW.
*/
#define RXPCU_PPDU_END_INFO_2_OTP_TXBF_DISABLE_OFFSET 0x00000008
#define RXPCU_PPDU_END_INFO_2_OTP_TXBF_DISABLE_LSB 26
#define RXPCU_PPDU_END_INFO_2_OTP_TXBF_DISABLE_MASK 0x04000000
/* Description RXPCU_PPDU_END_INFO_2_PREVIOUS_TLV_CORRUPTED
When set, the TLV preceding this RXPCU_END_INFO TLV
within the RX_PPDU_END TLV, is corrupted. Not the entire TLV
was received.... Likely due to an abort scenario... If abort
is to blame, see the abort data datastructure for details.
<legal all>
*/
#define RXPCU_PPDU_END_INFO_2_PREVIOUS_TLV_CORRUPTED_OFFSET 0x00000008
#define RXPCU_PPDU_END_INFO_2_PREVIOUS_TLV_CORRUPTED_LSB 27
#define RXPCU_PPDU_END_INFO_2_PREVIOUS_TLV_CORRUPTED_MASK 0x08000000
/* Description RXPCU_PPDU_END_INFO_2_PHYRX_ABORT_REQUEST_INFO_VALID
When set, the PHY sent an PHYRX_ABORT_REQUEST TLV to
RXPCU. The abort fields embedded in this TLV contain valid
info.
<legal all>
*/
#define RXPCU_PPDU_END_INFO_2_PHYRX_ABORT_REQUEST_INFO_VALID_OFFSET 0x00000008
#define RXPCU_PPDU_END_INFO_2_PHYRX_ABORT_REQUEST_INFO_VALID_LSB 28
#define RXPCU_PPDU_END_INFO_2_PHYRX_ABORT_REQUEST_INFO_VALID_MASK 0x10000000
/* Description RXPCU_PPDU_END_INFO_2_MACRX_ABORT_REQUEST_INFO_VALID
When set, the PHY sent an PHYRX_ABORT_REQUEST TLV to
RXPCU. The abort fields embedded in this TLV contain valid
info.
<legal all>
*/
#define RXPCU_PPDU_END_INFO_2_MACRX_ABORT_REQUEST_INFO_VALID_OFFSET 0x00000008
#define RXPCU_PPDU_END_INFO_2_MACRX_ABORT_REQUEST_INFO_VALID_LSB 29
#define RXPCU_PPDU_END_INFO_2_MACRX_ABORT_REQUEST_INFO_VALID_MASK 0x20000000
/* Description RXPCU_PPDU_END_INFO_2_RESERVED
<legal 0>
*/
#define RXPCU_PPDU_END_INFO_2_RESERVED_OFFSET 0x00000008
#define RXPCU_PPDU_END_INFO_2_RESERVED_LSB 30
#define RXPCU_PPDU_END_INFO_2_RESERVED_MASK 0xc0000000
/* Description RXPCU_PPDU_END_INFO_3_COEX_BT_TX_FROM_START_OF_RX
Set when BT TX was ongoing when WLAN RX started
*/
#define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_FROM_START_OF_RX_OFFSET 0x0000000c
#define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_FROM_START_OF_RX_LSB 0
#define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_FROM_START_OF_RX_MASK 0x00000001
/* Description RXPCU_PPDU_END_INFO_3_COEX_BT_TX_AFTER_START_OF_RX
*/
#define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_AFTER_START_OF_RX_OFFSET 0x0000000c
#define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_AFTER_START_OF_RX_LSB 1
#define RXPCU_PPDU_END_INFO_3_COEX_BT_TX_AFTER_START_OF_RX_MASK 0x00000002
/* Description RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_FROM_START_OF_RX
Set when WAN TX was ongoing when WLAN RX started
*/
#define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_FROM_START_OF_RX_OFFSET 0x0000000c
#define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_FROM_START_OF_RX_LSB 2
#define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_FROM_START_OF_RX_MASK 0x00000004
/* Description RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_AFTER_START_OF_RX
Set when WAN TX started while WLAN RX was already
ongoing
*/
#define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_AFTER_START_OF_RX_OFFSET 0x0000000c
#define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_AFTER_START_OF_RX_LSB 3
#define RXPCU_PPDU_END_INFO_3_COEX_WAN_TX_AFTER_START_OF_RX_MASK 0x00000008
/* Description RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_FROM_START_OF_RX
Set when other WLAN TX was ongoing when WLAN RX started
*/
#define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_FROM_START_OF_RX_OFFSET 0x0000000c
#define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_FROM_START_OF_RX_LSB 4
#define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_FROM_START_OF_RX_MASK 0x00000010
/* Description RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_AFTER_START_OF_RX
Set when other WLAN TX started while WLAN RX was already
ongoing
*/
#define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_AFTER_START_OF_RX_OFFSET 0x0000000c
#define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_AFTER_START_OF_RX_LSB 5
#define RXPCU_PPDU_END_INFO_3_COEX_WLAN_TX_AFTER_START_OF_RX_MASK 0x00000020
/* Description RXPCU_PPDU_END_INFO_3_MPDU_DELIMITER_ERRORS_SEEN
When set, MPDU delimiter errors have been detected
during this PPDU reception
*/
#define RXPCU_PPDU_END_INFO_3_MPDU_DELIMITER_ERRORS_SEEN_OFFSET 0x0000000c
#define RXPCU_PPDU_END_INFO_3_MPDU_DELIMITER_ERRORS_SEEN_LSB 6
#define RXPCU_PPDU_END_INFO_3_MPDU_DELIMITER_ERRORS_SEEN_MASK 0x00000040
/* Description RXPCU_PPDU_END_INFO_3_FTM_TM
Indicate the timestamp is for the FTM or TM frame
0: non TM or FTM frame
1: FTM frame
2: TM frame
3: reserved
<legal all>
*/
#define RXPCU_PPDU_END_INFO_3_FTM_TM_OFFSET 0x0000000c
#define RXPCU_PPDU_END_INFO_3_FTM_TM_LSB 7
#define RXPCU_PPDU_END_INFO_3_FTM_TM_MASK 0x00000180
/* Description RXPCU_PPDU_END_INFO_3_DIALOG_TOKEN
The dialog token in the FTM or TM frame. Only valid when
the FTM is set. Clear to 254 for a non-FTM frame
<legal all>
*/
#define RXPCU_PPDU_END_INFO_3_DIALOG_TOKEN_OFFSET 0x0000000c
#define RXPCU_PPDU_END_INFO_3_DIALOG_TOKEN_LSB 9
#define RXPCU_PPDU_END_INFO_3_DIALOG_TOKEN_MASK 0x0001fe00
/* Description RXPCU_PPDU_END_INFO_3_FOLLOW_UP_DIALOG_TOKEN
The follow up dialog token in the FTM or TM frame. Only
valid when the FTM is set. Clear to 0 for a non-FTM frame,
The follow up dialog token in the FTM frame. Only valid when
the FTM is set. Clear to 255 for a non-FTM frame<legal all>
*/
#define RXPCU_PPDU_END_INFO_3_FOLLOW_UP_DIALOG_TOKEN_OFFSET 0x0000000c
#define RXPCU_PPDU_END_INFO_3_FOLLOW_UP_DIALOG_TOKEN_LSB 17
#define RXPCU_PPDU_END_INFO_3_FOLLOW_UP_DIALOG_TOKEN_MASK 0x01fe0000
/* Description RXPCU_PPDU_END_INFO_3_BB_CAPTURED_CHANNEL
Set by RXPCU when the following conditions are met:
Directed (=> unicast) TM or FTM frame has been received
with passing FCS
PHYRX_PKT_END. Location_info_valid is set
<legal all>
*/
#define RXPCU_PPDU_END_INFO_3_BB_CAPTURED_CHANNEL_OFFSET 0x0000000c
#define RXPCU_PPDU_END_INFO_3_BB_CAPTURED_CHANNEL_LSB 25
#define RXPCU_PPDU_END_INFO_3_BB_CAPTURED_CHANNEL_MASK 0x02000000
/* Description RXPCU_PPDU_END_INFO_3_RESERVED_3
<legal 0>
*/
#define RXPCU_PPDU_END_INFO_3_RESERVED_3_OFFSET 0x0000000c
#define RXPCU_PPDU_END_INFO_3_RESERVED_3_LSB 26
#define RXPCU_PPDU_END_INFO_3_RESERVED_3_MASK 0xfc000000
/* Description RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_PASSING_FCS
Number of MPDUs received in this PPDU that passed the
FCS check before the Coex TX started
*/
#define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_PASSING_FCS_OFFSET 0x00000010
#define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_PASSING_FCS_LSB 0
#define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_PASSING_FCS_MASK 0x000000ff
/* Description RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_FAILING_FCS
Number of MPDUs received in this PPDU that failed the
FCS check before the Coex TX started
*/
#define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_FAILING_FCS_OFFSET 0x00000010
#define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_FAILING_FCS_LSB 8
#define RXPCU_PPDU_END_INFO_4_BEFORE_MPDU_COUNT_FAILING_FCS_MASK 0x0000ff00
/* Description RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_PASSING_FCS
Number of MPDUs received in this PPDU that passed the
FCS check after the moment the Coex TX started
(Note: The partially received MPDU when the COEX tx
start event came in falls in the after category)
*/
#define RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_PASSING_FCS_OFFSET 0x00000010
#define RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_PASSING_FCS_LSB 16
#define RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_PASSING_FCS_MASK 0x00ff0000
/* Description RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_FAILING_FCS
Number of MPDUs received in this PPDU that failed the
FCS check after the moment the Coex TX started
(Note: The partially received MPDU when the COEX tx
start event came in falls in the after category)
*/
#define RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_FAILING_FCS_OFFSET 0x00000010
#define RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_FAILING_FCS_LSB 24
#define RXPCU_PPDU_END_INFO_4_AFTER_MPDU_COUNT_FAILING_FCS_MASK 0xff000000
/* Description RXPCU_PPDU_END_INFO_5_PHY_TIMESTAMP_TX_LOWER_32
The PHY timestamp in the AMPI of the most recent rising
edge (TODO: of what ???) after the TX_PHY_DESC.  This field
indicates the lower 32 bits of the timestamp
*/
#define RXPCU_PPDU_END_INFO_5_PHY_TIMESTAMP_TX_LOWER_32_OFFSET 0x00000014
#define RXPCU_PPDU_END_INFO_5_PHY_TIMESTAMP_TX_LOWER_32_LSB 0
#define RXPCU_PPDU_END_INFO_5_PHY_TIMESTAMP_TX_LOWER_32_MASK 0xffffffff
/* Description RXPCU_PPDU_END_INFO_6_PHY_TIMESTAMP_TX_UPPER_32
The PHY timestamp in the AMPI of the most recent rising
edge (TODO: of what ???) after the TX_PHY_DESC.  This field
indicates the upper 32 bits of the timestamp
*/
#define RXPCU_PPDU_END_INFO_6_PHY_TIMESTAMP_TX_UPPER_32_OFFSET 0x00000018
#define RXPCU_PPDU_END_INFO_6_PHY_TIMESTAMP_TX_UPPER_32_LSB 0
#define RXPCU_PPDU_END_INFO_6_PHY_TIMESTAMP_TX_UPPER_32_MASK 0xffffffff
/* Description RXPCU_PPDU_END_INFO_7_BB_LENGTH
Indicates the number of bytes of baseband information
for PPDUs where the BB descriptor preamble type is 0x80 to
0xFF which indicates that this is not a normal PPDU but
rather contains baseband debug information.
TODO: Is this still needed ???
*/
#define RXPCU_PPDU_END_INFO_7_BB_LENGTH_OFFSET 0x0000001c
#define RXPCU_PPDU_END_INFO_7_BB_LENGTH_LSB 0
#define RXPCU_PPDU_END_INFO_7_BB_LENGTH_MASK 0x0000ffff
/* Description RXPCU_PPDU_END_INFO_7_BB_DATA
Indicates that BB data associated with this PPDU will
exist in the receive buffer. The exact contents of this BB
data can be found by decoding the BB TLV in the buffer
associated with the BB data. See vector_fragment in the
Helium_mac_phy_interface.docx
*/
#define RXPCU_PPDU_END_INFO_7_BB_DATA_OFFSET 0x0000001c
#define RXPCU_PPDU_END_INFO_7_BB_DATA_LSB 16
#define RXPCU_PPDU_END_INFO_7_BB_DATA_MASK 0x00010000
/* Description RXPCU_PPDU_END_INFO_7_RESERVED_7
Reserved: HW should fill with 0, FW should ignore.
*/
#define RXPCU_PPDU_END_INFO_7_RESERVED_7_OFFSET 0x0000001c
#define RXPCU_PPDU_END_INFO_7_RESERVED_7_LSB 17
#define RXPCU_PPDU_END_INFO_7_RESERVED_7_MASK 0xfffe0000
/* Description RXPCU_PPDU_END_INFO_8_RX_PPDU_DURATION
The length of this PPDU reception in us
*/
#define RXPCU_PPDU_END_INFO_8_RX_PPDU_DURATION_OFFSET 0x00000020
#define RXPCU_PPDU_END_INFO_8_RX_PPDU_DURATION_LSB 0
#define RXPCU_PPDU_END_INFO_8_RX_PPDU_DURATION_MASK 0x00ffffff
/* Description RXPCU_PPDU_END_INFO_8_RESERVED_8
<legal 0>
*/
#define RXPCU_PPDU_END_INFO_8_RESERVED_8_OFFSET 0x00000020
#define RXPCU_PPDU_END_INFO_8_RESERVED_8_LSB 24
#define RXPCU_PPDU_END_INFO_8_RESERVED_8_MASK 0xff000000
/* Description RXPCU_PPDU_END_INFO_9_AST_INDEX
The AST index of the receive Ack/BA. This information
is provided from the TXPCU to the RXPCU for receive Ack/BA
for implicit beamforming.
<legal all>
*/
#define RXPCU_PPDU_END_INFO_9_AST_INDEX_OFFSET 0x00000024
#define RXPCU_PPDU_END_INFO_9_AST_INDEX_LSB 0
#define RXPCU_PPDU_END_INFO_9_AST_INDEX_MASK 0x0000ffff
/* Description RXPCU_PPDU_END_INFO_9_AST_INDEX_VALID
Indicates that ast_index is valid. Should only be set
for receive Ack/BA where single stream implicit sounding is
captured.
*/
#define RXPCU_PPDU_END_INFO_9_AST_INDEX_VALID_OFFSET 0x00000024
#define RXPCU_PPDU_END_INFO_9_AST_INDEX_VALID_LSB 16
#define RXPCU_PPDU_END_INFO_9_AST_INDEX_VALID_MASK 0x00010000
/* Description RXPCU_PPDU_END_INFO_9_RESERVED_9
<legal 0>
*/
#define RXPCU_PPDU_END_INFO_9_RESERVED_9_OFFSET 0x00000024
#define RXPCU_PPDU_END_INFO_9_RESERVED_9_LSB 17
#define RXPCU_PPDU_END_INFO_9_RESERVED_9_MASK 0xfffe0000
#define RXPCU_PPDU_END_INFO_10_PHYRX_ABORT_REQUEST_INFO_PHYRX_ABORT_REQUEST_INFO_DETAILS_OFFSET 0x00000028
#define RXPCU_PPDU_END_INFO_10_PHYRX_ABORT_REQUEST_INFO_PHYRX_ABORT_REQUEST_INFO_DETAILS_LSB 17
#define RXPCU_PPDU_END_INFO_10_PHYRX_ABORT_REQUEST_INFO_PHYRX_ABORT_REQUEST_INFO_DETAILS_MASK 0xffffffff
#define RXPCU_PPDU_END_INFO_11_MACRX_ABORT_REQUEST_INFO_MACRX_ABORT_REQUEST_INFO_DETAILS_OFFSET 0x0000002c
#define RXPCU_PPDU_END_INFO_11_MACRX_ABORT_REQUEST_INFO_MACRX_ABORT_REQUEST_INFO_DETAILS_LSB 17
#define RXPCU_PPDU_END_INFO_11_MACRX_ABORT_REQUEST_INFO_MACRX_ABORT_REQUEST_INFO_DETAILS_MASK 0xffffffff
/* Description RXPCU_PPDU_END_INFO_12_RX_PPDU_END_MARKER
Field used by SW to double check that their structure
alignment is in sync with what HW has done.
<legal 0xAABBCCDD>
*/
#define RXPCU_PPDU_END_INFO_12_RX_PPDU_END_MARKER_OFFSET 0x00000030
#define RXPCU_PPDU_END_INFO_12_RX_PPDU_END_MARKER_LSB 0
#define RXPCU_PPDU_END_INFO_12_RX_PPDU_END_MARKER_MASK 0xffffffff
#endif // _RXPCU_PPDU_END_INFO_H_

Bestand weergeven

@@ -0,0 +1,636 @@
/*
* Copyright (c) 2018 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
// $ATH_LICENSE_HW_HDR_C$
//
// DO NOT EDIT! This file is automatically generated
// These definitions are tied to a particular hardware layout
#ifndef _VHT_SIG_A_INFO_H_
#define _VHT_SIG_A_INFO_H_
#if !defined(__ASSEMBLER__)
#endif
// ################ START SUMMARY #################
//
// Dword Fields
// 0 bandwidth[1:0], vhta_reserved_0[2], stbc[3], group_id[9:4], n_sts[21:10], txop_ps_not_allowed[22], vhta_reserved_0b[23], reserved_0[31:24]
// 1 gi_setting[1:0], su_mu_coding[2], ldpc_extra_symbol[3], mcs[7:4], beamformed[8], vhta_reserved_1[9], crc[17:10], tail[23:18], reserved_1[31:24]
//
// ################ END SUMMARY #################
#define NUM_OF_DWORDS_VHT_SIG_A_INFO 2
struct vht_sig_a_info {
uint32_t bandwidth : 2, //[1:0]
vhta_reserved_0 : 1, //[2]
stbc : 1, //[3]
group_id : 6, //[9:4]
n_sts : 12, //[21:10]
txop_ps_not_allowed : 1, //[22]
vhta_reserved_0b : 1, //[23]
reserved_0 : 8; //[31:24]
uint32_t gi_setting : 2, //[1:0]
su_mu_coding : 1, //[2]
ldpc_extra_symbol : 1, //[3]
mcs : 4, //[7:4]
beamformed : 1, //[8]
vhta_reserved_1 : 1, //[9]
crc : 8, //[17:10]
tail : 6, //[23:18]
reserved_1 : 8; //[31:24]
};
/*
bandwidth
Packet bandwidth
<enum 0 20_MHZ_11AC>
<enum 1 40_MHZ_11AC>
<enum 2 80_MHZ_11AC>
<enum 3 160_MHZ_11AC>
<legal 0-3>
vhta_reserved_0
Reserved. Set to 1 by MAC, PHY should ignore
<legal 1>
stbc
Space time block coding:
<enum 0 stbc_disabled> Indicates STBC is disabled
<enum 1 stbc_enabled> Indicates STBC is enabled on
all streams
<legal 0-1>
group_id
In a SU VHT PPDU, if the PPDU carries MPDU(s) addressed
to an AP or to a mesh STA, the Group ID field is set to 0,
otherwise it is set to 63. In an NDP PPDU the Group ID is
set according to IEEE 802.11ac_D1.0 Section 9.30.6
(Transmission of a VHT NDP). For a MU-MIMO PPDU the Group ID
is set as in 802.11ac_D1.0 Section 22.3.11.3 (Group ID).
<legal all>
n_sts
For MU:
3 bits/user with maximum of 4 users (user u uses
vht_sig_a[0][10+3u] - vht_sig_a[0][12+3u]), u = 0, 1, 2,
3)
Set to 0 for 0 space time streams
Set to 1 for 1 space time stream
Set to 2 for 2 space time streams
Set to 3 for 3 space time streams
Set to 4 for 4 space time streams (not supported in Wifi
3.0)
Values 5-7 are reserved
In this field, references to user u should be
interpreted as MU user u. As described in the previous
chapter in this document (see chapter on User number), the
MU user value for a given client is defined for each MU
group that the client participates in. The MU user number is
not related to the internal user number that is used within
the BFer.
For SU:
vht_sig_a[0][12:10]
Set to 0 for 1 space time stream
Set to 1 for 2 space time streams
Set to 2 for 3 space time streams
Set to 3 for 4 space time streams
Set to 4 for 5 space time streams
Set to 5 for 6 space time streams
Set to 6 for 7 space time streams
Set to 7 for 8 space time streams
vht_sig_a[0][21:13]
Partial AID:
Set to the value of the TXVECTOR parameter PARTIAL_AID.
Partial AID provides an abbreviated indication of the
intended recipient(s) of the frame (see IEEE802.11ac_D1.0
Section 9.17a (Partial AID in VHT PPDUs)).
<legal all>
txop_ps_not_allowed
E_num 0 txop_ps_allowed Not supported: If set to by
VHT AP if it allows non-AP VHT STAs in TXOP power save mode
to enter Doze state during a TXOP
<enum 1 no_txop_ps_allowed> Otherwise
<legal 1>
vhta_reserved_0b
Reserved: Should be set to 1 by the MAC and ignored by
the PHY <legal 1>
reserved_0
This field is not part of HT-SIG:
Reserved: Should be set to 0 by the MAC and ignored by
the PHY <legal 0>
gi_setting
<enum 0 normal_gi> Indicates short guard interval
is not used in the data field
<enum 1 short_gi> Indicates short guard interval is
used in the data field
<enum 3 short_gi_ambiguity> Indicates short guard
interval is used in the data field and NSYM mod 10 = 9
NSYM is defined in IEEE802.11ac_D1.0 Section 22.4.3
(TXTIME and PSDU_LENGTH calculation).
<legal 0,1,3>
su_mu_coding
For an SU PPDU, B2 is set to 0 for BCC, 1 for LDPC For
an MU PPDU, if the MU[0] NSTS field is nonzero(#6773), then
B2 indicates the coding used for user 0; set to 0 for BCC
and 1 for LDPC. If the MU[0] NSTS field is 0, then this
field is reserved and set to 1
ldpc_extra_symbol
Set to 1 if the LDPC PPDU encoding process (if an SU
PPDU), or at least one LDPC user's PPDU encoding process (if
an MU PPDU), results in an extra OFDM symbol (or symbols) as
described in 22.3.10.5.4 (LDPC coding) and 22.3.10.5.5
(Encoding process for MU PPDUs). Set to 0 otherwise.
mcs
For SU:
Set to 0 for BPSK 1/2
Set to 1 for QPSK 1/2
Set to 2 for QPSK 3/4
Set to 3 for 16-QAM 1/2
Set to 4 for 16-QAM 3/4
Set to 5 for 64-QAM 2/3
Set to 6 for 64-QAM 3/4
Set to 7 for 64-QAM 5/6
Set to 8 for 256-QAM 3/4
Set to 9 for 256-QAM 5/6
For MU:
If NSTS for user 1 is non-zero, then vht_sig_a[1][4]
indicates coding for user 1: set to 0 for BCC, 1 for LDPC.
If NSTS for user 1 is set to 0, then vht_sig_a[1][4] is
reserved and set to 1.
If NSTS for user 2 is non-zero, then vht_sig_a[1][5]
indicates coding for user 2: set to 0 for BCC, 1 for LDPC.
If NSTS for user 2 is set to 0, then vht_sig_a[1][5] is
reserved and set to 1.
If NSTS for user 3 is non-zero, then vht_sig_a[1][6]
indicates coding for user 3: set to 0 for BCC, 1 for LDPC.
If NSTS for user 3 is set to 0, then vht_sig_a[1][6] is
reserved and set to 1.
vht_sig_a[1][7] is reserved and set to 1
<legal 0-15>
beamformed
For SU:
Set to 1 if a Beamforming steering matrix is applied to
the waveform in an SU transmission as described in
IEEE802.11ac_D1.0 Section 19.3.11.11.2 (Spatial mapping),
set to 0 otherwise.
For MU:
Reserved and set to 1
<legal 0-1>
vhta_reserved_1
Reserved and set to 1. <legal 1>
crc
CRC calculated as in IEEE802.11ac_D1.0 Section
19.3.9.4.4 (CRC calculation for HTSIG) with C7 in
vht_sig_a[1][10], etc. <legal all>
tail
Used to terminate the trellis of the convolutional
decoder. Set to 0. <legal 0>
reserved_1
This field is not part of HT-SIG:
Reserved: Should be set to 0 by the MAC and ignored by
the PHY <legal 0>
*/
/* Description VHT_SIG_A_INFO_0_BANDWIDTH
Packet bandwidth
<enum 0 20_MHZ_11AC>
<enum 1 40_MHZ_11AC>
<enum 2 80_MHZ_11AC>
<enum 3 160_MHZ_11AC>
<legal 0-3>
*/
#define VHT_SIG_A_INFO_0_BANDWIDTH_OFFSET 0x00000000
#define VHT_SIG_A_INFO_0_BANDWIDTH_LSB 0
#define VHT_SIG_A_INFO_0_BANDWIDTH_MASK 0x00000003
/* Description VHT_SIG_A_INFO_0_VHTA_RESERVED_0
Reserved. Set to 1 by MAC, PHY should ignore
<legal 1>
*/
#define VHT_SIG_A_INFO_0_VHTA_RESERVED_0_OFFSET 0x00000000
#define VHT_SIG_A_INFO_0_VHTA_RESERVED_0_LSB 2
#define VHT_SIG_A_INFO_0_VHTA_RESERVED_0_MASK 0x00000004
/* Description VHT_SIG_A_INFO_0_STBC
Space time block coding:
<enum 0 stbc_disabled> Indicates STBC is disabled
<enum 1 stbc_enabled> Indicates STBC is enabled on
all streams
<legal 0-1>
*/
#define VHT_SIG_A_INFO_0_STBC_OFFSET 0x00000000
#define VHT_SIG_A_INFO_0_STBC_LSB 3
#define VHT_SIG_A_INFO_0_STBC_MASK 0x00000008
/* Description VHT_SIG_A_INFO_0_GROUP_ID
In a SU VHT PPDU, if the PPDU carries MPDU(s) addressed
to an AP or to a mesh STA, the Group ID field is set to 0,
otherwise it is set to 63. In an NDP PPDU the Group ID is
set according to IEEE 802.11ac_D1.0 Section 9.30.6
(Transmission of a VHT NDP). For a MU-MIMO PPDU the Group ID
is set as in 802.11ac_D1.0 Section 22.3.11.3 (Group ID).
<legal all>
*/
#define VHT_SIG_A_INFO_0_GROUP_ID_OFFSET 0x00000000
#define VHT_SIG_A_INFO_0_GROUP_ID_LSB 4
#define VHT_SIG_A_INFO_0_GROUP_ID_MASK 0x000003f0
/* Description VHT_SIG_A_INFO_0_N_STS
For MU:
3 bits/user with maximum of 4 users (user u uses
vht_sig_a[0][10+3u] - vht_sig_a[0][12+3u]), u = 0, 1, 2,
3)
Set to 0 for 0 space time streams
Set to 1 for 1 space time stream
Set to 2 for 2 space time streams
Set to 3 for 3 space time streams
Set to 4 for 4 space time streams (not supported in Wifi
3.0)
Values 5-7 are reserved
In this field, references to user u should be
interpreted as MU user u. As described in the previous
chapter in this document (see chapter on User number), the
MU user value for a given client is defined for each MU
group that the client participates in. The MU user number is
not related to the internal user number that is used within
the BFer.
For SU:
vht_sig_a[0][12:10]
Set to 0 for 1 space time stream
Set to 1 for 2 space time streams
Set to 2 for 3 space time streams
Set to 3 for 4 space time streams
Set to 4 for 5 space time streams
Set to 5 for 6 space time streams
Set to 6 for 7 space time streams
Set to 7 for 8 space time streams
vht_sig_a[0][21:13]
Partial AID:
Set to the value of the TXVECTOR parameter PARTIAL_AID.
Partial AID provides an abbreviated indication of the
intended recipient(s) of the frame (see IEEE802.11ac_D1.0
Section 9.17a (Partial AID in VHT PPDUs)).
<legal all>
*/
#define VHT_SIG_A_INFO_0_N_STS_OFFSET 0x00000000
#define VHT_SIG_A_INFO_0_N_STS_LSB 10
#define VHT_SIG_A_INFO_0_N_STS_MASK 0x003ffc00
/* Description VHT_SIG_A_INFO_0_TXOP_PS_NOT_ALLOWED
E_num 0 txop_ps_allowed Not supported: If set to by
VHT AP if it allows non-AP VHT STAs in TXOP power save mode
to enter Doze state during a TXOP
<enum 1 no_txop_ps_allowed> Otherwise
<legal 1>
*/
#define VHT_SIG_A_INFO_0_TXOP_PS_NOT_ALLOWED_OFFSET 0x00000000
#define VHT_SIG_A_INFO_0_TXOP_PS_NOT_ALLOWED_LSB 22
#define VHT_SIG_A_INFO_0_TXOP_PS_NOT_ALLOWED_MASK 0x00400000
/* Description VHT_SIG_A_INFO_0_VHTA_RESERVED_0B
Reserved: Should be set to 1 by the MAC and ignored by
the PHY <legal 1>
*/
#define VHT_SIG_A_INFO_0_VHTA_RESERVED_0B_OFFSET 0x00000000
#define VHT_SIG_A_INFO_0_VHTA_RESERVED_0B_LSB 23
#define VHT_SIG_A_INFO_0_VHTA_RESERVED_0B_MASK 0x00800000
/* Description VHT_SIG_A_INFO_0_RESERVED_0
This field is not part of HT-SIG:
Reserved: Should be set to 0 by the MAC and ignored by
the PHY <legal 0>
*/
#define VHT_SIG_A_INFO_0_RESERVED_0_OFFSET 0x00000000
#define VHT_SIG_A_INFO_0_RESERVED_0_LSB 24
#define VHT_SIG_A_INFO_0_RESERVED_0_MASK 0xff000000
/* Description VHT_SIG_A_INFO_1_GI_SETTING
<enum 0 normal_gi> Indicates short guard interval
is not used in the data field
<enum 1 short_gi> Indicates short guard interval is
used in the data field
<enum 3 short_gi_ambiguity> Indicates short guard
interval is used in the data field and NSYM mod 10 = 9
NSYM is defined in IEEE802.11ac_D1.0 Section 22.4.3
(TXTIME and PSDU_LENGTH calculation).
<legal 0,1,3>
*/
#define VHT_SIG_A_INFO_1_GI_SETTING_OFFSET 0x00000004
#define VHT_SIG_A_INFO_1_GI_SETTING_LSB 0
#define VHT_SIG_A_INFO_1_GI_SETTING_MASK 0x00000003
/* Description VHT_SIG_A_INFO_1_SU_MU_CODING
For an SU PPDU, B2 is set to 0 for BCC, 1 for LDPC For
an MU PPDU, if the MU[0] NSTS field is nonzero(#6773), then
B2 indicates the coding used for user 0; set to 0 for BCC
and 1 for LDPC. If the MU[0] NSTS field is 0, then this
field is reserved and set to 1
*/
#define VHT_SIG_A_INFO_1_SU_MU_CODING_OFFSET 0x00000004
#define VHT_SIG_A_INFO_1_SU_MU_CODING_LSB 2
#define VHT_SIG_A_INFO_1_SU_MU_CODING_MASK 0x00000004
/* Description VHT_SIG_A_INFO_1_LDPC_EXTRA_SYMBOL
Set to 1 if the LDPC PPDU encoding process (if an SU
PPDU), or at least one LDPC user's PPDU encoding process (if
an MU PPDU), results in an extra OFDM symbol (or symbols) as
described in 22.3.10.5.4 (LDPC coding) and 22.3.10.5.5
(Encoding process for MU PPDUs). Set to 0 otherwise.
*/
#define VHT_SIG_A_INFO_1_LDPC_EXTRA_SYMBOL_OFFSET 0x00000004
#define VHT_SIG_A_INFO_1_LDPC_EXTRA_SYMBOL_LSB 3
#define VHT_SIG_A_INFO_1_LDPC_EXTRA_SYMBOL_MASK 0x00000008
/* Description VHT_SIG_A_INFO_1_MCS
For SU:
Set to 0 for BPSK 1/2
Set to 1 for QPSK 1/2
Set to 2 for QPSK 3/4
Set to 3 for 16-QAM 1/2
Set to 4 for 16-QAM 3/4
Set to 5 for 64-QAM 2/3
Set to 6 for 64-QAM 3/4
Set to 7 for 64-QAM 5/6
Set to 8 for 256-QAM 3/4
Set to 9 for 256-QAM 5/6
For MU:
If NSTS for user 1 is non-zero, then vht_sig_a[1][4]
indicates coding for user 1: set to 0 for BCC, 1 for LDPC.
If NSTS for user 1 is set to 0, then vht_sig_a[1][4] is
reserved and set to 1.
If NSTS for user 2 is non-zero, then vht_sig_a[1][5]
indicates coding for user 2: set to 0 for BCC, 1 for LDPC.
If NSTS for user 2 is set to 0, then vht_sig_a[1][5] is
reserved and set to 1.
If NSTS for user 3 is non-zero, then vht_sig_a[1][6]
indicates coding for user 3: set to 0 for BCC, 1 for LDPC.
If NSTS for user 3 is set to 0, then vht_sig_a[1][6] is
reserved and set to 1.
vht_sig_a[1][7] is reserved and set to 1
<legal 0-15>
*/
#define VHT_SIG_A_INFO_1_MCS_OFFSET 0x00000004
#define VHT_SIG_A_INFO_1_MCS_LSB 4
#define VHT_SIG_A_INFO_1_MCS_MASK 0x000000f0
/* Description VHT_SIG_A_INFO_1_BEAMFORMED
For SU:
Set to 1 if a Beamforming steering matrix is applied to
the waveform in an SU transmission as described in
IEEE802.11ac_D1.0 Section 19.3.11.11.2 (Spatial mapping),
set to 0 otherwise.
For MU:
Reserved and set to 1
<legal 0-1>
*/
#define VHT_SIG_A_INFO_1_BEAMFORMED_OFFSET 0x00000004
#define VHT_SIG_A_INFO_1_BEAMFORMED_LSB 8
#define VHT_SIG_A_INFO_1_BEAMFORMED_MASK 0x00000100
/* Description VHT_SIG_A_INFO_1_VHTA_RESERVED_1
Reserved and set to 1. <legal 1>
*/
#define VHT_SIG_A_INFO_1_VHTA_RESERVED_1_OFFSET 0x00000004
#define VHT_SIG_A_INFO_1_VHTA_RESERVED_1_LSB 9
#define VHT_SIG_A_INFO_1_VHTA_RESERVED_1_MASK 0x00000200
/* Description VHT_SIG_A_INFO_1_CRC
CRC calculated as in IEEE802.11ac_D1.0 Section
19.3.9.4.4 (CRC calculation for HTSIG) with C7 in
vht_sig_a[1][10], etc. <legal all>
*/
#define VHT_SIG_A_INFO_1_CRC_OFFSET 0x00000004
#define VHT_SIG_A_INFO_1_CRC_LSB 10
#define VHT_SIG_A_INFO_1_CRC_MASK 0x0003fc00
/* Description VHT_SIG_A_INFO_1_TAIL
Used to terminate the trellis of the convolutional
decoder. Set to 0. <legal 0>
*/
#define VHT_SIG_A_INFO_1_TAIL_OFFSET 0x00000004
#define VHT_SIG_A_INFO_1_TAIL_LSB 18
#define VHT_SIG_A_INFO_1_TAIL_MASK 0x00fc0000
/* Description VHT_SIG_A_INFO_1_RESERVED_1
This field is not part of HT-SIG:
Reserved: Should be set to 0 by the MAC and ignored by
the PHY <legal 0>
*/
#define VHT_SIG_A_INFO_1_RESERVED_1_OFFSET 0x00000004
#define VHT_SIG_A_INFO_1_RESERVED_1_LSB 24
#define VHT_SIG_A_INFO_1_RESERVED_1_MASK 0xff000000
#endif // _VHT_SIG_A_INFO_H_