Merge remote-tracking branch 'quic/display-kernel.lnx.5.10' into display-kernel.lnx.5.15

* quic/display-kernel.lnx.5.10:
  disp: msm: sde: avoid error during fal10_veto override enablement
  disp: msm: update copyright description
  disp: msm: sde: configure dest_scaler op_mode for two independent displays
  disp: msm: dp: updated copyright set for 4nm target
  Revert "disp: msm: sde: consider max of actual and default prefill lines"
  disp: msm: sde: Reset backlight scale when HWC is stopped
  disp: msm: dp: avoid duplicate read of link status
  disp: msm: dsi: update vreg_ctrl settings for cape
  disp: msm: fail commit if drm_gem_obj was found attached to a sec CB
  disp: msm: dp: updated register values for 4nm target
  disp: msm: sde: update framedata event handling
  disp: msm: dsi: Add new phy comaptible string for cape
  disp: msm: sde: software override for fal10 in cwb enable
  disp: msm: update cleanup during bind failure in msm_drm_component_init
  disp: msm: sde: dump user input_fence info on spec fence timeout
  disp: msm: sde: add null pointer check for encoder current master
  disp: msm: dsi: enable DMA start window scheduling for broadcast commands
  disp: msm: sde: avoid alignment checks for linear formats
  disp: msm: reset thread priority work on every new run
  disp: msm: sde: send power on event for cont. splash
  disp: msm: sde: always set CTL_x_UIDLE_ACTIVE register to "1"
  disp: msm: use vzalloc for large allocations
  disp: msm: sde: Add support to limit DSC size to 10k
  disp: msm: sde: add tx wait during DMS for sim panel
  disp: msm: dsi: add check for any queued DSI CMDs before clock force update
  disp: msm: sde: correct pp block allocation during dcwb dither programming
  disp: msm: sde: avoid setting of max vblank count
  disp: msm: sde: add cached lut flag in sde plane
  disp: msm: sde: avoid use after free in msm_lastclose
  disp: msm: sde: update TEAR_SYNC_WRCOUNT register before vsync counter
  disp: msm: dsi: Support uncompressed rgb101010 format
  disp: msm: sde: update idle_pc_enabled flag for all encoders
  disp: msm: sde: flush esd work before disabling the encoder
  disp: msm: sde: allow qsync update along with modeset
  disp: msm: dp: avoid dp sw reset on disconnect path
  disp: msm: sde: consider max of actual and default prefill lines
  disp: msm: ensure vbif debugbus not in use is disabled
  disp: msm: sde: update cached encoder mask if required
  disp: msm: sde: while timing engine enabling poll for active region
  disp: msm: enable cache flag for dumb buffer
  disp: msm: sde: disable ot limit for cwb
  disp: msm: sde: avoid race condition at vm release
  disp: msm: dsi: set qsync min fps list length to zero
  disp: msm: sde: reset mixers in crtc when ctl datapath switches
  disp: msm: sde: update vm state atomic check for non-primary usecases
  disp: msm: sde: reset CTL_UIDLE_ACTIVE register only if uidle is disabled

Change-Id: If480e7f33743eb4788549f853ba05e744ecb38d3
Signed-off-by: Narendra Muppalla <quic_nmuppall@quicinc.com>
此提交包含在:
Narendra Muppalla
2022-02-07 10:52:13 -08:00
當前提交 daa511cb90
共有 39 個檔案被更改,包括 558 行新增176 行删除

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@@ -1337,9 +1337,11 @@ int sde_kms_vm_pre_release(struct sde_kms *sde_kms,
/* if vm_req is enabled, once CRTC on the commit is guaranteed */
sde_kms_wait_for_frame_transfer_complete(&sde_kms->base, crtc);
sde_dbg_set_hw_ownership_status(false);
sde_kms_cancel_delayed_work(crtc);
/* disable SDE irq's */
/* disable SDE encoder irq's */
drm_for_each_encoder_mask(encoder, crtc->dev,
crtc->state->encoder_mask) {
if (sde_encoder_in_clone_mode(encoder))
@@ -1349,8 +1351,6 @@ int sde_kms_vm_pre_release(struct sde_kms *sde_kms,
}
if (is_primary) {
/* disable IRQ line */
sde_irq_update(&sde_kms->base, false);
/* disable vblank events */
drm_crtc_vblank_off(crtc);
@@ -1359,8 +1359,6 @@ int sde_kms_vm_pre_release(struct sde_kms *sde_kms,
sde_crtc_reset_sw_state(crtc);
}
sde_dbg_set_hw_ownership_status(false);
return rc;
}
@@ -1444,17 +1442,22 @@ int sde_kms_vm_primary_post_commit(struct sde_kms *sde_kms,
/* properly handoff color processing features */
sde_cp_crtc_vm_primary_handoff(crtc);
sde_vm_lock(sde_kms);
/* handle non-SDE clients pre-release */
if (vm_ops->vm_client_pre_release) {
rc = vm_ops->vm_client_pre_release(sde_kms);
if (rc) {
SDE_ERROR("sde vm client pre_release failed, rc=%d\n",
rc);
sde_vm_unlock(sde_kms);
goto exit;
}
}
sde_vm_lock(sde_kms);
/* disable IRQ line */
sde_irq_update(&sde_kms->base, false);
/* release HW */
if (vm_ops->vm_release) {
rc = vm_ops->vm_release(sde_kms);
@@ -2858,7 +2861,7 @@ static int sde_kms_check_vm_request(struct msm_kms *kms,
struct sde_vm_ops *vm_ops;
enum sde_crtc_vm_req old_vm_req = VM_REQ_NONE, new_vm_req = VM_REQ_NONE;
int i, rc = 0;
bool vm_req_active = false;
bool vm_req_active = false, prev_vm_req = false;
bool vm_owns_hw;
if (!kms || !state)
@@ -2872,6 +2875,14 @@ static int sde_kms_check_vm_request(struct msm_kms *kms,
if (!vm_ops->vm_request_valid || !vm_ops->vm_owns_hw || !vm_ops->vm_acquire)
return -EINVAL;
drm_for_each_crtc(crtc, state->dev) {
if (crtc->state && (sde_crtc_get_property(to_sde_crtc_state(crtc->state),
CRTC_PROP_VM_REQ_STATE) == VM_REQ_RELEASE)) {
prev_vm_req = true;
break;
}
}
/* check for an active vm request */
for_each_oldnew_crtc_in_state(state, crtc, old_cstate, new_cstate, i) {
struct sde_crtc_state *old_state = NULL, *new_state = NULL;
@@ -2885,8 +2896,12 @@ static int sde_kms_check_vm_request(struct msm_kms *kms,
old_state = to_sde_crtc_state(old_cstate);
old_vm_req = sde_crtc_get_property(old_state, CRTC_PROP_VM_REQ_STATE);
/* No active request if the transition is from VM_REQ_NONE to VM_REQ_NONE */
if (old_vm_req || new_vm_req) {
/*
* VM request should be validated in the following usecases
* - There is a vm request(other than VM_REQ_NONE) on current/prev crtc state.
* - Previously, vm transition has taken place on one of the crtc's.
*/
if (old_vm_req || new_vm_req || prev_vm_req) {
if (!vm_req_active) {
sde_vm_lock(sde_kms);
vm_owns_hw = sde_vm_owns_hw(sde_kms);