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qcacmn: Add support to affine individual grp irqs

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Add support to affine individual grp irqs to either
perf or non-perf cluster.

Change-Id: I90006645acb82b71c63d2255722e2c67bb7a2f46
CRs-Fixed: 3059676
This commit is contained in:
Yeshwanth Sriram Guntuka
2021-10-16 19:36:40 +05:30
committed by Madan Koyyalamudi
parent 6c7d7a2b2e
commit d9eb751658
18 changed files with 140 additions and 25 deletions
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21
dp/inc/cdp_txrx_misc.h
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@@ -1,5 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -939,4 +940,24 @@ cdp_display_txrx_hw_info(ol_txrx_soc_handle soc)
if (soc->ops->misc_ops->display_txrx_hw_info)
return soc->ops->misc_ops->display_txrx_hw_info(soc);
}
/**
* cdp_get_tx_rings_grp_bitmap() - Get tx rings grp bitmap
* @soc: soc handle
*
* Return: tx rings bitmap
*/
static inline uint32_t
cdp_get_tx_rings_grp_bitmap(ol_txrx_soc_handle soc)
{
if (!soc || !soc->ops || !soc->ops->misc_ops) {
dp_cdp_debug("Invalid Instance:");
return 0;
}
if (soc->ops->misc_ops->get_tx_rings_grp_bitmap)
return soc->ops->misc_ops->get_tx_rings_grp_bitmap(soc);
return 0;
}
#endif /* _CDP_TXRX_MISC_H_ */

3
dp/inc/cdp_txrx_ops.h
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@@ -1,6 +1,6 @@
/*
* Copyright (c) 2017-2021 The Linux Foundation. All rights reserved.
*
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -1369,6 +1369,7 @@ struct cdp_misc_ops {
uint8_t val);
uint8_t (*is_swlm_enabled)(struct cdp_soc_t *soc_hdl);
void (*display_txrx_hw_info)(struct cdp_soc_t *soc_hdl);
uint32_t (*get_tx_rings_grp_bitmap)(struct cdp_soc_t *soc_hdl);
};
/**

9
dp/wifi3.0/dp_main.c
View File

@@ -11862,6 +11862,14 @@ void dp_reset_rx_hw_ext_stats(struct cdp_soc_t *soc_hdl)
}
#endif /* WLAN_FEATURE_STATS_EXT */
static
uint32_t dp_get_tx_rings_grp_bitmap(struct cdp_soc_t *soc_hdl)
{
struct dp_soc *soc = (struct dp_soc *)soc_hdl;
return soc->wlan_cfg_ctx->tx_rings_grp_bitmap;
}
#ifdef DP_PEER_EXTENDED_API
static struct cdp_misc_ops dp_ops_misc = {
#ifdef FEATURE_WLAN_TDLS
@@ -11891,6 +11899,7 @@ static struct cdp_misc_ops dp_ops_misc = {
.is_swlm_enabled = dp_soc_is_swlm_enabled,
#endif
.display_txrx_hw_info = dp_display_srng_info,
.get_tx_rings_grp_bitmap = dp_get_tx_rings_grp_bitmap,
};
#endif

14
hif/inc/hif.h
View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2013-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -2090,4 +2091,17 @@ static inline int hif_system_pm_state_check(struct hif_opaque_softc *hif)
return 0;
}
#endif
/**
* hif_set_grp_intr_affinity() - API to set affinity for grp
* intrs set in the bitmap
* @scn: hif handle
* @grp_intr_bitmask: grp intrs for which perf affinity should be
* applied
* @perf: affine to perf or non-perf cluster
*
* Return: None
*/
void hif_set_grp_intr_affinity(struct hif_opaque_softc *scn,
uint32_t grp_intr_bitmask, bool perf);
#endif /* _HIF_H_ */

6
hif/src/dispatcher/dummy.c
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@@ -1,5 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -456,3 +457,8 @@ int hif_dummy_disable_grp_irqs(struct hif_softc *scn)
{
return -EOPNOTSUPP;
}
void hif_dummy_set_grp_intr_affinity(struct hif_softc *scn,
uint32_t grp_intr_bitmap, bool perf)
{
}

3
hif/src/dispatcher/dummy.h
View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -95,3 +96,5 @@ int hif_dummy_enable_grp_irqs(struct hif_softc *scn);
int hif_dummy_disable_grp_irqs(struct hif_softc *scn);
void hif_dummy_config_irq_clear_cpu_affinity(struct hif_softc *scn,
int intr_ctxt_id, int cpu);
void hif_dummy_set_grp_intr_affinity(struct hif_softc *scn,
uint32_t grp_intr_bitmask, bool perf);

14
hif/src/dispatcher/multibus.c
View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2016-2018, 2020-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -66,6 +67,7 @@ static void hif_initialize_default_ops(struct hif_softc *hif_sc)
bus_ops->hif_disable_grp_irqs = &hif_dummy_enable_grp_irqs;
bus_ops->hif_config_irq_clear_cpu_affinity =
&hif_dummy_config_irq_clear_cpu_affinity;
bus_ops->hif_set_grp_intr_affinity = &hif_dummy_set_grp_intr_affinity;
}
#define NUM_OPS (sizeof(struct hif_bus_ops) / sizeof(void *))
@@ -708,3 +710,15 @@ int hif_enable_grp_irqs(struct hif_opaque_softc *scn)
return hif_sc->bus_ops.hif_enable_grp_irqs(hif_sc);
}
void hif_set_grp_intr_affinity(struct hif_opaque_softc *scn,
uint32_t grp_intr_bitmask, bool perf)
{
struct hif_softc *hif_sc = HIF_GET_SOFTC(scn);
if (!hif_sc)
return;
hif_sc->bus_ops.hif_set_grp_intr_affinity(hif_sc, grp_intr_bitmask,
perf);
}

3
hif/src/dispatcher/multibus.h
View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2016-2018, 2020-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -99,6 +100,8 @@ struct hif_bus_ops {
unsigned int *offset);
int (*hif_enable_grp_irqs)(struct hif_softc *scn);
int (*hif_disable_grp_irqs)(struct hif_softc *scn);
void (*hif_set_grp_intr_affinity)(struct hif_softc *scn,
uint32_t grp_intr_bitmask, bool perf);
};
#ifdef HIF_SNOC

2
hif/src/dispatcher/multibus_ahb.c
View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2016-2018,2020-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -78,6 +79,7 @@ QDF_STATUS hif_initialize_ahb_ops(struct hif_bus_ops *bus_ops)
&hif_dummy_config_irq_affinity;
bus_ops->hif_config_irq_by_ceid = &hif_ahb_configure_irq_by_ceid;
bus_ops->hif_log_bus_info = &hif_dummy_log_bus_info;
bus_ops->hif_set_grp_intr_affinity = &hif_dummy_set_grp_intr_affinity;
return QDF_STATUS_SUCCESS;
}

2
hif/src/dispatcher/multibus_ipci.c
View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
@@ -91,6 +92,7 @@ QDF_STATUS hif_initialize_ipci_ops(struct hif_softc *hif_sc)
bus_ops->hif_log_bus_info = &hif_dummy_log_bus_info;
bus_ops->hif_enable_grp_irqs = hif_ipci_enable_grp_irqs;
bus_ops->hif_disable_grp_irqs = hif_ipci_disable_grp_irqs;
bus_ops->hif_set_grp_intr_affinity = &hif_dummy_set_grp_intr_affinity;
return QDF_STATUS_SUCCESS;
}

2
hif/src/dispatcher/multibus_pci.c
View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -98,6 +99,7 @@ QDF_STATUS hif_initialize_pci_ops(struct hif_softc *hif_sc)
bus_ops->hif_config_irq_clear_cpu_affinity =
&hif_pci_config_irq_clear_cpu_affinity;
bus_ops->hif_log_bus_info = &hif_log_pcie_info;
bus_ops->hif_set_grp_intr_affinity = &hif_pci_set_grp_intr_affinity;
return QDF_STATUS_SUCCESS;
}

4
hif/src/dispatcher/multibus_snoc.c
View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2016-2018, 2020 The Linux Foundation. All rights reserved.
* Copyright (c) 2016-2018, 2020-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -80,6 +81,7 @@ QDF_STATUS hif_initialize_snoc_ops(struct hif_bus_ops *bus_ops)
bus_ops->hif_config_irq_affinity = &hif_dummy_config_irq_affinity;
bus_ops->hif_config_irq_by_ceid = &hif_dummy_config_irq_by_ceid;
bus_ops->hif_log_bus_info = &hif_dummy_log_bus_info;
bus_ops->hif_set_grp_intr_affinity = &hif_dummy_set_grp_intr_affinity;
return QDF_STATUS_SUCCESS;
}

13
hif/src/dispatcher/pci_api.h
View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -96,4 +97,16 @@ const char *hif_pci_get_irq_name(int irq_no);
*/
void hif_pci_config_irq_affinity(struct hif_softc *scn);
int hif_ce_msi_configure_irq_by_ceid(struct hif_softc *scn, int ce_id);
/*
* hif_pci_set_grp_intr_affinity() - Set irq affinity hint for grp
* intrs based on bitmask
* @scn: hif context
* @grp_intr_bitmask:
* @perf: affine to perf or non-perf cluster
*
* Return: None
*/
void hif_pci_set_grp_intr_affinity(struct hif_softc *scn,
uint32_t grp_intr_bitmask, bool perf);
#endif /* _PCI_API_H_ */

5
hif/src/hif_exec.c
View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2017-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -627,7 +628,8 @@ static int hif_exec_poll(struct napi_struct *napi, int budget)
actual_dones = work_done;
if (!hif_ext_group->force_break && work_done < normalized_budget) {
if (qdf_atomic_inc_not_zero(&hif_ext_group->force_napi_complete) ||
(!hif_ext_group->force_break && work_done < normalized_budget)) {
hif_record_event(hif_ext_group->hif, hif_ext_group->grp_id,
0, 0, 0, HIF_EVENT_BH_COMPLETE);
napi_complete(napi);
@@ -1018,6 +1020,7 @@ QDF_STATUS hif_register_ext_group(struct hif_opaque_softc *hif_ctx,
hif_ext_group->hif = hif_ctx;
hif_ext_group->context_name = context_name;
hif_ext_group->type = type;
qdf_atomic_init(&hif_ext_group->force_napi_complete);
hif_state->hif_num_extgroup++;
return QDF_STATUS_SUCCESS;

20
hif/src/hif_exec.h
View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2017-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -106,10 +107,9 @@ struct hif_exec_context {
enum hif_exec_type type;
unsigned long long poll_start_time;
bool force_break;
#if defined(HIF_CPU_PERF_AFFINE_MASK) || defined(HIF_CPU_CLEAR_AFFINITY)
/* Stores the affinity hint mask for each WLAN IRQ */
qdf_cpu_mask new_cpu_mask[HIF_MAX_GRP_IRQ];
#endif
qdf_atomic_t force_napi_complete;
};
/**
@@ -160,18 +160,20 @@ struct hif_exec_context *hif_exec_get_ctx(struct hif_opaque_softc *hif,
uint8_t id);
void hif_exec_kill(struct hif_opaque_softc *scn);
#ifdef HIF_CPU_PERF_AFFINE_MASK
/**
* hif_pci_irq_set_affinity_hint() - API to set IRQ affinity
* @hif_ext_group: hif_ext_group to extract the irq info
* @perf: affine to perf cluster or non-perf cluster
*
* This function will set the IRQ affinity to the gold cores
* only for defconfig builds
* This function will set the IRQ affinity to gold cores
* or silver cores based on perf flag
*
* Return: none
*/
void hif_pci_irq_set_affinity_hint(
struct hif_exec_context *hif_ext_group);
void hif_pci_irq_set_affinity_hint(struct hif_exec_context *hif_ext_group,
bool perf);
#ifdef HIF_CPU_PERF_AFFINE_MASK
/**
* hif_pci_ce_irq_set_affinity_hint() - API to set IRQ affinity
@@ -194,10 +196,6 @@ static inline void hif_ce_irq_remove_affinity_hint(int irq)
hif_irq_affinity_remove(irq);
}
#else
static inline void hif_pci_irq_set_affinity_hint(
struct hif_exec_context *hif_ext_group)
{
}
static inline void hif_pci_ce_irq_set_affinity_hint(
struct hif_softc *scn)

37
hif/src/pcie/if_pci.c
View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2013-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -3019,13 +3020,14 @@ const char *hif_pci_get_irq_name(int irq_no)
return "pci-dummy";
}
#ifdef HIF_CPU_PERF_AFFINE_MASK
void hif_pci_irq_set_affinity_hint(
struct hif_exec_context *hif_ext_group)
void hif_pci_irq_set_affinity_hint(struct hif_exec_context *hif_ext_group,
bool perf)
{
int i, ret;
unsigned int cpus;
bool mask_set = false;
int cpu_cluster = perf ? CPU_CLUSTER_TYPE_PERF :
CPU_CLUSTER_TYPE_LITTLE;
for (i = 0; i < hif_ext_group->numirq; i++)
qdf_cpumask_clear(&hif_ext_group->new_cpu_mask[i]);
@@ -3033,7 +3035,7 @@ void hif_pci_irq_set_affinity_hint(
for (i = 0; i < hif_ext_group->numirq; i++) {
qdf_for_each_online_cpu(cpus) {
if (qdf_topology_physical_package_id(cpus) ==
CPU_CLUSTER_TYPE_PERF) {
cpu_cluster) {
qdf_cpumask_set_cpu(cpus,
&hif_ext_group->
new_cpu_mask[i]);
@@ -3052,12 +3054,7 @@ void hif_pci_irq_set_affinity_hint(
qdf_dev_modify_irq_status(hif_ext_group->os_irq[i],
0, IRQ_NO_BALANCING);
if (ret)
qdf_err("Set affinity %*pbl fails for IRQ %d ",
qdf_cpumask_pr_args(&hif_ext_group->
new_cpu_mask[i]),
hif_ext_group->os_irq[i]);
else
qdf_debug("Set affinity %*pbl for IRQ: %d",
qdf_debug("Set affinity %*pbl fails for IRQ %d ",
qdf_cpumask_pr_args(&hif_ext_group->
new_cpu_mask[i]),
hif_ext_group->os_irq[i]);
@@ -3068,6 +3065,7 @@ void hif_pci_irq_set_affinity_hint(
}
}
#ifdef HIF_CPU_PERF_AFFINE_MASK
void hif_pci_ce_irq_set_affinity_hint(
struct hif_softc *scn)
{
@@ -3171,7 +3169,7 @@ void hif_pci_config_irq_affinity(struct hif_softc *scn)
/* Set IRQ affinity for WLAN DP interrupts*/
for (i = 0; i < hif_state->hif_num_extgroup; i++) {
hif_ext_group = hif_state->hif_ext_group[i];
hif_pci_irq_set_affinity_hint(hif_ext_group);
hif_pci_irq_set_affinity_hint(hif_ext_group, true);
}
/* Set IRQ affinity for CE interrupts*/
hif_pci_ce_irq_set_affinity_hint(scn);
@@ -3219,6 +3217,23 @@ int hif_pci_configure_grp_irq(struct hif_softc *scn,
return 0;
}
void hif_pci_set_grp_intr_affinity(struct hif_softc *scn,
uint32_t grp_intr_bitmask, bool perf)
{
int i;
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
struct hif_exec_context *hif_ext_group;
for (i = 0; i < hif_state->hif_num_extgroup; i++) {
if (!(grp_intr_bitmask & BIT(i)))
continue;
hif_ext_group = hif_state->hif_ext_group[i];
hif_pci_irq_set_affinity_hint(hif_ext_group, perf);
qdf_atomic_set(&hif_ext_group->force_napi_complete, -1);
}
}
#if (defined(QCA_WIFI_QCA6390) || defined(QCA_WIFI_QCA6490) || \
defined(QCA_WIFI_WCN7850))
uint32_t hif_pci_reg_read32(struct hif_softc *hif_sc,

3
wlan_cfg/wlan_cfg.c
View File

@@ -1502,6 +1502,9 @@ void wlan_cfg_fill_interrupt_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
wlan_cfg_ctx->int_tx_ring_mask[i] = tx_ring_intr_mask[i];
if (wlan_cfg_ctx->int_tx_ring_mask[i])
wlan_cfg_ctx->tx_rings_grp_bitmap |= BIT(i);
wlan_cfg_ctx->int_rx_mon_ring_mask[i] =
rx_mon_ring_mask_msi[i];
wlan_cfg_ctx->int_tx_mon_ring_mask[i] = 0;

4
wlan_cfg/wlan_cfg.h
View File

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2013-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -231,6 +232,8 @@ struct wlan_srng_cfg {
* @pkt_capture_mode: Packet capture mode config
* @rx_mon_buf_ring_size: Rx monitor buf ring size
* @tx_mon_buf_ring_size: Tx monitor buf ring size
* @tx_rings_grp_bitmap: bitmap of group intr contexts which have
* non-zero tx ring mask
*/
struct wlan_cfg_dp_soc_ctxt {
int num_int_ctxts;
@@ -378,6 +381,7 @@ struct wlan_cfg_dp_soc_ctxt {
uint32_t rx_mon_buf_ring_size;
uint32_t tx_mon_buf_ring_size;
uint8_t rx_rel_wbm2sw_ring_id;
uint32_t tx_rings_grp_bitmap;
};
/**