qcacld-3.0: Add FW offload INI items (1)

Relocate the following ini items to the FW offload component.

CFG_ENABLE_ANI - gEnableANI
CFG_SET_RTS_FOR_SIFS_BURSTING - gSetRTSForSIFSBursting
CFG_MAX_MPDUS_IN_AMPDU - gMaxMPDUsInAMPDU
CFG_ARP_AC_CATEGORY - arp_ac_category
CFG_ENABLE_PHY_REG - gEnableFastPwrTransition
CFG_UPPER_BRSSI_THRESH - gUpperBrssiThresh
CFG_LOWER_BRSSI_THRESH - gLowerBrssiThresh
CFG_DTIM_1CHRX_ENABLE - gDtim1ChRxEnable
CFG_ENABLE_COEX_ALT_CHAINMASK - gEnableAlternativeChainmask

Change-Id: I5046edec1a668e198ed4fcc997a0d24affe342ea
CRs-Fixed: 2312897

components/fw_offload/core/inc/wlan_fw_offload_main.h

@@ -112,11 +112,30 @@ struct wlan_fwol_ie_whitelist {
  * coex_config: coex config items
  * thermal_temp_cfg: Thermal temperature related config items
  * ie_whitelist_cfg: IE Whitelist related config items
+ * @ani_enabled: ANI enable/disable
+ * @enable_rts_sifsbursting: Enable RTS SIFS Bursting
+ * @max_mpdus_inampdu: Max number of MPDUS
+ * @arp_ac_category: ARP AC category
+ * @enable_phy_reg_retention: Enable PHY reg retention
+ * @upper_brssi_thresh: Upper BRSSI threshold
+ * @lower_brssi_thresh: Lower BRSSI threshold
+ * @enable_dtim_1chrx: Enable/disable DTIM 1 CHRX
+ * @alternative_chainmask_enabled: Alternate chainmask
  */
 struct wlan_fwol_cfg {
+	/* Add CFG and INI items here */
 	struct wlan_fwol_coex_config coex_config;
 	struct wlan_fwol_thermal_temp thermal_temp_cfg;
 	struct wlan_fwol_ie_whitelist ie_whitelist_cfg;
+	bool ani_enabled;
+	bool enable_rts_sifsbursting;
+	uint8_t max_mpdus_inampdu;
+	uint32_t arp_ac_category;
+	uint8_t enable_phy_reg_retention;
+	uint16_t upper_brssi_thresh;
+	uint16_t lower_brssi_thresh;
+	bool enable_dtim_1chrx;
+	bool alternative_chainmask_enabled;
 };
 
 /**

components/fw_offload/core/src/wlan_fw_offload_main.c

@@ -108,6 +108,17 @@ QDF_STATUS fwol_cfg_on_psoc_enable(struct wlan_objmgr_psoc *psoc)
 	fwol_init_coex_config_in_cfg(psoc, &fwol_cfg->coex_config);
 	fwol_init_thermal_temp_in_cfg(psoc, &fwol_cfg->thermal_temp_cfg);
 	fwol_init_ie_whiltelist_in_cfg(psoc, &fwol_cfg->ie_whitelist_cfg);
+	fwol_cfg->ani_enabled = cfg_get(psoc, CFG_ENABLE_ANI);
+	fwol_cfg->enable_rts_sifsbursting =
+				cfg_get(psoc, CFG_SET_RTS_FOR_SIFS_BURSTING);
+	fwol_cfg->max_mpdus_inampdu = cfg_get(psoc, CFG_MAX_MPDUS_IN_AMPDU);
+	fwol_cfg->arp_ac_category = cfg_get(psoc, CFG_ARP_AC_CATEGORY);
+	fwol_cfg->enable_phy_reg_retention = cfg_get(psoc, CFG_ENABLE_PHY_REG);
+	fwol_cfg->upper_brssi_thresh = cfg_get(psoc, CFG_UPPER_BRSSI_THRESH);
+	fwol_cfg->lower_brssi_thresh = cfg_get(psoc, CFG_LOWER_BRSSI_THRESH);
+	fwol_cfg->enable_dtim_1chrx = cfg_get(psoc, CFG_DTIM_1CHRX_ENABLE);
+	fwol_cfg->alternative_chainmask_enabled =
+				cfg_get(psoc, CFG_ENABLE_COEX_ALT_CHAINMASK);
 
 	return status;
 }

components/fw_offload/dispatcher/inc/cfg_fwol.h

@@ -22,13 +22,14 @@
 #include "cfg_define.h"
 #include "cfg_converged.h"
 #include "qdf_types.h"
-
 #include "cfg_coex.h"
 #include "cfg_thermal_temp.h"
 #include "cfg_ie_whitelist.h"
+#include "cfg_fwol_generic.h"
 
 #define CFG_FWOL_ALL \
 	CFG_COEX_ALL \
+	CFG_FWOL_GENERIC_ALL \
 	CFG_IE_WHITELIST \
 	CFG_THERMAL_TEMP_ALL
 

components/fw_offload/dispatcher/inc/cfg_fwol_generic.h

@@ -0,0 +1,248 @@
+/*
+ * Copyright (c) 2012-2018 The Linux Foundation. All rights reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/**
+ * DOC: This file contains centralized definitions of converged configuration.
+ */
+
+#ifndef __CFG_FWOL_GENERIC_H
+#define __CFG_FWOL_GENERIC_H
+
+
+/*
+ *
+ * <ini>
+ * gEnableANI - Enable Adaptive Noise Immunity
+ * @Min: 0
+ * @Max: 1
+ * @Default: 1
+ *
+ * This ini is used to enable or disable Adaptive Noise Immunity.
+ *
+ * Related: None
+ *
+ * Supported Feature: ANI
+ *
+ * Usage: External
+ *
+ * </ini>
+ */
+#define CFG_ENABLE_ANI CFG_INI_BOOL( \
+		"gEnableANI", \
+		1, \
+		"Enable/Disable Adaptive Noise Immunity")
+
+/**
+ * gSetRTSForSIFSBursting - set rts for sifs bursting
+ * @Min: 0
+ * @Max: 1
+ * @Default: 0
+ *
+ * This ini set rts for sifs bursting
+ *
+ * Usage: External
+ *
+ * </ini>
+ */
+#define CFG_SET_RTS_FOR_SIFS_BURSTING CFG_INI_BOOL( \
+		"gSetRTSForSIFSBursting", \
+		0, \
+		"Set rts for sifs bursting")
+
+/**
+ * <ini>
+ * gMaxMPDUsInAMPDU - max mpdus in ampdu
+ * @Min: 0
+ * @Max: 64
+ * @Default: 0
+ *
+ * This ini configure max mpdus in ampdu
+ *
+ * Usage: External
+ *
+ * </ini>
+ */
+#define CFG_MAX_MPDUS_IN_AMPDU CFG_INI_INT( \
+		"gMaxMPDUsInAMPDU", \
+		0, \
+		64, \
+		0, \
+		CFG_VALUE_OR_DEFAULT, \
+		"This ini configure max mpdus in ampdu")
+
+/**
+ * arp_ac_category - ARP access category
+ * @Min: 0
+ * @Max: 3
+ * @Default: 3
+ *
+ * Firmware by default categorizes ARP packets with VOICE TID.
+ * This ini shall be used to override the default configuration.
+ * Access category enums are referenced in ieee80211_common.h
+ * WME_AC_BE = 0 (Best effort)
+ * WME_AC_BK = 1 (Background)
+ * WME_AC_VI = 2 (Video)
+ * WME_AC_VO = 3 (Voice)
+ *
+ * Related: none
+ *
+ * Usage: Internal/External
+ *
+ * </ini>
+ */
+#define CFG_ARP_AC_CATEGORY CFG_INI_INT( \
+		"arp_ac_category", \
+		0, \
+		3, \
+		3, \
+		CFG_VALUE_OR_DEFAULT, \
+		"Override the default ARP AC configuration")
+
+/*
+ * </ini>
+ * gEnableFastPwrTransition - Configuration for fast power transition
+ * @Min: 0
+ * @Max: 2
+ * @Default: 0
+ *
+ * This ini supported values:
+ * 0x0: Phy register retention disabled (Higher timeline, Good for power)
+ * 0x1: Phy register retention statically enabled
+ * 0x2: Phy register retention enabled/disabled dynamically
+ *
+ * Usage: Internal
+ *
+ * </ini>
+ */
+#define CFG_ENABLE_PHY_REG CFG_INI_UINT( \
+		"gEnableFastPwrTransition", \
+		0x0, \
+		0x2, \
+		0x0, \
+		CFG_VALUE_OR_DEFAULT, \
+		"Configuration for fast power transition")
+
+/*
+ * <ini>
+ * gUpperBrssiThresh - Sets Upper threshold for beacon RSSI
+ * @Min: 36
+ * @Max: 66
+ * @Default: 46
+ *
+ * This ini sets Upper beacon threshold for beacon RSSI in FW
+ * Used to reduced RX chainmask in FW, once this threshold is
+ * reached FW will switch to 1X1 (Single chain).
+ *
+ * Supported Feature: STA
+ *
+ * Usage: External
+ *
+ * </ini>
+ */
+#define CFG_UPPER_BRSSI_THRESH CFG_INI_UINT( \
+		"gUpperBrssiThresh", \
+		36, \
+		66, \
+		46, \
+		CFG_VALUE_OR_DEFAULT, \
+		"Sets Upper threshold for beacon RSSI")
+
+/*
+ * <ini>
+ * gLowerrBrssiThresh - Sets Lower threshold for beacon RSSI
+ * @Min: 6
+ * @Max: 36
+ * @Default: 26
+ *
+ * This ini sets Lower beacon threshold for beacon RSSI in FW
+ * Used to increase RX chainmask in FW, once this threshold is
+ * reached FW will switch to 2X2 chain.
+ *
+ * Supported Feature: STA
+ *
+ * Usage: External
+ *
+ * </ini>
+ */
+#define CFG_LOWER_BRSSI_THRESH CFG_INI_UINT( \
+		"gLowerBrssiThresh", \
+		6, \
+		36, \
+		26, \
+		CFG_VALUE_OR_DEFAULT, \
+		"Sets Lower threshold for beacon RSSI")
+
+/*
+ * <ini>
+ * gDtim1ChRxEnable - Enable/Disable DTIM 1Chrx feature
+ * @Min: 0
+ * @Max: 1
+ * @Default: 1
+ *
+ * This ini Enables or Disables DTIM 1CHRX feature in FW
+ * If this flag is set FW enables shutting off one chain
+ * while going to power save.
+ *
+ * Supported Feature: STA
+ *
+ * Usage: External
+ *
+ * </ini>
+ */
+#define CFG_DTIM_1CHRX_ENABLE CFG_INI_BOOL( \
+		"gDtim1ChRxEnable", \
+		1, \
+		"Enable/Disable DTIM 1Chrx feature")
+
+/*
+ * <ini>
+ * gEnableAlternativeChainmask - Enable Co-Ex Alternative Chainmask
+ * @Min: 0
+ * @Max: 1
+ * @Default: 0
+ *
+ * This ini is used to enable/disable the Co-ex Alternative Chainmask
+ * feature via the WMI_PDEV_PARAM_ALTERNATIVE_CHAINMASK_SCHEME
+ * firmware parameter.
+ *
+ * Related: None
+ *
+ * Supported Feature: STA
+ *
+ * Usage: Internal/External
+ *
+ * </ini>
+ */
+#define CFG_ENABLE_COEX_ALT_CHAINMASK CFG_INI_BOOL( \
+		"gEnableAlternativeChainmask", \
+		0, \
+		"Enable Co-Ex Alternative Chainmask")
+
+
+#define CFG_FWOL_GENERIC_ALL \
+	CFG(CFG_ENABLE_ANI) \
+	CFG(CFG_SET_RTS_FOR_SIFS_BURSTING) \
+	CFG(CFG_MAX_MPDUS_IN_AMPDU) \
+	CFG(CFG_ARP_AC_CATEGORY) \
+	CFG(CFG_ENABLE_PHY_REG) \
+	CFG(CFG_UPPER_BRSSI_THRESH) \
+	CFG(CFG_LOWER_BRSSI_THRESH) \
+	CFG(CFG_DTIM_1CHRX_ENABLE) \
+	CFG(CFG_ENABLE_COEX_ALT_CHAINMASK)
+
+#endif

components/fw_offload/dispatcher/inc/wlan_fwol_ucfg_api.h

@@ -128,4 +128,85 @@ QDF_STATUS
 ucfg_fwol_get_all_whitelist_params(struct wlan_objmgr_psoc *psoc,
 				   struct wlan_fwol_ie_whitelist *whitelist);
 
+/** ucfg_fwol_get_ani_enabled() - Assigns the ani_enabled value
+ * @psoc: pointer to the psoc object
+ *
+ * Return: QDF Status
+ */
+QDF_STATUS ucfg_fwol_get_ani_enabled(struct wlan_objmgr_psoc *psoc,
+				     bool *ani_enabled);
+
+/**
+ * ucfg_fwol_get_ani_enabled() - Assigns the enable_rts_sifsbursting value
+ * @psoc: pointer to the psoc object
+ *
+ * Return: QDF Status
+ */
+QDF_STATUS ucfg_get_enable_rts_sifsbursting(struct wlan_objmgr_psoc *psoc,
+					    bool *enable_rts_sifsbursting);
+
+/**
+ * ucfg_get_max_mpdus_inampdu() - Assigns the max_mpdus_inampdu value
+ * @psoc: pointer to the psoc object
+ *
+ * Return: QDF Status
+ */
+QDF_STATUS ucfg_get_max_mpdus_inampdu(struct wlan_objmgr_psoc *psoc,
+				      uint8_t *max_mpdus_inampdu);
+
+/**
+ * ucfg_get_arp_ac_category() - Assigns the arp_ac_category value
+ * @psoc: pointer to the psoc object
+ *
+ * Return: QDF Status
+ */
+QDF_STATUS ucfg_get_arp_ac_category(struct wlan_objmgr_psoc *psoc,
+				    uint32_t *arp_ac_category);
+
+/**
+ * ucfg_get_enable_phy_reg_retention() - Assigns enable_phy_reg_retention value
+ * @psoc: pointer to the psoc object
+ *
+ * Return: QDF Status
+ */
+QDF_STATUS ucfg_get_enable_phy_reg_retention(struct wlan_objmgr_psoc *psoc,
+					     uint8_t *enable_phy_reg_retention);
+
+/**
+ * ucfg_get_upper_brssi_thresh() - Assigns upper_brssi_thresh value
+ * @psoc: pointer to the psoc object
+ *
+ * Return: QDF Status
+ */
+QDF_STATUS ucfg_get_upper_brssi_thresh(struct wlan_objmgr_psoc *psoc,
+				       uint16_t *upper_brssi_thresh);
+
+/**
+ * ucfg_get_lower_brssi_thresh() - Assigns lower_brssi_thresh value
+ * @psoc: pointer to the psoc object
+ *
+ * Return: QDF Status
+ */
+QDF_STATUS ucfg_get_lower_brssi_thresh(struct wlan_objmgr_psoc *psoc,
+				       uint16_t *lower_brssi_thresh);
+
+/**
+ * ucfg_get_enable_dtim_1chrx() - Assigns enable_dtim_1chrx value
+ * @psoc: pointer to the psoc object
+ *
+ * Return: QDF Status
+ */
+QDF_STATUS ucfg_get_enable_dtim_1chrx(struct wlan_objmgr_psoc *psoc,
+				      bool *enable_dtim_1chrx);
+
+/**
+ * ucfg_get_alternate_chainmask_enabled() - Assigns alt chainmask_enabled value
+ * @psoc: pointer to the psoc object
+ *
+ * Return: QDF Status
+ */
+QDF_STATUS
+ucfg_get_alternative_chainmask_enabled(struct wlan_objmgr_psoc *psoc,
+				       bool *alternative_chainmask_enabled);
+
 #endif /* _WLAN_FWOL_UCFG_API_H_ */

components/fw_offload/dispatcher/src/wlan_fwol_ucfg_api.c

@@ -215,6 +215,81 @@ ucfg_fwol_set_ie_whitelist(struct wlan_objmgr_psoc *psoc, bool ie_whitelist)
 	return QDF_STATUS_SUCCESS;
 }
 
+QDF_STATUS ucfg_fwol_get_ani_enabled(struct wlan_objmgr_psoc *psoc,
+				     bool *ani_enabled)
+{
+	struct wlan_fwol_psoc_obj *fwol_obj;
+
+	fwol_obj = fwol_get_psoc_obj(psoc);
+	if (!fwol_obj) {
+		fwol_err("Failed to get FWOL obj");
+		return QDF_STATUS_E_FAILURE;
+	}
+
+	*ani_enabled = fwol_obj->cfg.ani_enabled;
+	return QDF_STATUS_SUCCESS;
+}
+
+QDF_STATUS ucfg_get_enable_rts_sifsbursting(struct wlan_objmgr_psoc *psoc,
+					    bool *enable_rts_sifsbursting)
+{
+	struct wlan_fwol_psoc_obj *fwol_obj;
+
+	fwol_obj = fwol_get_psoc_obj(psoc);
+	if (!fwol_obj) {
+		fwol_err("Failed to get FWOL obj");
+		return QDF_STATUS_E_FAILURE;
+	}
+
+	*enable_rts_sifsbursting = fwol_obj->cfg.enable_rts_sifsbursting;
+	return QDF_STATUS_SUCCESS;
+}
+
+QDF_STATUS ucfg_get_max_mpdus_inampdu(struct wlan_objmgr_psoc *psoc,
+				      uint8_t *max_mpdus_inampdu)
+{
+	struct wlan_fwol_psoc_obj *fwol_obj;
+
+	fwol_obj = fwol_get_psoc_obj(psoc);
+	if (!fwol_obj) {
+		fwol_err("Failed to get FWOL obj");
+		return QDF_STATUS_E_FAILURE;
+	}
+
+	*max_mpdus_inampdu = fwol_obj->cfg.max_mpdus_inampdu;
+	return QDF_STATUS_SUCCESS;
+}
+
+QDF_STATUS ucfg_get_arp_ac_category(struct wlan_objmgr_psoc *psoc,
+				    uint32_t *arp_ac_category)
+{
+	struct wlan_fwol_psoc_obj *fwol_obj;
+
+	fwol_obj = fwol_get_psoc_obj(psoc);
+	if (!fwol_obj) {
+		fwol_err("Failed to get FWOL obj");
+		return QDF_STATUS_E_FAILURE;
+	}
+
+	*arp_ac_category = fwol_obj->cfg.arp_ac_category;
+	return QDF_STATUS_SUCCESS;
+}
+
+QDF_STATUS ucfg_get_enable_phy_reg_retention(struct wlan_objmgr_psoc *psoc,
+					     uint8_t *enable_phy_reg_retention)
+{
+	struct wlan_fwol_psoc_obj *fwol_obj;
+
+	fwol_obj = fwol_get_psoc_obj(psoc);
+	if (!fwol_obj) {
+		fwol_err("Failed to get FWOL obj");
+		return QDF_STATUS_E_FAILURE;
+	}
+
+	*enable_phy_reg_retention = fwol_obj->cfg.enable_phy_reg_retention;
+	return QDF_STATUS_SUCCESS;
+}
+
 bool ucfg_validate_ie_bitmaps(struct wlan_objmgr_psoc *psoc)
 {
 	struct wlan_fwol_psoc_obj *fwol_obj;
@@ -250,6 +325,67 @@ ucfg_fwol_get_all_whitelist_params(struct wlan_objmgr_psoc *psoc,
 	}
 
 	*whitelist = fwol_obj->cfg.ie_whitelist_cfg;
+	return QDF_STATUS_SUCCESS;
+}
+
+QDF_STATUS ucfg_get_upper_brssi_thresh(struct wlan_objmgr_psoc *psoc,
+				       uint16_t *upper_brssi_thresh)
+{
+	struct wlan_fwol_psoc_obj *fwol_obj;
+
+	fwol_obj = fwol_get_psoc_obj(psoc);
+	if (!fwol_obj) {
+		fwol_err("Failed to get FWOL obj");
+		return QDF_STATUS_E_FAILURE;
+	}
+
+	*upper_brssi_thresh = fwol_obj->cfg.upper_brssi_thresh;
+	return QDF_STATUS_SUCCESS;
+}
+
+QDF_STATUS ucfg_get_lower_brssi_thresh(struct wlan_objmgr_psoc *psoc,
+				       uint16_t *lower_brssi_thresh)
+{
+	struct wlan_fwol_psoc_obj *fwol_obj;
+
+	fwol_obj = fwol_get_psoc_obj(psoc);
+	if (!fwol_obj) {
+		fwol_err("Failed to get FWOL obj");
+		return QDF_STATUS_E_FAILURE;
+	}
+
+	*lower_brssi_thresh = fwol_obj->cfg.lower_brssi_thresh;
+	return QDF_STATUS_SUCCESS;
+}
+
+QDF_STATUS ucfg_get_enable_dtim_1chrx(struct wlan_objmgr_psoc *psoc,
+				      bool *enable_dtim_1chrx)
+{
+	struct wlan_fwol_psoc_obj *fwol_obj;
+
+	fwol_obj = fwol_get_psoc_obj(psoc);
+	if (!fwol_obj) {
+		fwol_err("Failed to get FWOL obj");
+		return QDF_STATUS_E_FAILURE;
+	}
+
+	*enable_dtim_1chrx = fwol_obj->cfg.enable_dtim_1chrx;
+	return QDF_STATUS_SUCCESS;
+}
+
+QDF_STATUS
+ucfg_get_alternative_chainmask_enabled(struct wlan_objmgr_psoc *psoc,
+				       bool *alternative_chainmask_enabled)
+{
+	struct wlan_fwol_psoc_obj *fwol_obj;
+
+	fwol_obj = fwol_get_psoc_obj(psoc);
+	if (!fwol_obj) {
+		fwol_err("Failed to get fwol obj");
+		return QDF_STATUS_E_FAILURE;
+	}
 
+	*alternative_chainmask_enabled =
+				fwol_obj->cfg.alternative_chainmask_enabled;
 	return QDF_STATUS_SUCCESS;
 }

core/hdd/inc/wlan_hdd_cfg.h

@@ -6307,30 +6307,6 @@ enum hdd_link_speed_rpt_type {
 #define CFG_ENABLE_SMART_CHAINMASK_MAX     (1)
 #define CFG_ENABLE_SMART_CHAINMASK_DEFAULT (0)
 
-/*
- * <ini>
- * gEnableAlternativeChainmask - Enable Co-Ex Alternative Chainmask
- * @Min: 0
- * @Max: 1
- * @Default: 0
- *
- * This ini is used to enable/disable the Co-ex Alternative Chainmask
- * feature via the WMI_PDEV_PARAM_ALTERNATIVE_CHAINMASK_SCHEME
- * firmware parameter.
- *
- * Related: None
- *
- * Supported Feature: STA
- *
- * Usage: Internal/External
- *
- * </ini>
- */
-#define CFG_ENABLE_COEX_ALT_CHAINMASK_NAME    "gEnableAlternativeChainmask"
-#define CFG_ENABLE_COEX_ALT_CHAINMASK_MIN     (0)
-#define CFG_ENABLE_COEX_ALT_CHAINMASK_MAX     (1)
-#define CFG_ENABLE_COEX_ALT_CHAINMASK_DEFAULT (0)
-
 /*
  * set the self gen power value from
  * 0 to 0xffff
@@ -7876,31 +7852,6 @@ enum hdd_wext_control {
 #define CFG_ENABLE_RUNTIME_PM_DEFAULT          (0)
 #endif
 
-/**
- * arp_ac_category - ARP access category
- * @Min: 0
- * @Max: 3
- * @Default: 3
- *
- * Firmware by default categorizes ARP packets with VOICE TID.
- * This ini shall be used to override the default configuration.
- * Access category enums are referenced in ieee80211_common.h
- * WME_AC_BE = 0 (Best effort)
- * WME_AC_BK = 1 (Background)
- * WME_AC_VI = 2 (Video)
- * WME_AC_VO = 3 (Voice)
- *
- * Related: none
- *
- * Usage: Internal/External
- *
- * </ini>
- */
-#define CFG_ARP_AC_CATEGORY                "arp_ac_category"
-#define CFG_ARP_AC_CATEGORY_MIN            (0)
-#define CFG_ARP_AC_CATEGORY_MAX            (3)
-#define CFG_ARP_AC_CATEGORY_DEFAULT        (3)
-
 /*
  * <ini>
  * gActiveUcBpfMode - Control UC active APF mode
@@ -8099,28 +8050,6 @@ enum hdd_wext_control {
 
 #endif /* WLAN_SUPPORT_TWT */
 
-/*
- * <ini>
- * gEnableANI - Enable Adaptive Noise Immunity
- * @Min: 0
- * @Max: 1
- * @Default: 1
- *
- * This ini is used to enable or disable Adaptive Noise Immunity.
- *
- * Related: None
- *
- * Supported Feature: ANI
- *
- * Usage: External
- *
- * </ini>
- */
-#define CFG_ENABLE_ANI_NAME              "gEnableANI"
-#define CFG_ENABLE_ANI_MIN               (0)
-#define CFG_ENABLE_ANI_MAX               (1)
-#define CFG_ENABLE_ANI_DEFAULT           (1)
-
 /*
  * <ini>
  * gTimerMultiplier - Scale QDF timers by this value
@@ -8178,41 +8107,6 @@ enum hdd_wext_control {
 #define CFG_PROBE_REQ_OUI_DEFAULT ""
 /* End of probe request IE whitelisting feature ini params */
 
-/**
- * gSetRTSForSIFSBursting - set rts for sifs bursting
- * @Min: 0
- * @Max: 1
- * @Default: 0
- *
- * This ini set rts for sifs bursting
- *
- * Usage: External
- *
- * </ini>
- */
-#define CFG_SET_RTS_FOR_SIFS_BURSTING           "gSetRTSForSIFSBursting"
-#define CFG_SET_RTS_FOR_SIFS_BURSTING_MIN       (0)
-#define CFG_SET_RTS_FOR_SIFS_BURSTING_MAX       (1)
-#define CFG_SET_RTS_FOR_SIFS_BURSTING_DEFAULT   (0)
-
-/**
- * <ini>
- * gMaxMPDUsInAMPDU - max mpdus in ampdu
- * @Min: 0
- * @Max: 64
- * @Default: 0
- *
- * This ini configure max mpdus in ampdu
- *
- * Usage: External
- *
- * </ini>
- */
-#define CFG_MAX_MPDUS_IN_AMPDU                  "gMaxMPDUsInAMPDU"
-#define CFG_MAX_MPDUS_IN_AMPDU_MIN              (0)
-#define CFG_MAX_MPDUS_IN_AMPDU_MAX              (64)
-#define CFG_MAX_MPDUS_IN_AMPDU_DEFAULT          (0)
-
 /*
  * <ini>
  * gScanBackoffMultiplier - For NLO/PNO, multiply fast scan period by this every
@@ -8386,75 +8280,6 @@ enum hdd_wext_control {
 #define CFG_LPRx_MAX         (1)
 #define CFG_LPRx_DEFAULT     (1)
 
-/*
- * <ini>
- * gUpperBrssiThresh - Sets Upper threshold for beacon RSSI
- * @Min: 36
- * @Max: 66
- * @Default: 46
- *
- * This ini sets Upper beacon threshold for beacon RSSI in FW
- * Used to reduced RX chainmask in FW, once this threshold is
- * reached FW will switch to 1X1 (Single chain).
- *
- * Supported Feature: STA
- *
- * Usage: External
- *
- * </ini>
- */
-
-#define CFG_UPPER_BRSSI_THRESH_NAME             "gUpperBrssiThresh"
-#define CFG_UPPER_BRSSI_THRESH_MIN              (36)
-#define CFG_UPPER_BRSSI_THRESH_MAX              (66)
-#define CFG_UPPER_BRSSI_THRESH_DEFAULT          (46)
-
-/*
- * <ini>
- * gLowerrBrssiThresh - Sets Lower threshold for beacon RSSI
- * @Min: 6
- * @Max: 36
- * @Default: 26
- *
- * This ini sets Lower beacon threshold for beacon RSSI in FW
- * Used to increase RX chainmask in FW, once this threshold is
- * reached FW will switch to 2X2 chain.
- *
- * Supported Feature: STA
- *
- * Usage: External
- *
- * </ini>
- */
-
-#define CFG_LOWER_BRSSI_THRESH_NAME     "gLowerBrssiThresh"
-#define CFG_LOWER_BRSSI_THRESH_MIN      (6)
-#define CFG_LOWER_BRSSI_THRESH_MAX      (36)
-#define CFG_LOWER_BRSSI_THRESH_DEFAULT  (26)
-
-/*
- * <ini>
- * gDtim1ChRxEnable - Enable/Disable DTIM 1Chrx feature
- * @Min: 0
- * @Max: 1
- * @Default: 1
- *
- * This ini Enables or Disables DTIM 1CHRX feature in FW
- * If this flag is set FW enables shutting off one chain
- * while going to power save.
- *
- * Supported Feature: STA
- *
- * Usage: External
- *
- * </ini>
- */
-
-#define CFG_DTIM_1CHRX_ENABLE_NAME      "gDtim1ChRxEnable"
-#define CFG_DTIM_1CHRX_ENABLE_MIN       (0)
-#define CFG_DTIM_1CHRX_ENABLE_MAX       (1)
-#define CFG_DTIM_1CHRX_ENABLE_DEFAULT   (1)
-
 /*
  * <ini>
  * scan_11d_interval - 11d scan interval in ms
@@ -8502,26 +8327,6 @@ enum hdd_wext_control {
 #define CFG_IS_BSSID_HINT_PRIORITY_MIN     (0)
 #define CFG_IS_BSSID_HINT_PRIORITY_MAX     (1)
 
-/*
- * gEnableFastPwrTransition - Configuration for fast power transition
- * @Min: 0
- * @Max: 2
- * @Default: 0
- *
- * This ini supported values:
- * 0x0: Phy register retention disabled (Higher timeline, Good for power)
- * 0x1: Phy register retention statically enabled
- * 0x2: Phy register retention enabled/disabled dynamically
- *
- * Usage: Internal
- *
- * </ini>
- */
-#define CFG_ENABLE_PHY_REG  "gEnableFastPwrTransition"
-#define CFG_PHY_REG_DEFAULT (0x0)
-#define CFG_PHY_REG_MIN     (0x0)
-#define CFG_PHY_REG_MAX     (0x2)
-
 /*
  * <ini>
  * sae_enabled - Enable/Disable SAE support in driver
@@ -9948,7 +9753,6 @@ struct hdd_config {
 	uint32_t sta_sap_scc_on_dfs_chan;
 	uint32_t sta_sap_scc_on_lte_coex_chan;
 	bool smart_chainmask_enabled;
-	bool alternative_chainmask_enabled;
 	uint16_t  self_gen_frm_pwr;
 #ifdef FEATURE_WLAN_SCAN_PNO
 	bool pno_channel_prediction;
@@ -10048,8 +9852,6 @@ struct hdd_config {
 	bool enable_twt;
 	uint32_t twt_congestion_timeout;
 #endif
-	uint32_t arp_ac_category;
-	bool ani_enabled;
 	bool tx_orphan_enable;
 
 	/* Probe Request multiple vendor OUIs */
@@ -10066,8 +9868,7 @@ struct hdd_config {
 	/* threshold of packet drops at which FW initiates disconnect */
 	uint16_t pkt_err_disconn_th;
 	bool is_force_1x1;
-	uint8_t enable_rts_sifsbursting;
-	uint8_t max_mpdus_inampdu;
+	enum pmo_auto_pwr_detect_failure_mode auto_pwr_save_fail_mode;
 	uint8_t ito_repeat_count;
 	bool enable_11d_in_world_mode;
 	/* 5G preference parameters for boosting RSSI */
@@ -10080,9 +9881,6 @@ struct hdd_config {
 	uint8_t                     rssi_penalize_factor_5g;
 	uint8_t                     max_rssi_penalize_5g;
 	bool enable_lprx;
-	uint8_t upper_brssi_thresh;
-	uint8_t lower_brssi_thresh;
-	bool enable_dtim_1chrx;
 	int8_t rssi_thresh_offset_5g;
 	uint32_t scan_11d_interval;
 	bool is_bssid_hint_priority;
@@ -10092,7 +9890,9 @@ struct hdd_config {
 	uint32_t wlm_latency_flags_moderate;
 	uint32_t wlm_latency_flags_low;
 	uint32_t wlm_latency_flags_ultralow;
-	uint8_t enable_phy_reg_retention;
+#ifdef WLAN_FEATURE_PACKET_FILTERING
+	uint8_t packet_filters_bitmap;
+#endif
 	uint8_t dfs_beacon_tx_enhanced;
 	uint32_t btm_offload_config;
 #ifdef WLAN_FEATURE_SAE

core/hdd/src/wlan_hdd_cfg.c

@@ -2736,13 +2736,6 @@ struct reg_table_entry g_registry_table[] = {
 		     CFG_ENABLE_SMART_CHAINMASK_MIN,
 		     CFG_ENABLE_SMART_CHAINMASK_MAX),
 
-	REG_VARIABLE(CFG_ENABLE_COEX_ALT_CHAINMASK_NAME, WLAN_PARAM_Integer,
-		     struct hdd_config, alternative_chainmask_enabled,
-		     VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
-		     CFG_ENABLE_COEX_ALT_CHAINMASK_DEFAULT,
-		     CFG_ENABLE_COEX_ALT_CHAINMASK_MIN,
-		     CFG_ENABLE_COEX_ALT_CHAINMASK_MAX),
-
 	REG_VARIABLE(CFG_SELF_GEN_FRM_PWR, WLAN_PARAM_Integer,
 		     struct hdd_config, self_gen_frm_pwr,
 		     VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
@@ -3136,13 +3129,6 @@ struct reg_table_entry g_registry_table[] = {
 		CFG_FILTER_MULTICAST_REPLAY_MIN,
 		CFG_FILTER_MULTICAST_REPLAY_MAX),
 
-	REG_VARIABLE(CFG_ENABLE_PHY_REG, WLAN_PARAM_HexInteger,
-		     struct hdd_config, enable_phy_reg_retention,
-		     VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
-		     CFG_PHY_REG_DEFAULT,
-		     CFG_PHY_REG_MIN,
-		     CFG_PHY_REG_MAX),
-
 	REG_VARIABLE(CFG_OPTIMIZE_CA_EVENT_NAME, WLAN_PARAM_Integer,
 			struct hdd_config, goptimize_chan_avoid_event,
 			VAR_FLAGS_OPTIONAL |
@@ -3250,20 +3236,6 @@ struct reg_table_entry g_registry_table[] = {
 		     CFG_TWT_CONGESTION_TIMEOUT_MAX),
 #endif
 
-	REG_VARIABLE(CFG_ARP_AC_CATEGORY, WLAN_PARAM_Integer,
-		struct hdd_config, arp_ac_category,
-		VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
-		CFG_ARP_AC_CATEGORY_DEFAULT,
-		CFG_ARP_AC_CATEGORY_MIN,
-		CFG_ARP_AC_CATEGORY_MAX),
-
-	REG_VARIABLE(CFG_ENABLE_ANI_NAME, WLAN_PARAM_Integer,
-		     struct hdd_config, ani_enabled,
-		     VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
-		     CFG_ENABLE_ANI_DEFAULT,
-		     CFG_ENABLE_ANI_MIN,
-		     CFG_ENABLE_ANI_MAX),
-
 	REG_VARIABLE(CFG_TIMER_MULTIPLIER_NAME, WLAN_PARAM_Integer,
 		     struct hdd_config, timer_multiplier,
 		     VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
@@ -3325,20 +3297,6 @@ struct reg_table_entry g_registry_table[] = {
 		CFG_FORCE_1X1_MIN,
 		CFG_FORCE_1X1_MAX),
 
-	REG_VARIABLE(CFG_SET_RTS_FOR_SIFS_BURSTING, WLAN_PARAM_Integer,
-		struct hdd_config, enable_rts_sifsbursting,
-		VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
-		CFG_SET_RTS_FOR_SIFS_BURSTING_DEFAULT,
-		CFG_SET_RTS_FOR_SIFS_BURSTING_MIN,
-		CFG_SET_RTS_FOR_SIFS_BURSTING_MAX),
-
-	REG_VARIABLE(CFG_MAX_MPDUS_IN_AMPDU, WLAN_PARAM_Integer,
-		struct hdd_config, max_mpdus_inampdu,
-		VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
-		CFG_MAX_MPDUS_IN_AMPDU_DEFAULT,
-		CFG_MAX_MPDUS_IN_AMPDU_MIN,
-		CFG_MAX_MPDUS_IN_AMPDU_MAX),
-
 	REG_VARIABLE(CFG_TX_ORPHAN_ENABLE_NAME, WLAN_PARAM_Integer,
 		struct hdd_config, tx_orphan_enable,
 		VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
@@ -3367,20 +3325,6 @@ struct reg_table_entry g_registry_table[] = {
 		CFG_LPRx_MIN,
 		CFG_LPRx_MAX),
 
-	REG_VARIABLE(CFG_UPPER_BRSSI_THRESH_NAME, WLAN_PARAM_Integer,
-		struct hdd_config, upper_brssi_thresh,
-		VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
-		CFG_UPPER_BRSSI_THRESH_DEFAULT,
-		CFG_UPPER_BRSSI_THRESH_MIN,
-		CFG_UPPER_BRSSI_THRESH_MAX),
-
-	REG_VARIABLE(CFG_LOWER_BRSSI_THRESH_NAME, WLAN_PARAM_Integer,
-		struct hdd_config, lower_brssi_thresh,
-		VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
-		CFG_LOWER_BRSSI_THRESH_DEFAULT,
-		CFG_LOWER_BRSSI_THRESH_MIN,
-		CFG_LOWER_BRSSI_THRESH_MAX),
-
 	REG_VARIABLE(CFG_ENABLE_ACTION_OUI, WLAN_PARAM_Integer,
 		     struct hdd_config, action_oui_enable,
 		     VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
@@ -3422,13 +3366,6 @@ struct reg_table_entry g_registry_table[] = {
 			    (void *)
 			    CFG_ACTION_OUI_CONNECT_1X1_WITH_1_CHAIN_DEFAULT),
 
-	REG_VARIABLE(CFG_DTIM_1CHRX_ENABLE_NAME, WLAN_PARAM_Integer,
-		struct hdd_config, enable_dtim_1chrx,
-		VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,
-		CFG_DTIM_1CHRX_ENABLE_DEFAULT,
-		CFG_DTIM_1CHRX_ENABLE_MIN,
-		CFG_DTIM_1CHRX_ENABLE_MAX),
-
 	REG_VARIABLE(CFG_SCAN_11D_INTERVAL_NAME, WLAN_PARAM_Integer,
 		struct hdd_config, scan_11d_interval,
 		VAR_FLAGS_OPTIONAL | VAR_FLAGS_RANGE_CHECK_ASSUME_DEFAULT,

core/hdd/src/wlan_hdd_main.c

@@ -4672,6 +4672,9 @@ err:
 int hdd_set_fw_params(struct hdd_adapter *adapter)
 {
 	int ret;
+	uint16_t upper_brssi_thresh, lower_brssi_thresh;
+	bool enable_dtim_1chrx;
+	QDF_STATUS status;
 	struct hdd_context *hdd_ctx;
 
 	hdd_enter_dev(adapter->dev);
@@ -4725,17 +4728,32 @@ int hdd_set_fw_params(struct hdd_adapter *adapter)
 	}
 
 	if (adapter->device_mode == QDF_STA_MODE) {
+		status = ucfg_get_upper_brssi_thresh(hdd_ctx->psoc,
+						     &upper_brssi_thresh);
+		if (QDF_IS_STATUS_ERROR(status))
+			return -EINVAL;
+
 		sme_set_smps_cfg(adapter->session_id,
-					HDD_STA_SMPS_PARAM_UPPER_BRSSI_THRESH,
-					hdd_ctx->config->upper_brssi_thresh);
+				 HDD_STA_SMPS_PARAM_UPPER_BRSSI_THRESH,
+				 upper_brssi_thresh);
+
+		status = ucfg_get_lower_brssi_thresh(hdd_ctx->psoc,
+						     &lower_brssi_thresh);
+		if (QDF_IS_STATUS_ERROR(status))
+			return -EINVAL;
 
 		sme_set_smps_cfg(adapter->session_id,
-					HDD_STA_SMPS_PARAM_LOWER_BRSSI_THRESH,
-					hdd_ctx->config->lower_brssi_thresh);
+				 HDD_STA_SMPS_PARAM_LOWER_BRSSI_THRESH,
+				 lower_brssi_thresh);
+
+		status = ucfg_get_enable_dtim_1chrx(hdd_ctx->psoc,
+						    &enable_dtim_1chrx);
+		if (QDF_IS_STATUS_ERROR(status))
+			return -EINVAL;
 
 		sme_set_smps_cfg(adapter->session_id,
-					HDD_STA_SMPS_PARAM_DTIM_1CHRX_ENABLE,
-					hdd_ctx->config->enable_dtim_1chrx);
+				 HDD_STA_SMPS_PARAM_DTIM_1CHRX_ENABLE,
+				 enable_dtim_1chrx);
 	}
 
 	if (hdd_ctx->config->enable2x2) {
@@ -10182,8 +10200,8 @@ static void hdd_initialize_mac_address(struct hdd_context *hdd_ctx)
 static int hdd_set_smart_chainmask_enabled(struct hdd_context *hdd_ctx)
 {
 	int vdev_id = 0;
-	int param_id = WMI_PDEV_PARAM_SMART_CHAINMASK_SCHEME;
 	int value = hdd_ctx->config->smart_chainmask_enabled;
+	int param_id = WMI_PDEV_PARAM_SMART_CHAINMASK_SCHEME;
 	int vpdev = PDEV_CMD;
 	int ret;
 
@@ -10197,12 +10215,20 @@ static int hdd_set_smart_chainmask_enabled(struct hdd_context *hdd_ctx)
 static int hdd_set_alternative_chainmask_enabled(struct hdd_context *hdd_ctx)
 {
 	int vdev_id = 0;
+	QDF_STATUS status;
 	int param_id = WMI_PDEV_PARAM_ALTERNATIVE_CHAINMASK_SCHEME;
-	int value = hdd_ctx->config->alternative_chainmask_enabled;
+	bool alternative_chainmask_enabled;
 	int vpdev = PDEV_CMD;
 	int ret;
 
-	ret = sme_cli_set_command(vdev_id, param_id, value, vpdev);
+	status = ucfg_get_alternative_chainmask_enabled(
+				hdd_ctx->psoc,
+				&alternative_chainmask_enabled);
+	if (QDF_IS_STATUS_ERROR(status))
+		return -EINVAL;
+
+	ret = sme_cli_set_command(vdev_id, param_id,
+				  (int)alternative_chainmask_enabled, vpdev);
 	if (ret)
 		hdd_err("WMI_PDEV_PARAM_ALTERNATIVE_CHAINMASK_SCHEME failed %d",
 			ret);
@@ -10212,13 +10238,18 @@ static int hdd_set_alternative_chainmask_enabled(struct hdd_context *hdd_ctx)
 
 static int hdd_set_ani_enabled(struct hdd_context *hdd_ctx)
 {
+	QDF_STATUS status;
 	int vdev_id = 0;
 	int param_id = WMI_PDEV_PARAM_ANI_ENABLE;
-	int value = hdd_ctx->config->ani_enabled;
+	bool value;
 	int vpdev = PDEV_CMD;
 	int ret;
 
-	ret = sme_cli_set_command(vdev_id, param_id, value, vpdev);
+	status = ucfg_fwol_get_ani_enabled(hdd_ctx->psoc, &value);
+	if (QDF_IS_STATUS_ERROR(status))
+		return -EINVAL;
+
+	ret = sme_cli_set_command(vdev_id, param_id, (int)value, vpdev);
 	if (ret)
 		hdd_err("WMI_PDEV_PARAM_ANI_ENABLE failed %d", ret);
 
@@ -10238,6 +10269,7 @@ static int hdd_pre_enable_configure(struct hdd_context *hdd_ctx)
 	int ret;
 	uint8_t val = 0;
 	QDF_STATUS status;
+	uint32_t arp_ac_category;
 	void *soc = cds_get_context(QDF_MODULE_ID_SOC);
 
 	cdp_register_pause_cb(soc, wlan_hdd_txrx_pause_cb);
@@ -10289,12 +10321,17 @@ static int hdd_pre_enable_configure(struct hdd_context *hdd_ctx)
 	if (ret)
 		goto out;
 
+	status = ucfg_get_arp_ac_category(hdd_ctx->psoc, &arp_ac_category);
+
+	if (QDF_IS_STATUS_ERROR(status))
+		return -EINVAL;
+
 	ret = sme_cli_set_command(0, WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
-				  hdd_ctx->config->arp_ac_category,
+				  arp_ac_category,
 				  PDEV_CMD);
 	if (0 != ret) {
 		hdd_err("WMI_PDEV_PARAM_ARP_AC_OVERRIDE ac: %d ret: %d",
-			hdd_ctx->config->arp_ac_category, ret);
+			arp_ac_category, ret);
 		goto out;
 	}
 
@@ -10836,6 +10873,9 @@ int hdd_configure_cds(struct hdd_context *hdd_ctx)
 	QDF_STATUS status;
 	int set_value;
 	mac_handle_t mac_handle;
+	bool enable_rts_sifsbursting;
+	uint8_t enable_phy_reg_retention;
+	uint8_t max_mpdus_inampdu;
 	uint32_t num_abg_tx_chains = 0;
 	uint16_t num_11b_tx_chains = 0;
 	uint16_t num_11ag_tx_chains = 0;
@@ -10854,14 +10894,24 @@ int hdd_configure_cds(struct hdd_context *hdd_ctx)
 	sme_set_chip_pwr_save_fail_cb(mac_handle,
 				      hdd_chip_pwr_save_fail_detected_cb);
 
-	if (hdd_ctx->config->max_mpdus_inampdu) {
-		set_value = hdd_ctx->config->max_mpdus_inampdu;
+	status = ucfg_get_max_mpdus_inampdu(hdd_ctx->psoc,
+					    &max_mpdus_inampdu);
+	if (status)
+		return status;
+
+	if (max_mpdus_inampdu) {
+		set_value = max_mpdus_inampdu;
 		sme_cli_set_command(0, (int)WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU,
 				    set_value, PDEV_CMD);
 	}
 
-	if (hdd_ctx->config->enable_rts_sifsbursting) {
-		set_value = hdd_ctx->config->enable_rts_sifsbursting;
+	status = ucfg_get_enable_rts_sifsbursting(hdd_ctx->psoc,
+						  &enable_rts_sifsbursting);
+	if (status)
+		return status;
+
+	if (enable_rts_sifsbursting) {
+		set_value = enable_rts_sifsbursting;
 		sme_cli_set_command(0,
 				    (int)WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING,
 				    set_value, PDEV_CMD);
@@ -10977,10 +11027,15 @@ int hdd_configure_cds(struct hdd_context *hdd_ctx)
 	sme_cli_set_command(0, WMI_PDEV_AUTO_DETECT_POWER_FAILURE,
 			    auto_power_fail_mode, PDEV_CMD);
 
+	status = ucfg_get_enable_phy_reg_retention(hdd_ctx->psoc,
+						   &enable_phy_reg_retention);
+
+	if (QDF_IS_STATUS_ERROR(status))
+		return -EINVAL;
 
-	if (hdd_ctx->config->enable_phy_reg_retention)
+	if (enable_phy_reg_retention)
 		wma_cli_set_command(0, WMI_PDEV_PARAM_FAST_PWR_TRANSITION,
-			hdd_ctx->config->enable_phy_reg_retention, PDEV_CMD);
+			enable_phy_reg_retention, PDEV_CMD);
 
 	return 0;