From d9187ba0d9635eb912a2da81174e3c4a20309079 Mon Sep 17 00:00:00 2001 From: Gopikrishnaiah Anandan Date: Wed, 23 Dec 2020 14:17:38 -0800 Subject: [PATCH] disp: msm: sde: stop crtc features during encoder disable Encoder is disabling planes and unstaging layers from layer mixer. Some of the crtc features are dependent on the plane being staged. Change adds api that encoder can call on crtc to stop the features that are dependent on source pipes. Change-Id: I4d875155ceb8f66acfe6ce0096141ca7253bb140 Signed-off-by: Gopikrishnaiah Anandan --- msm/sde/sde_color_processing.c | 8 +++++--- msm/sde/sde_color_processing.h | 3 +++ msm/sde/sde_crtc.c | 5 +++++ msm/sde/sde_crtc.h | 8 ++++++++ msm/sde/sde_encoder.c | 1 + 5 files changed, 22 insertions(+), 3 deletions(-) diff --git a/msm/sde/sde_color_processing.c b/msm/sde/sde_color_processing.c index 8b79e55c00..b1082da3f2 100644 --- a/msm/sde/sde_color_processing.c +++ b/msm/sde/sde_color_processing.c @@ -2591,13 +2591,14 @@ void sde_cp_crtc_resume(struct drm_crtc *crtc) /* placeholder for operations needed during resume */ } -static void _sde_cp_disable_features(struct sde_crtc *sde_crtc) +void sde_cp_disable_features(struct drm_crtc *crtc) { struct sde_hw_cp_cfg hw_cfg; struct sde_hw_mixer *hw_lm; struct sde_hw_dspp *hw_dspp; feature_wrapper set_feature; int i = 0, ret = 0; + struct sde_crtc *sde_crtc = to_sde_crtc(crtc); u32 num_mixers = sde_crtc->num_mixers; set_feature = @@ -2606,6 +2607,7 @@ static void _sde_cp_disable_features(struct sde_crtc *sde_crtc) if (!set_feature) return; + mutex_lock(&sde_crtc->crtc_cp_lock); memset(&hw_cfg, 0, sizeof(hw_cfg)); for (i = 0; i < num_mixers; i++) { @@ -2633,6 +2635,7 @@ static void _sde_cp_disable_features(struct sde_crtc *sde_crtc) if (ret) break; } + mutex_unlock(&sde_crtc->crtc_cp_lock); } void sde_cp_crtc_clear(struct drm_crtc *crtc) @@ -2650,9 +2653,8 @@ void sde_cp_crtc_clear(struct drm_crtc *crtc) DRM_ERROR("sde_crtc %pK\n", sde_crtc); return; } - + sde_cp_disable_features(crtc); mutex_lock(&sde_crtc->crtc_cp_lock); - _sde_cp_disable_features(sde_crtc); list_del_init(&sde_crtc->cp_active_list); list_del_init(&sde_crtc->cp_dirty_list); list_del_init(&sde_crtc->ad_active); diff --git a/msm/sde/sde_color_processing.h b/msm/sde/sde_color_processing.h index 98d71b70c9..b53086054b 100644 --- a/msm/sde/sde_color_processing.h +++ b/msm/sde/sde_color_processing.h @@ -330,4 +330,7 @@ void sde_cp_clear_state_info(struct drm_crtc_state *state); */ void sde_cp_duplicate_state_info(struct drm_crtc_state *old_state, struct drm_crtc_state *state); + +void sde_cp_disable_features(struct drm_crtc *crtc); + #endif /*_SDE_COLOR_PROCESSING_H */ diff --git a/msm/sde/sde_crtc.c b/msm/sde/sde_crtc.c index f566d3db03..baecaab90b 100644 --- a/msm/sde/sde_crtc.c +++ b/msm/sde/sde_crtc.c @@ -7342,3 +7342,8 @@ static void sde_cp_crtc_apply_noise(struct drm_crtc *crtc, if (!cstate->noise_layer_en) clear_bit(SDE_CRTC_NOISE_LAYER, cstate->dirty); } + +void sde_crtc_disable_cp_features(struct drm_crtc *crtc) +{ + sde_cp_disable_features(crtc); +} diff --git a/msm/sde/sde_crtc.h b/msm/sde/sde_crtc.h index 05291137e7..e46dfeec79 100644 --- a/msm/sde/sde_crtc.h +++ b/msm/sde/sde_crtc.h @@ -954,4 +954,12 @@ int sde_crtc_get_num_datapath(struct drm_crtc *crtc, */ void sde_crtc_reset_sw_state(struct drm_crtc *crtc); +/** + * sde_crtc_disable_cp_features - api to disable cp features that depend on planes being active. + * Encoder disables the planes during suspend and calls this api for the crtc to disable + * any features that require planes to be active + * @crtc: Pointer to DRM crtc object +*/ +void sde_crtc_disable_cp_features(struct drm_crtc *crtc); + #endif /* _SDE_CRTC_H_ */ diff --git a/msm/sde/sde_encoder.c b/msm/sde/sde_encoder.c index 55fe39c268..0bddbbb502 100644 --- a/msm/sde/sde_encoder.c +++ b/msm/sde/sde_encoder.c @@ -3045,6 +3045,7 @@ void sde_encoder_helper_phys_disable(struct sde_encoder_phys *phys_enc, phys_enc->hw_pp->merge_3d ? phys_enc->hw_pp->merge_3d->idx : 0); + sde_crtc_disable_cp_features(sde_enc->base.crtc); ctl->ops.get_pending_flush(ctl, &cfg); SDE_EVT32(DRMID(phys_enc->parent), cfg.pending_flush_mask); ctl->ops.trigger_flush(ctl);