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disp: msm: sde: fix dsc initial line caluclation

Current DSC intial line calculation is giving extra line on top of
recommended value from systems since number of active soft slices
considered is wrong. Fix the number or usage of active soft slices
in an encoder to align dsc initial line with recommended setting.

Change-Id: I321260e22b7824b8c481a55b54831ce9535661cc
Signed-off-by: Prabhanjan Kandula <[email protected]>
Prabhanjan Kandula 3 years ago
parent
commit
d863e18638
3 changed files with 13 additions and 14 deletions
  1. 2 0
      msm/msm_drv.h
  2. 9 5
      msm/sde/sde_encoder_dce.c
  3. 2 9
      msm/sde/sde_hw_dsc_1_2.c

+ 2 - 0
msm/msm_drv.h

@@ -409,6 +409,7 @@ struct msm_roi_caps {
  * @pclk_per_line:           Compressed width.
  * @pclk_per_line:           Compressed width.
  * @slice_last_group_size:   Size of last group in pixels.
  * @slice_last_group_size:   Size of last group in pixels.
  * @slice_per_pkt:           Number of slices per packet.
  * @slice_per_pkt:           Number of slices per packet.
+ * @num_active_ss_per_enc:   Number of active soft slices per encoder.
  * @source_color_space:      Source color space of DSC encoder
  * @source_color_space:      Source color space of DSC encoder
  * @chroma_format:           Chroma_format of DSC encoder.
  * @chroma_format:           Chroma_format of DSC encoder.
  * @det_thresh_flatness:     Flatness threshold.
  * @det_thresh_flatness:     Flatness threshold.
@@ -433,6 +434,7 @@ struct msm_display_dsc_info {
 	int pclk_per_line;
 	int pclk_per_line;
 	int slice_last_group_size;
 	int slice_last_group_size;
 	int slice_per_pkt;
 	int slice_per_pkt;
+	int num_active_ss_per_enc;
 	int source_color_space;
 	int source_color_space;
 	int chroma_format;
 	int chroma_format;
 	int det_thresh_flatness;
 	int det_thresh_flatness;

+ 9 - 5
msm/sde/sde_encoder_dce.c

@@ -123,7 +123,6 @@ static int _dce_dsc_initial_line_calc(struct msm_display_dsc_info *dsc,
 
 
 	int bpc = dsc->config.bits_per_component;
 	int bpc = dsc->config.bits_per_component;
 	int bpp = DSC_BPP(dsc->config);
 	int bpp = DSC_BPP(dsc->config);
-	int num_of_active_ss = dsc->config.slice_count;
 	bool native_422 = dsc->config.native_422;
 	bool native_422 = dsc->config.native_422;
 	bool native_420 = dsc->config.native_420;
 	bool native_420 = dsc->config.native_420;
 
 
@@ -135,7 +134,7 @@ static int _dce_dsc_initial_line_calc(struct msm_display_dsc_info *dsc,
 	if (dsc_cmn_mode & DSC_MODE_MULTIPLEX)
 	if (dsc_cmn_mode & DSC_MODE_MULTIPLEX)
 		multiplex_mode_enable = 1;
 		multiplex_mode_enable = 1;
 	if (dsc_cmn_mode & DSC_MODE_SPLIT_PANEL)
 	if (dsc_cmn_mode & DSC_MODE_SPLIT_PANEL)
-		split_panel_enable = 0;
+		split_panel_enable = 1;
 	container_slice_width = (native_422 ?
 	container_slice_width = (native_422 ?
 			dsc->config.slice_width / 2 : dsc->config.slice_width);
 			dsc->config.slice_width / 2 : dsc->config.slice_width);
 	max_muxword_size = (rtl_max_bpc >= 12) ? 64 : 48;
 	max_muxword_size = (rtl_max_bpc >= 12) ? 64 : 48;
@@ -144,7 +143,7 @@ static int _dce_dsc_initial_line_calc(struct msm_display_dsc_info *dsc,
 	mux_word_size = (bpc >= 12) ? 64 : 48;
 	mux_word_size = (bpc >= 12) ? 64 : 48;
 	compress_bpp_group = native_422 ? (2 * bpp) : bpp;
 	compress_bpp_group = native_422 ? (2 * bpp) : bpp;
 	input_ssm_out_latency = pipeline_latency + 3 * (max_ssm_delay + 2)
 	input_ssm_out_latency = pipeline_latency + 3 * (max_ssm_delay + 2)
-			* num_of_active_ss;
+			* dsc->num_active_ss_per_enc;
 	rtl_num_components = (native_420 || native_422) ? 4 : 3;
 	rtl_num_components = (native_420 || native_422) ? 4 : 3;
 	ob_data_width_4comps = (rtl_output_data_width >= (2 *
 	ob_data_width_4comps = (rtl_output_data_width >= (2 *
 			max_muxword_size)) ?
 			max_muxword_size)) ?
@@ -164,8 +163,7 @@ static int _dce_dsc_initial_line_calc(struct msm_display_dsc_info *dsc,
 		(output_rate_ratio_complement * chunk_bits) >>
 		(output_rate_ratio_complement * chunk_bits) >>
 		((ob_data_width == 128) ? 7 : 6);
 		((ob_data_width == 128) ? 7 : 6);
 	multi_hs_c = split_panel_enable * multiplex_mode_enable;
 	multi_hs_c = split_panel_enable * multiplex_mode_enable;
-	multi_hs_d = (num_of_active_ss > 1) * (ob_data_width >
-			compress_bpp_group);
+	multi_hs_d = (dsc->num_active_ss_per_enc > 1) * (ob_data_width > compress_bpp_group);
 	multi_hs_extra_budget_bits = multi_hs_c ?
 	multi_hs_extra_budget_bits = multi_hs_c ?
 				chunk_bits : (multi_hs_d ? chunk_bits :
 				chunk_bits : (multi_hs_d ? chunk_bits :
 					output_rate_extra_budget_bits);
 					output_rate_extra_budget_bits);
@@ -480,6 +478,12 @@ static int _dce_dsc_setup_helper(struct sde_encoder_virt *sde_enc,
 	if (enc_master->intf_mode == INTF_MODE_VIDEO)
 	if (enc_master->intf_mode == INTF_MODE_VIDEO)
 		dsc_common_mode |= DSC_MODE_VIDEO;
 		dsc_common_mode |= DSC_MODE_VIDEO;
 
 
+	dsc->num_active_ss_per_enc = dsc->config.slice_count;
+	if (dsc->dsc_4hsmerge_en)
+		dsc->num_active_ss_per_enc = dsc->config.slice_count >> 2;
+	else if ((dsc_common_mode & DSC_MODE_MULTIPLEX) || (dsc->half_panel_pu))
+		dsc->num_active_ss_per_enc = dsc->config.slice_count >> 1;
+
 	sde_dsc_populate_dsc_private_params(dsc, intf_ip_w);
 	sde_dsc_populate_dsc_private_params(dsc, intf_ip_w);
 
 
 	_dce_dsc_initial_line_calc(dsc, enc_ip_w, dsc_common_mode);
 	_dce_dsc_initial_line_calc(dsc, enc_ip_w, dsc_common_mode);

+ 2 - 9
msm/sde/sde_hw_dsc_1_2.c

@@ -129,7 +129,6 @@ static void sde_hw_dsc_config(struct sde_hw_dsc *hw_dsc,
 	struct sde_hw_blk_reg_map *dsc_c;
 	struct sde_hw_blk_reg_map *dsc_c;
 	u32 idx;
 	u32 idx;
 	u32 data = 0;
 	u32 data = 0;
-	u32 slice_count_per_enc;
 	u32 bpp;
 	u32 bpp;
 
 
 	if (!hw_dsc || !dsc)
 	if (!hw_dsc || !dsc)
@@ -139,7 +138,6 @@ static void sde_hw_dsc_config(struct sde_hw_dsc *hw_dsc,
 		return;
 		return;
 
 
 	dsc_c = &hw_dsc->hw;
 	dsc_c = &hw_dsc->hw;
-	slice_count_per_enc = dsc->config.slice_count;
 
 
 	if (mode & DSC_MODE_SPLIT_PANEL)
 	if (mode & DSC_MODE_SPLIT_PANEL)
 		data |= BIT(0);
 		data |= BIT(0);
@@ -147,19 +145,14 @@ static void sde_hw_dsc_config(struct sde_hw_dsc *hw_dsc,
 	if (mode & DSC_MODE_MULTIPLEX)
 	if (mode & DSC_MODE_MULTIPLEX)
 		data |= BIT(1);
 		data |= BIT(1);
 
 
-	if (dsc->dsc_4hsmerge_en)
-		slice_count_per_enc = dsc->config.slice_count >> 2;
-	else if ((mode & DSC_MODE_MULTIPLEX) || (dsc->half_panel_pu))
-		slice_count_per_enc = dsc->config.slice_count >> 1;
-
-	data |= (slice_count_per_enc & 0x3) << 7;
+	data |= (dsc->num_active_ss_per_enc & 0x3) << 7;
 	SDE_REG_WRITE(dsc_c, DSC_CMN_MAIN_CNF, data);
 	SDE_REG_WRITE(dsc_c, DSC_CMN_MAIN_CNF, data);
 
 
 	data = (dsc->initial_lines & 0xff);
 	data = (dsc->initial_lines & 0xff);
 	data |= ((mode & DSC_MODE_VIDEO) ? 1 : 0) << 9;
 	data |= ((mode & DSC_MODE_VIDEO) ? 1 : 0) << 9;
 	if (ich_reset_override)
 	if (ich_reset_override)
 		data |= 0xC00; // set bit 10 and 11
 		data |= 0xC00; // set bit 10 and 11
-	data |= (_dsc_calc_ob_max_addr(hw_dsc, slice_count_per_enc) << 18);
+	data |= (_dsc_calc_ob_max_addr(hw_dsc, dsc->num_active_ss_per_enc) << 18);
 
 
 	SDE_REG_WRITE(dsc_c, ENC_DF_CTRL + idx, data);
 	SDE_REG_WRITE(dsc_c, ENC_DF_CTRL + idx, data);