fw-api: Update HW header files for QCA6750

Update the HW files for QCA6750 according to wcss_r44

Change-Id: Ie78b50add165e2a36bc8ac722ca1c3a206bbbbc1
CRs-Fixed: 2645496

hw/qca6750/v1/wcss_seq_hwiobase.h

@@ -89,6 +89,7 @@
 #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x005c7000
 #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x005cb000
 #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET             0x005d4000
+#define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_CAL_OFFSET 0x005d42f0
 #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET         0x005d4000
 #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_XFEM_OFFSET    0x005d4240
 #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_OFFSET    0x005d42c0
@@ -120,7 +121,7 @@
 #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x005d7180
 #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x005d71c0
 #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x005d7280
-#define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x005d7c00
+#define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_CMN_PMU_TEST_OFFSET    0x005da000
 #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_OFFSET              0x005dc000
 #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_MTOP_OFFSET      0x005dc000
 #define SEQ_WCSS_PHYA_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TXBB_OFFSET      0x005dc800
@@ -279,29 +280,6 @@
 #define SEQ_WCSS_CC_OFFSET                                           0x00cb0000
 #define SEQ_WCSS_UMAC_ACMT_OFFSET                                    0x00cc0000
 
-#ifdef DEF_RPROC
-#define SEQ_WCSS_Q6SS_PUBCSR_OFFSET                                  0x0cd00000
-#define SEQ_WCSS_Q6SS_PUBCSR_QDSP6SS_PUB_OFFSET                      0x0cd00000
-#define SEQ_WCSS_Q6SS_PRIVCSR_OFFSET                                 0x0cd80000
-#define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_CSR_OFFSET                     0x0cd80000
-#define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_L2VIC_OFFSET                   0x0cd90000
-#define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_QTMR_AC_OFFSET                 0x0cda0000
-#define SEQ_WCSS_Q6SS_PRIVCSR_QTMR_F0_OFFSET                         0x0cda1000
-#define SEQ_WCSS_Q6SS_PRIVCSR_QTMR_F1_OFFSET                         0x0cda2000
-#define SEQ_WCSS_Q6SS_PRIVCSR_QTMR_F2_OFFSET                         0x0cda3000
-#define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_SAW2_OFFSET                    0x0cdb0000
-#else
-#define SEQ_WCSS_Q6SS_PUBCSR_OFFSET                                  0x00d00000
-#define SEQ_WCSS_Q6SS_PUBCSR_QDSP6SS_PUB_OFFSET                      0x00d00000
-#define SEQ_WCSS_Q6SS_PRIVCSR_OFFSET                                 0x00d80000
-#define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_CSR_OFFSET                     0x00d80000
-#define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_L2VIC_OFFSET                   0x00d90000
-#define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_QTMR_AC_OFFSET                 0x00da0000
-#define SEQ_WCSS_Q6SS_PRIVCSR_QTMR_F0_OFFSET                         0x00da1000
-#define SEQ_WCSS_Q6SS_PRIVCSR_QTMR_F1_OFFSET                         0x00da2000
-#define SEQ_WCSS_Q6SS_PRIVCSR_QTMR_F2_OFFSET                         0x00da3000
-#define SEQ_WCSS_Q6SS_PRIVCSR_QDSP6SS_SAW2_OFFSET                    0x00db0000
-#endif
 
 ///////////////////////////////////////////////////////////////////////////////////////////////
 // Instance Relative Offsets from Block wfax_top
@@ -342,6 +320,7 @@
 #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x002c7000
 #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x002cb000
 #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_OFFSET              0x002d4000
+#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_CAL_OFFSET 0x002d42f0
 #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_OFFSET          0x002d4000
 #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_XFEM_OFFSET     0x002d4240
 #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_AON_COEX_OFFSET     0x002d42c0
@@ -373,7 +352,7 @@
 #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_KVCO_OFFSET 0x002d7180
 #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_AC_OFFSET 0x002d71c0
 #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_WL_SYNTH2_LO_OFFSET 0x002d7280
-#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_HLS_WL_REGFILE_OFFSET 0x002d7c00
+#define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_CMN_PMU_TEST_OFFSET     0x002da000
 #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_OFFSET               0x002dc000
 #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_MTOP_OFFSET       0x002dc000
 #define SEQ_WFAX_TOP_WFAX_IRON2G_REG_MAP_RFA_BT_BT_TXBB_OFFSET       0x002dc800
@@ -460,6 +439,7 @@
 #define SEQ_RFA_FROM_WSI_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_RAW_FUSE_OFFSET 0x00007000
 #define SEQ_RFA_FROM_WSI_RFA_SOC_BT_SECURITY_CONTROL_BT_QFPROM_CORR_FUSE_OFFSET 0x0000b000
 #define SEQ_RFA_FROM_WSI_RFA_CMN_OFFSET                              0x00014000
+#define SEQ_RFA_FROM_WSI_RFA_CMN_AON_COEX_CAL_OFFSET                 0x000142f0
 #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_OFFSET                          0x00014000
 #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_XFEM_OFFSET                     0x00014240
 #define SEQ_RFA_FROM_WSI_RFA_CMN_AON_COEX_OFFSET                     0x000142c0
@@ -491,7 +471,7 @@
 #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_KVCO_OFFSET               0x00017180
 #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_AC_OFFSET                 0x000171c0
 #define SEQ_RFA_FROM_WSI_RFA_CMN_WL_SYNTH2_LO_OFFSET                 0x00017280
-#define SEQ_RFA_FROM_WSI_RFA_CMN_HLS_WL_REGFILE_OFFSET               0x00017c00
+#define SEQ_RFA_FROM_WSI_RFA_CMN_PMU_TEST_OFFSET                     0x0001a000
 #define SEQ_RFA_FROM_WSI_RFA_BT_OFFSET                               0x0001c000
 #define SEQ_RFA_FROM_WSI_RFA_BT_BT_MTOP_OFFSET                       0x0001c000
 #define SEQ_RFA_FROM_WSI_RFA_BT_BT_TXBB_OFFSET                       0x0001c800
@@ -591,6 +571,7 @@
 // Instance Relative Offsets from Block rfa_cmn
 ///////////////////////////////////////////////////////////////////////////////////////////////
 
+#define SEQ_RFA_CMN_AON_COEX_CAL_OFFSET                              0x000002f0
 #define SEQ_RFA_CMN_AON_OFFSET                                       0x00000000
 #define SEQ_RFA_CMN_AON_XFEM_OFFSET                                  0x00000240
 #define SEQ_RFA_CMN_AON_COEX_OFFSET                                  0x000002c0
@@ -622,7 +603,7 @@
 #define SEQ_RFA_CMN_WL_SYNTH2_KVCO_OFFSET                            0x00003180
 #define SEQ_RFA_CMN_WL_SYNTH2_AC_OFFSET                              0x000031c0
 #define SEQ_RFA_CMN_WL_SYNTH2_LO_OFFSET                              0x00003280
-#define SEQ_RFA_CMN_HLS_WL_REGFILE_OFFSET                            0x00003c00
+#define SEQ_RFA_CMN_PMU_TEST_OFFSET                                  0x00006000
 
 
 ///////////////////////////////////////////////////////////////////////////////////////////////

hw/qca6750/v1/wcss_version.h

@@ -16,4 +16,4 @@
  * PERFORMANCE OF THIS SOFTWARE.
  */
 
-#define WCSS_VERSION 29 /* E1.5 */
+#define WCSS_VERSION 44