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@@ -112,6 +112,13 @@ ol_txrx_set_wmm_param(struct cdp_pdev *data_pdev,
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extern void ol_txrx_get_pn_info(void *ppeer, uint8_t **last_pn_valid,
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uint64_t **last_pn, uint32_t **rmf_pn_replays);
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+#ifdef QCA_HL_NETDEV_FLOW_CONTROL
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+static u16 ol_txrx_tx_desc_alloc_table[TXRX_FC_MAX] = {
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+ [TXRX_FC_5GH_80M_2x2] = 2000,
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+ [TXRX_FC_2GH_40M_2x2] = 800,
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+};
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+#endif /* QCA_HL_NETDEV_FLOW_CONTROL */
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+
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/* thresh for peer's cached buf queue beyond which the elements are dropped */
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#define OL_TXRX_CACHED_BUFQ_THRESH 128
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@@ -1586,7 +1593,6 @@ ol_txrx_pdev_post_attach(struct cdp_pdev *ppdev)
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*/
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if (pdev->cfg.is_high_latency) {
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desc_pool_size = ol_tx_desc_pool_size_hl(pdev->ctrl_pdev);
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-
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qdf_atomic_init(&pdev->tx_queue.rsrc_cnt);
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qdf_atomic_add(desc_pool_size, &pdev->tx_queue.rsrc_cnt);
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@@ -5024,6 +5030,15 @@ static int ol_txrx_register_hl_flow_control(struct cdp_soc_t *soc,
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tx_pause_callback flowcontrol)
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{
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struct ol_txrx_pdev_t *pdev = cds_get_context(QDF_MODULE_ID_TXRX);
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+ u32 desc_pool_size = ol_tx_desc_pool_size_hl(pdev->ctrl_pdev);
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+
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+ /*
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+ * Assert if the tx descriptor pool size meets the requirements
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+ * Maximum 2 sessions are allowed on a band.
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+ */
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+ QDF_ASSERT((2 * ol_txrx_tx_desc_alloc_table[TXRX_FC_5GH_80M_2x2] +
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+ ol_txrx_tx_desc_alloc_table[TXRX_FC_2GH_40M_2x2])
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+ <= desc_pool_size);
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if (!pdev || !flowcontrol) {
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QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
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@@ -5063,6 +5078,40 @@ static int ol_txrx_set_vdev_os_queue_status(u8 vdev_id,
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}
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return 0;
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}
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+
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+/**
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+ * ol_txrx_set_vdev_tx_desc_limit() - Set TX descriptor limits for a vdev
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+ * @vdev_id: vdev id for the vdev under consideration.
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+ * @chan: Channel on which the vdev has been started.
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+ */
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+static int ol_txrx_set_vdev_tx_desc_limit(u8 vdev_id, u8 chan)
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+{
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+ struct ol_txrx_vdev_t *vdev =
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+ (struct ol_txrx_vdev_t *)ol_txrx_get_vdev_from_vdev_id(vdev_id);
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+ enum ol_txrx_fc_limit_id fc_limit_id;
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+ u32 td_limit;
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+
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+ if (!vdev) {
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+ QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_ERROR,
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+ "%s: Invalid vdev_id %d", __func__, vdev_id);
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+ return -EINVAL;
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+ }
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+
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+ /* TODO: Handle no of spatial streams and channel BW */
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+ if (WLAN_REG_IS_5GHZ_CH(chan))
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+ fc_limit_id = TXRX_FC_5GH_80M_2x2;
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+ else
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+ fc_limit_id = TXRX_FC_2GH_40M_2x2;
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+
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+ qdf_spin_lock_bh(&vdev->pdev->tx_mutex);
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+ td_limit = ol_txrx_tx_desc_alloc_table[fc_limit_id];
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+ vdev->tx_desc_limit = td_limit;
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+ vdev->queue_stop_th = td_limit - TXRX_HL_TX_DESC_HI_PRIO_RESERVED;
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+ vdev->queue_restart_th = td_limit - TXRX_HL_TX_DESC_QUEUE_RESTART_TH;
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+ qdf_spin_unlock_bh(&vdev->pdev->tx_mutex);
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+
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+ return 0;
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+}
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#endif /* QCA_HL_NETDEV_FLOW_CONTROL */
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/**
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@@ -6069,7 +6118,8 @@ static struct cdp_lflowctl_ops ol_ops_l_flowctl = {
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.vdev_flush = ol_txrx_vdev_flush,
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.vdev_pause = ol_txrx_vdev_pause,
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.vdev_unpause = ol_txrx_vdev_unpause,
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- .set_vdev_os_queue_status = ol_txrx_set_vdev_os_queue_status
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+ .set_vdev_os_queue_status = ol_txrx_set_vdev_os_queue_status,
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+ .set_vdev_tx_desc_limit = ol_txrx_set_vdev_tx_desc_limit
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};
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#else /* QCA_HL_NETDEV_FLOW_CONTROL */
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static struct cdp_lflowctl_ops ol_ops_l_flowctl = { };
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