From d667adc719d5dc5ed80dd51f9e77f56b14c039b0 Mon Sep 17 00:00:00 2001 From: Dustin Newman Date: Mon, 14 Dec 2020 16:50:35 -0800 Subject: [PATCH] qcacmn: hal: Initialize hal_hw_txrx_ops for 8074v1 Change hal_hw_txrx_ops struct to designated initializer syntax for structs for 8074v1. Change-Id: I1c9657c3a7d642f676167a7ce1026acb6e8db056 CRs-Fixed: 2837917 --- hal/wifi3.0/qca8074v1/hal_8074v1.c | 214 ++++++++++++++--------------- 1 file changed, 107 insertions(+), 107 deletions(-) diff --git a/hal/wifi3.0/qca8074v1/hal_8074v1.c b/hal/wifi3.0/qca8074v1/hal_8074v1.c index 194f0d8010..5684fac7aa 100644 --- a/hal/wifi3.0/qca8074v1/hal_8074v1.c +++ b/hal/wifi3.0/qca8074v1/hal_8074v1.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2020 The Linux Foundation. All rights reserved. + * Copyright (c) 2016-2021 The Linux Foundation. All rights reserved. * * Permission to use, copy, modify, and/or distribute this software for * any purpose with or without fee is hereby granted, provided that the @@ -1215,120 +1215,120 @@ void hal_compute_reo_remap_ix2_ix3_8074v1(uint32_t *ring, uint32_t num_rings, struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = { /* init and setup */ - hal_srng_dst_hw_init_generic, - hal_srng_src_hw_init_generic, - hal_get_hw_hptp_generic, - hal_reo_setup_generic, - hal_setup_link_idle_list_generic, - hal_get_window_address_8074, - NULL, + .hal_srng_dst_hw_init = hal_srng_dst_hw_init_generic, + .hal_srng_src_hw_init = hal_srng_src_hw_init_generic, + .hal_get_hw_hptp = hal_get_hw_hptp_generic, + .hal_reo_setup = hal_reo_setup_generic, + .hal_setup_link_idle_list = hal_setup_link_idle_list_generic, + .hal_get_window_address = hal_get_window_address_8074, /* tx */ - hal_tx_desc_set_dscp_tid_table_id_8074, - hal_tx_set_dscp_tid_map_8074, - hal_tx_update_dscp_tid_8074, - hal_tx_desc_set_lmac_id_8074, - hal_tx_desc_set_buf_addr_generic, - hal_tx_desc_set_search_type_generic, - hal_tx_desc_set_search_index_generic, - hal_tx_desc_set_cache_set_num_generic, - hal_tx_comp_get_status_generic, - hal_tx_comp_get_release_reason_generic, - hal_get_wbm_internal_error_generic, - hal_tx_desc_set_mesh_en_8074v1, - hal_tx_init_cmd_credit_ring_8074v1, + .hal_tx_desc_set_dscp_tid_table_id = + hal_tx_desc_set_dscp_tid_table_id_8074, + .hal_tx_set_dscp_tid_map = hal_tx_set_dscp_tid_map_8074, + .hal_tx_update_dscp_tid = hal_tx_update_dscp_tid_8074, + .hal_tx_desc_set_lmac_id = hal_tx_desc_set_lmac_id_8074, + .hal_tx_desc_set_buf_addr = hal_tx_desc_set_buf_addr_generic, + .hal_tx_desc_set_search_type = hal_tx_desc_set_search_type_generic, + .hal_tx_desc_set_search_index = hal_tx_desc_set_search_index_generic, + .hal_tx_desc_set_cache_set_num = hal_tx_desc_set_cache_set_num_generic, + .hal_tx_comp_get_status = hal_tx_comp_get_status_generic, + .hal_tx_comp_get_release_reason = + hal_tx_comp_get_release_reason_generic, + .hal_get_wbm_internal_error = hal_get_wbm_internal_error_generic, + .hal_tx_desc_set_mesh_en = hal_tx_desc_set_mesh_en_8074v1, + .hal_tx_init_cmd_credit_ring = hal_tx_init_cmd_credit_ring_8074v1, /* rx */ - hal_rx_msdu_start_nss_get_8074, - hal_rx_mon_hw_desc_get_mpdu_status_8074, - hal_rx_get_tlv_8074, - hal_rx_proc_phyrx_other_receive_info_tlv_8074, - hal_rx_dump_msdu_start_tlv_8074, - hal_rx_dump_msdu_end_tlv_8074, - hal_get_link_desc_size_8074, - hal_rx_mpdu_start_tid_get_8074, - hal_rx_msdu_start_reception_type_get_8074, - hal_rx_msdu_end_da_idx_get_8074, - hal_rx_msdu_desc_info_get_ptr_8074v1, - hal_rx_link_desc_msdu0_ptr_8074v1, - hal_reo_status_get_header_8074v1, - hal_rx_status_get_tlv_info_generic, - hal_rx_wbm_err_info_get_generic, - hal_rx_dump_mpdu_start_tlv_generic, + .hal_rx_msdu_start_nss_get = hal_rx_msdu_start_nss_get_8074, + .hal_rx_mon_hw_desc_get_mpdu_status = + hal_rx_mon_hw_desc_get_mpdu_status_8074, + .hal_rx_get_tlv = hal_rx_get_tlv_8074, + .hal_rx_proc_phyrx_other_receive_info_tlv = + hal_rx_proc_phyrx_other_receive_info_tlv_8074, + .hal_rx_dump_msdu_start_tlv = hal_rx_dump_msdu_start_tlv_8074, + .hal_rx_dump_msdu_end_tlv = hal_rx_dump_msdu_end_tlv_8074, + .hal_get_link_desc_size = hal_get_link_desc_size_8074, + .hal_rx_mpdu_start_tid_get = hal_rx_mpdu_start_tid_get_8074, + .hal_rx_msdu_start_reception_type_get = + hal_rx_msdu_start_reception_type_get_8074, + .hal_rx_msdu_end_da_idx_get = hal_rx_msdu_end_da_idx_get_8074, + .hal_rx_msdu_desc_info_get_ptr = hal_rx_msdu_desc_info_get_ptr_8074v1, + .hal_rx_link_desc_msdu0_ptr = hal_rx_link_desc_msdu0_ptr_8074v1, + .hal_reo_status_get_header = hal_reo_status_get_header_8074v1, + .hal_rx_status_get_tlv_info = hal_rx_status_get_tlv_info_generic, + .hal_rx_wbm_err_info_get = hal_rx_wbm_err_info_get_generic, + .hal_rx_dump_mpdu_start_tlv = hal_rx_dump_mpdu_start_tlv_generic, - hal_tx_set_pcp_tid_map_generic, - hal_tx_update_pcp_tid_generic, - hal_tx_update_tidmap_prty_generic, - hal_rx_get_rx_fragment_number_8074v1, - hal_rx_msdu_end_da_is_mcbc_get_8074v1, - hal_rx_msdu_end_sa_is_valid_get_8074v1, - hal_rx_msdu_end_sa_idx_get_8074v1, - hal_rx_desc_is_first_msdu_8074v1, - hal_rx_msdu_end_l3_hdr_padding_get_8074v1, - hal_rx_encryption_info_valid_8074v1, - hal_rx_print_pn_8074v1, - hal_rx_msdu_end_first_msdu_get_8074v1, - hal_rx_msdu_end_da_is_valid_get_8074v1, - hal_rx_msdu_end_last_msdu_get_8074v1, - hal_rx_get_mpdu_mac_ad4_valid_8074v1, - hal_rx_mpdu_start_sw_peer_id_get_8074v1, - hal_rx_mpdu_get_to_ds_8074v1, - hal_rx_mpdu_get_fr_ds_8074v1, - hal_rx_get_mpdu_frame_control_valid_8074v1, - hal_rx_mpdu_get_addr1_8074v1, - hal_rx_mpdu_get_addr2_8074v1, - hal_rx_mpdu_get_addr3_8074v1, - hal_rx_mpdu_get_addr4_8074v1, - hal_rx_get_mpdu_sequence_control_valid_8074v1, - hal_rx_is_unicast_8074v1, - hal_rx_tid_get_8074v1, - hal_rx_hw_desc_get_ppduid_get_8074v1, - hal_rx_mpdu_start_mpdu_qos_control_valid_get_8074v1, - hal_rx_msdu_end_sa_sw_peer_id_get_8074v1, - hal_rx_msdu0_buffer_addr_lsb_8074v1, - hal_rx_msdu_desc_info_ptr_get_8074v1, - hal_ent_mpdu_desc_info_8074v1, - hal_dst_mpdu_desc_info_8074v1, - hal_rx_get_fc_valid_8074v1, - hal_rx_get_to_ds_flag_8074v1, - hal_rx_get_mac_addr2_valid_8074v1, - hal_rx_get_filter_category_8074v1, - hal_rx_get_ppdu_id_8074v1, - hal_reo_config_8074v1, - hal_rx_msdu_flow_idx_get_8074v1, - hal_rx_msdu_flow_idx_invalid_8074v1, - hal_rx_msdu_flow_idx_timeout_8074v1, - hal_rx_msdu_fse_metadata_get_8074v1, - hal_rx_msdu_cce_metadata_get_8074v1, - hal_rx_msdu_get_flow_params_8074v1, - hal_rx_tlv_get_tcp_chksum_8074v1, - hal_rx_get_rx_sequence_8074v1, - NULL, - NULL, + .hal_tx_set_pcp_tid_map = hal_tx_set_pcp_tid_map_generic, + .hal_tx_update_pcp_tid_map = hal_tx_update_pcp_tid_generic, + .hal_tx_set_tidmap_prty = hal_tx_update_tidmap_prty_generic, + .hal_rx_get_rx_fragment_number = hal_rx_get_rx_fragment_number_8074v1, + .hal_rx_msdu_end_da_is_mcbc_get = hal_rx_msdu_end_da_is_mcbc_get_8074v1, + .hal_rx_msdu_end_sa_is_valid_get = + hal_rx_msdu_end_sa_is_valid_get_8074v1, + .hal_rx_msdu_end_sa_idx_get = hal_rx_msdu_end_sa_idx_get_8074v1, + .hal_rx_desc_is_first_msdu = hal_rx_desc_is_first_msdu_8074v1, + .hal_rx_msdu_end_l3_hdr_padding_get = + hal_rx_msdu_end_l3_hdr_padding_get_8074v1, + .hal_rx_encryption_info_valid = hal_rx_encryption_info_valid_8074v1, + .hal_rx_print_pn = hal_rx_print_pn_8074v1, + .hal_rx_msdu_end_first_msdu_get = hal_rx_msdu_end_first_msdu_get_8074v1, + .hal_rx_msdu_end_da_is_valid_get = + hal_rx_msdu_end_da_is_valid_get_8074v1, + .hal_rx_msdu_end_last_msdu_get = hal_rx_msdu_end_last_msdu_get_8074v1, + .hal_rx_get_mpdu_mac_ad4_valid = hal_rx_get_mpdu_mac_ad4_valid_8074v1, + .hal_rx_mpdu_start_sw_peer_id_get = + hal_rx_mpdu_start_sw_peer_id_get_8074v1, + .hal_rx_mpdu_get_to_ds = hal_rx_mpdu_get_to_ds_8074v1, + .hal_rx_mpdu_get_fr_ds = hal_rx_mpdu_get_fr_ds_8074v1, + .hal_rx_get_mpdu_frame_control_valid = + hal_rx_get_mpdu_frame_control_valid_8074v1, + .hal_rx_mpdu_get_addr1 = hal_rx_mpdu_get_addr1_8074v1, + .hal_rx_mpdu_get_addr2 = hal_rx_mpdu_get_addr2_8074v1, + .hal_rx_mpdu_get_addr3 = hal_rx_mpdu_get_addr3_8074v1, + .hal_rx_mpdu_get_addr4 = hal_rx_mpdu_get_addr4_8074v1, + .hal_rx_get_mpdu_sequence_control_valid = + hal_rx_get_mpdu_sequence_control_valid_8074v1, + .hal_rx_is_unicast = hal_rx_is_unicast_8074v1, + .hal_rx_tid_get = hal_rx_tid_get_8074v1, + .hal_rx_hw_desc_get_ppduid_get = hal_rx_hw_desc_get_ppduid_get_8074v1, + .hal_rx_mpdu_start_mpdu_qos_control_valid_get = + hal_rx_mpdu_start_mpdu_qos_control_valid_get_8074v1, + .hal_rx_msdu_end_sa_sw_peer_id_get = + hal_rx_msdu_end_sa_sw_peer_id_get_8074v1, + .hal_rx_msdu0_buffer_addr_lsb = hal_rx_msdu0_buffer_addr_lsb_8074v1, + .hal_rx_msdu_desc_info_ptr_get = hal_rx_msdu_desc_info_ptr_get_8074v1, + .hal_ent_mpdu_desc_info = hal_ent_mpdu_desc_info_8074v1, + .hal_dst_mpdu_desc_info = hal_dst_mpdu_desc_info_8074v1, + .hal_rx_get_fc_valid = hal_rx_get_fc_valid_8074v1, + .hal_rx_get_to_ds_flag = hal_rx_get_to_ds_flag_8074v1, + .hal_rx_get_mac_addr2_valid = hal_rx_get_mac_addr2_valid_8074v1, + .hal_rx_get_filter_category = hal_rx_get_filter_category_8074v1, + .hal_rx_get_ppdu_id = hal_rx_get_ppdu_id_8074v1, + .hal_reo_config = hal_reo_config_8074v1, + .hal_rx_msdu_flow_idx_get = hal_rx_msdu_flow_idx_get_8074v1, + .hal_rx_msdu_flow_idx_invalid = hal_rx_msdu_flow_idx_invalid_8074v1, + .hal_rx_msdu_flow_idx_timeout = hal_rx_msdu_flow_idx_timeout_8074v1, + .hal_rx_msdu_fse_metadata_get = hal_rx_msdu_fse_metadata_get_8074v1, + .hal_rx_msdu_cce_metadata_get = hal_rx_msdu_cce_metadata_get_8074v1, + .hal_rx_msdu_get_flow_params = hal_rx_msdu_get_flow_params_8074v1, + .hal_rx_tlv_get_tcp_chksum = hal_rx_tlv_get_tcp_chksum_8074v1, + .hal_rx_get_rx_sequence = hal_rx_get_rx_sequence_8074v1, /* rx - msdu fast path info fields */ - hal_rx_msdu_packet_metadata_get_generic, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - hal_rx_mpdu_start_tlv_tag_valid_8074v1, - NULL, - NULL, + .hal_rx_msdu_packet_metadata_get = + hal_rx_msdu_packet_metadata_get_generic, + .hal_rx_mpdu_start_tlv_tag_valid = + hal_rx_mpdu_start_tlv_tag_valid_8074v1, /* rx - TLV struct offsets */ - hal_rx_msdu_end_offset_get_generic, - hal_rx_attn_offset_get_generic, - hal_rx_msdu_start_offset_get_generic, - hal_rx_mpdu_start_offset_get_generic, - hal_rx_mpdu_end_offset_get_generic, - hal_rx_flow_setup_fse_8074v1, - hal_compute_reo_remap_ix2_ix3_8074v1, - NULL, - NULL, - NULL, - NULL + .hal_rx_msdu_end_offset_get = hal_rx_msdu_end_offset_get_generic, + .hal_rx_attn_offset_get = hal_rx_attn_offset_get_generic, + .hal_rx_msdu_start_offset_get = hal_rx_msdu_start_offset_get_generic, + .hal_rx_mpdu_start_offset_get = hal_rx_mpdu_start_offset_get_generic, + .hal_rx_mpdu_end_offset_get = hal_rx_mpdu_end_offset_get_generic, + .hal_rx_flow_setup_fse = hal_rx_flow_setup_fse_8074v1, + .hal_compute_reo_remap_ix2_ix3 = hal_compute_reo_remap_ix2_ix3_8074v1, }; struct hal_hw_srng_config hw_srng_table_8074[] = {